2 * This file contains assembly-language implementations
3 * of IP-style 1's complement checksum routines.
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * Severely hacked about by Paul Mackerras (paulus@cs.anu.edu.au).
15 #include <linux/sys.h>
16 #include <asm/processor.h>
17 #include <asm/errno.h>
18 #include <asm/ppc_asm.h>
21 * ip_fast_csum(r3=buf, r4=len) -- Optimized for IP header
22 * len is in words and is always >= 5.
24 * In practice len == 5, but this is not guaranteed. So this code does not
25 * attempt to use doubleword instructions.
37 addze r0,r0 /* add in final carry */
38 rldicl r4,r0,32,0 /* fold two 32-bit halves together */
41 rlwinm r3,r0,16,0,31 /* fold two halves together */
48 * Compute checksum of TCP or UDP pseudo-header:
49 * csum_tcpudp_magic(r3=saddr, r4=daddr, r5=len, r6=proto, r7=sum)
50 * No real gain trying to do this specially for 64 bit, but
51 * the 32 bit addition may spill into the upper bits of
52 * the doubleword so we still must fold it down from 64.
54 _GLOBAL(csum_tcpudp_magic)
55 rlwimi r5,r6,16,0,15 /* put proto in upper half of len */
56 addc r0,r3,r4 /* add 4 32-bit words together */
59 rldicl r4,r0,32,0 /* fold 64 bit value */
62 rlwinm r3,r0,16,0,31 /* fold two halves together */
69 * Computes the checksum of a memory block at buff, length len,
70 * and adds in "sum" (32-bit).
72 * csum_partial(r3=buff, r4=len, r5=sum)
75 addic r0,r5,0 /* clear carry */
77 srdi. r6,r4,3 /* less than 8 bytes? */
81 * If only halfword aligned, align to a double word. Since odd
82 * aligned addresses should be rare and they would require more
83 * work to calculate the correct checksum, we ignore that case
84 * and take the potential slowdown of unaligned loads.
86 rldicl. r6,r3,64-1,64-2 /* r6 = (r3 & 0x3) >> 1 */
94 lhz r6,0(r3) /* align to doubleword */
102 * We unroll the loop such that each iteration is 64 bytes with an
103 * entry and exit limb of 64 bytes, meaning a minimum size of
107 beq .Lcsum_tail_doublewords /* len < 128 */
113 stdu r1,-STACKFRAMESIZE(r1)
114 std r14,STK_REG(R14)(r1)
115 std r15,STK_REG(R15)(r1)
116 std r16,STK_REG(R16)(r1)
125 * On POWER6 and POWER7 back to back addes take 2 cycles because of
126 * the XER dependency. This means the fastest this loop can go is
127 * 16 cycles per iteration. The scheduling of the loop below has
128 * been shown to hit this on both POWER6 and POWER7.
175 ld r14,STK_REG(R14)(r1)
176 ld r15,STK_REG(R15)(r1)
177 ld r16,STK_REG(R16)(r1)
178 addi r1,r1,STACKFRAMESIZE
182 .Lcsum_tail_doublewords: /* Up to 127 bytes to go */
195 .Lcsum_tail_word: /* Up to 7 bytes to go */
197 beq .Lcsum_tail_halfword
204 .Lcsum_tail_halfword: /* Up to 3 bytes to go */
213 .Lcsum_tail_byte: /* Up to 1 byte to go */
218 sldi r9,r6,8 /* Pad the byte out to 16 bits */
222 addze r0,r0 /* add in final carry */
223 rldicl r4,r0,32,0 /* fold two 32 bit halves together */
231 .section __ex_table,"a"
233 .llong 100b,.Lsrc_error
239 .section __ex_table,"a"
241 .llong 200b,.Ldest_error
246 * Computes the checksum of a memory block at src, length len,
247 * and adds in "sum" (32-bit), while copying the block to dst.
248 * If an access exception occurs on src or dst, it stores -EFAULT
249 * to *src_err or *dst_err respectively. The caller must take any action
250 * required in this case (zeroing memory, recalculating partial checksum etc).
252 * csum_partial_copy_generic(r3=src, r4=dst, r5=len, r6=sum, r7=src_err, r8=dst_err)
254 _GLOBAL(csum_partial_copy_generic)
255 addic r0,r6,0 /* clear carry */
257 srdi. r6,r5,3 /* less than 8 bytes? */
261 * If only halfword aligned, align to a double word. Since odd
262 * aligned addresses should be rare and they would require more
263 * work to calculate the correct checksum, we ignore that case
264 * and take the potential slowdown of unaligned loads.
266 * If the source and destination are relatively unaligned we only
267 * align the source. This keeps things simple.
269 rldicl. r6,r3,64-1,64-2 /* r6 = (r3 & 0x3) >> 1 */
277 source; lhz r6,0(r3) /* align to doubleword */
287 * We unroll the loop such that each iteration is 64 bytes with an
288 * entry and exit limb of 64 bytes, meaning a minimum size of
292 beq .Lcopy_tail_doublewords /* len < 128 */
298 stdu r1,-STACKFRAMESIZE(r1)
299 std r14,STK_REG(R14)(r1)
300 std r15,STK_REG(R15)(r1)
301 std r16,STK_REG(R16)(r1)
306 source; ld r10,16(r3)
307 source; ld r11,24(r3)
310 * On POWER6 and POWER7 back to back addes take 2 cycles because of
311 * the XER dependency. This means the fastest this loop can go is
312 * 16 cycles per iteration. The scheduling of the loop below has
313 * been shown to hit this on both POWER6 and POWER7.
318 source; ld r12,32(r3)
319 source; ld r14,40(r3)
322 source; ld r15,48(r3)
323 source; ld r16,56(r3)
348 source; ld r10,16(r3)
349 source; ld r11,24(r3)
354 source; ld r12,32(r3)
355 source; ld r14,40(r3)
358 source; ld r15,48(r3)
359 source; ld r16,56(r3)
382 ld r14,STK_REG(R14)(r1)
383 ld r15,STK_REG(R15)(r1)
384 ld r16,STK_REG(R16)(r1)
385 addi r1,r1,STACKFRAMESIZE
389 .Lcopy_tail_doublewords: /* Up to 127 bytes to go */
404 .Lcopy_tail_word: /* Up to 7 bytes to go */
406 beq .Lcopy_tail_halfword
415 .Lcopy_tail_halfword: /* Up to 3 bytes to go */
426 .Lcopy_tail_byte: /* Up to 1 byte to go */
431 sldi r9,r6,8 /* Pad the byte out to 16 bits */
436 addze r0,r0 /* add in final carry */
437 rldicl r4,r0,32,0 /* fold two 32 bit halves together */