drivers/mfd/wm8400-core.c

   1 /*
   2  * Core driver for WM8400.
   3  *
   4  * Copyright 2008 Wolfson Microelectronics PLC.
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of the
  11  * License, or (at your option) any later version.
  12  *
  13  */
  14
  15 #include <linux/bug.h>
  16 #include <linux/i2c.h>
  17 #include <linux/kernel.h>
  18 #include <linux/mfd/core.h>
  19 #include <linux/mfd/wm8400-private.h>
  20 #include <linux/mfd/wm8400-audio.h>
  21 #include <linux/slab.h>
  22
  23 static struct {
  24         u16  readable;    /* Mask of readable bits */
  25         u16  writable;    /* Mask of writable bits */
  26         u16  vol;         /* Mask of volatile bits */
  27         int  is_codec;    /* Register controlled by codec reset */
  28         u16  default_val; /* Value on reset */
  29 } reg_data[] = {
  30         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
  31         { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
  32         { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
  33         { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
  34         { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4  */
  35         { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5  */
  36         { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6  */
  37         { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7  */
  38         { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8  */
  39         { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9  */
  40         { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
  41         { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
  42         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
  43         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
  44         { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
  45         { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
  46         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
  47         { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
  48         { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
  49         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
  50         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
  51         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
  52         { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
  53         { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
  54         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
  55         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
  56         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
  57         { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
  58         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
  59         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
  60         { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
  61         { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
  62         { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
  63         { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
  64         { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
  65         { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
  66         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
  67         { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
  68         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
  69         { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
  70         { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
  71         { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
  72         { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
  73         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
  74         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
  75         { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
  76         { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
  77         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
  78         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
  79         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
  80         { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
  81         { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
  82         { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
  83         { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
  84         { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
  85         { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
  86         { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
  87         { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
  88         { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
  89         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
  90         { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
  91         { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
  92         { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
  93         { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
  94         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
  95         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
  96         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
  97         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
  98         { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
  99         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
 100         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
 101         { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
 102         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
 103         { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
 104         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
 105         { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
 106         { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
 107         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
 108         { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
 109         { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
 110         { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
 111         { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
 112         { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
 113         { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
 114         { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
 115 };
 116
 117 static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
 118 {
 119         int i, ret = 0;
 120
 121         BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
 122
 123         /* If there are any volatile reads then read back the entire block */
 124         for (i = reg; i < reg + num_regs; i++)
 125                 if (reg_data[i].vol) {
 126                         ret = wm8400->read_dev(wm8400->io_data, reg,
 127                                                num_regs, dest);
 128                         if (ret != 0)
 129                                 return ret;
 130                         for (i = 0; i < num_regs; i++)
 131                                 dest[i] = be16_to_cpu(dest[i]);
 132
 133                         return 0;
 134                 }
 135
 136         /* Otherwise use the cache */
 137         memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
 138
 139         return 0;
 140 }
 141
 142 static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
 143                         u16 *src)
 144 {
 145         int ret, i;
 146
 147         BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache));
 148
 149         for (i = 0; i < num_regs; i++) {
 150                 BUG_ON(!reg_data[reg + i].writable);
 151                 wm8400->reg_cache[reg + i] = src[i];
 152                 src[i] = cpu_to_be16(src[i]);
 153         }
 154
 155         /* Do the actual I/O */
 156         ret = wm8400->write_dev(wm8400->io_data, reg, num_regs, src);
 157         if (ret != 0)
 158                 return -EIO;
 159
 160         return 0;
 161 }
 162
 163 /**
 164  * wm8400_reg_read - Single register read
 165  *
 166  * @wm8400: Pointer to wm8400 control structure
 167  * @reg:    Register to read
 168  *
 169  * @return  Read value
 170  */
 171 u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
 172 {
 173         u16 val;
 174
 175         mutex_lock(&wm8400->io_lock);
 176
 177         wm8400_read(wm8400, reg, 1, &val);
 178
 179         mutex_unlock(&wm8400->io_lock);
 180
 181         return val;
 182 }
 183 EXPORT_SYMBOL_GPL(wm8400_reg_read);
 184
 185 int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
 186 {
 187         int ret;
 188
 189         mutex_lock(&wm8400->io_lock);
 190
 191         ret = wm8400_read(wm8400, reg, count, data);
 192
 193         mutex_unlock(&wm8400->io_lock);
 194
 195         return ret;
 196 }
 197 EXPORT_SYMBOL_GPL(wm8400_block_read);
 198
 199 /**
 200  * wm8400_set_bits - Bitmask write
 201  *
 202  * @wm8400: Pointer to wm8400 control structure
 203  * @reg:    Register to access
 204  * @mask:   Mask of bits to change
 205  * @val:    Value to set for masked bits
 206  */
 207 int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
 208 {
 209         u16 tmp;
 210         int ret;
 211
 212         mutex_lock(&wm8400->io_lock);
 213
 214         ret = wm8400_read(wm8400, reg, 1, &tmp);
 215         tmp = (tmp & ~mask) | val;
 216         if (ret == 0)
 217                 ret = wm8400_write(wm8400, reg, 1, &tmp);
 218
 219         mutex_unlock(&wm8400->io_lock);
 220
 221         return ret;
 222 }
 223 EXPORT_SYMBOL_GPL(wm8400_set_bits);
 224
 225 /**
 226  * wm8400_reset_codec_reg_cache - Reset cached codec registers to
 227  * their default values.
 228  */
 229 void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
 230 {
 231         int i;
 232
 233         mutex_lock(&wm8400->io_lock);
 234
 235         /* Reset all codec registers to their initial value */
 236         for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 237                 if (reg_data[i].is_codec)
 238                         wm8400->reg_cache[i] = reg_data[i].default_val;
 239
 240         mutex_unlock(&wm8400->io_lock);
 241 }
 242 EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
 243
 244 static int wm8400_register_codec(struct wm8400 *wm8400)
 245 {
 246         struct mfd_cell cell = {
 247                 .name = "wm8400-codec",
 248                 .mfd_data = wm8400,
 249         };
 250
 251         return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
 252 }
 253
 254 /*
 255  * wm8400_init - Generic initialisation
 256  *
 257  * The WM8400 can be configured as either an I2C or SPI device.  Probe
 258  * functions for each bus set up the accessors then call into this to
 259  * set up the device itself.
 260  */
 261 static int wm8400_init(struct wm8400 *wm8400,
 262                        struct wm8400_platform_data *pdata)
 263 {
 264         u16 reg;
 265         int ret, i;
 266
 267         mutex_init(&wm8400->io_lock);
 268
 269         dev_set_drvdata(wm8400->dev, wm8400);
 270
 271         /* Check that this is actually a WM8400 */
 272         ret = wm8400->read_dev(wm8400->io_data, WM8400_RESET_ID, 1, &reg);
 273         if (ret != 0) {
 274                 dev_err(wm8400->dev, "Chip ID register read failed\n");
 275                 return -EIO;
 276         }
 277         if (be16_to_cpu(reg) != reg_data[WM8400_RESET_ID].default_val) {
 278                 dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
 279                         be16_to_cpu(reg));
 280                 return -ENODEV;
 281         }
 282
 283         /* We don't know what state the hardware is in and since this
 284          * is a PMIC we can't reset it safely so initialise the register
 285          * cache from the hardware.
 286          */
 287         ret = wm8400->read_dev(wm8400->io_data, 0,
 288                                ARRAY_SIZE(wm8400->reg_cache),
 289                                wm8400->reg_cache);
 290         if (ret != 0) {
 291                 dev_err(wm8400->dev, "Register cache read failed\n");
 292                 return -EIO;
 293         }
 294         for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 295                 wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
 296
 297         /* If the codec is in reset use hard coded values */
 298         if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
 299                 for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
 300                         if (reg_data[i].is_codec)
 301                                 wm8400->reg_cache[i] = reg_data[i].default_val;
 302
 303         ret = wm8400_read(wm8400, WM8400_ID, 1, &reg);
 304         if (ret != 0) {
 305                 dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
 306                 return ret;
 307         }
 308         reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
 309         dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
 310
 311         ret = wm8400_register_codec(wm8400);
 312         if (ret != 0) {
 313                 dev_err(wm8400->dev, "Failed to register codec\n");
 314                 goto err_children;
 315         }
 316
 317         if (pdata && pdata->platform_init) {
 318                 ret = pdata->platform_init(wm8400->dev);
 319                 if (ret != 0) {
 320                         dev_err(wm8400->dev, "Platform init failed: %d\n",
 321                                 ret);
 322                         goto err_children;
 323                 }
 324         } else
 325                 dev_warn(wm8400->dev, "No platform initialisation supplied\n");
 326
 327         return 0;
 328
 329 err_children:
 330         mfd_remove_devices(wm8400->dev);
 331         return ret;
 332 }
 333
 334 static void wm8400_release(struct wm8400 *wm8400)
 335 {
 336         mfd_remove_devices(wm8400->dev);
 337 }
 338
 339 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 340 static int wm8400_i2c_read(void *io_data, char reg, int count, u16 *dest)
 341 {
 342         struct i2c_client *i2c = io_data;
 343         struct i2c_msg xfer[2];
 344         int ret;
 345
 346         /* Write register */
 347         xfer[0].addr = i2c->addr;
 348         xfer[0].flags = 0;
 349         xfer[0].len = 1;
 350         xfer[0].buf = &reg;
 351
 352         /* Read data */
 353         xfer[1].addr = i2c->addr;
 354         xfer[1].flags = I2C_M_RD;
 355         xfer[1].len = count * sizeof(u16);
 356         xfer[1].buf = (u8 *)dest;
 357
 358         ret = i2c_transfer(i2c->adapter, xfer, 2);
 359         if (ret == 2)
 360                 ret = 0;
 361         else if (ret >= 0)
 362                 ret = -EIO;
 363
 364         return ret;
 365 }
 366
 367 static int wm8400_i2c_write(void *io_data, char reg, int count, const u16 *src)
 368 {
 369         struct i2c_client *i2c = io_data;
 370         u8 *msg;
 371         int ret;
 372
 373         /* We add 1 byte for device register - ideally I2C would gather. */
 374         msg = kmalloc((count * sizeof(u16)) + 1, GFP_KERNEL);
 375         if (msg == NULL)
 376                 return -ENOMEM;
 377
 378         msg[0] = reg;
 379         memcpy(&msg[1], src, count * sizeof(u16));
 380
 381         ret = i2c_master_send(i2c, msg, (count * sizeof(u16)) + 1);
 382
 383         if (ret == (count * 2) + 1)
 384                 ret = 0;
 385         else if (ret >= 0)
 386                 ret = -EIO;
 387
 388         kfree(msg);
 389
 390         return ret;
 391 }
 392
 393 static int wm8400_i2c_probe(struct i2c_client *i2c,
 394                             const struct i2c_device_id *id)
 395 {
 396         struct wm8400 *wm8400;
 397         int ret;
 398
 399         wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
 400         if (wm8400 == NULL) {
 401                 ret = -ENOMEM;
 402                 goto err;
 403         }
 404
 405         wm8400->io_data = i2c;
 406         wm8400->read_dev = wm8400_i2c_read;
 407         wm8400->write_dev = wm8400_i2c_write;
 408         wm8400->dev = &i2c->dev;
 409         i2c_set_clientdata(i2c, wm8400);
 410
 411         ret = wm8400_init(wm8400, i2c->dev.platform_data);
 412         if (ret != 0)
 413                 goto struct_err;
 414
 415         return 0;
 416
 417 struct_err:
 418         kfree(wm8400);
 419 err:
 420         return ret;
 421 }
 422
 423 static int wm8400_i2c_remove(struct i2c_client *i2c)
 424 {
 425         struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
 426
 427         wm8400_release(wm8400);
 428         kfree(wm8400);
 429
 430         return 0;
 431 }
 432
 433 static const struct i2c_device_id wm8400_i2c_id[] = {
 434        { "wm8400", 0 },
 435        { }
 436 };
 437 MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
 438
 439 static struct i2c_driver wm8400_i2c_driver = {
 440         .driver = {
 441                 .name = "WM8400",
 442                 .owner = THIS_MODULE,
 443         },
 444         .probe    = wm8400_i2c_probe,
 445         .remove   = wm8400_i2c_remove,
 446         .id_table = wm8400_i2c_id,
 447 };
 448 #endif
 449
 450 static int __init wm8400_module_init(void)
 451 {
 452         int ret = -ENODEV;
 453
 454 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 455         ret = i2c_add_driver(&wm8400_i2c_driver);
 456         if (ret != 0)
 457                 pr_err("Failed to register I2C driver: %d\n", ret);
 458 #endif
 459
 460         return ret;
 461 }
 462 subsys_initcall(wm8400_module_init);
 463
 464 static void __exit wm8400_module_exit(void)
 465 {
 466 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 467         i2c_del_driver(&wm8400_i2c_driver);
 468 #endif
 469 }
 470 module_exit(wm8400_module_exit);
 471
 472 MODULE_LICENSE("GPL");
 473 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");