Documentation/ABI/testing/sysfs-class-fpga-manager

   1 What:           /sys/class/fpga_manager/<fpga>/name
   2 Date:           August 2015
   3 KernelVersion:  4.3
   4 Contact:        Alan Tull <atull@opensource.altera.com>
   5 Description:    Name of low level fpga manager driver.
   6
   7 What:           /sys/class/fpga_manager/<fpga>/state
   8 Date:           August 2015
   9 KernelVersion:  4.3
  10 Contact:        Alan Tull <atull@opensource.altera.com>
  11 Description:    Read fpga manager state as a string.
  12                 The intent is to provide enough detail that if something goes
  13                 wrong during FPGA programming (something that the driver can't
  14                 fix) then userspace can know, i.e. if the firmware request
  15                 fails, that could be due to not being able to find the firmware
  16                 file.
  17
  18                 This is a superset of FPGA states and fpga manager driver
  19                 states.  The fpga manager driver is walking through these steps
  20                 to get the FPGA into a known operating state.  It's a sequence,
  21                 though some steps may get skipped.  Valid FPGA states will vary
  22                 by manufacturer; this is a superset.
  23
  24                 * unknown               = can't determine state
  25                 * power off             = FPGA power is off
  26                 * power up              = FPGA reports power is up
  27                 * reset                 = FPGA held in reset state
  28                 * firmware request      = firmware class request in progress
  29                 * firmware request error = firmware request failed
  30                 * write init            = preparing FPGA for programming
  31                 * write init error      = Error while preparing FPGA for
  32                                           programming
  33                 * write                 = FPGA ready to receive image data
  34                 * write error           = Error while programming
  35                 * write complete        = Doing post programming steps
  36                 * write complete error  = Error while doing post programming
  37                 * operating             = FPGA is programmed and operating