2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 #include <linux/clockchips.h>
10 #include <linux/cpu.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irqchip/mips-gic.h>
14 #include <linux/notifier.h>
15 #include <linux/of_irq.h>
16 #include <linux/percpu.h>
17 #include <linux/smp.h>
18 #include <linux/time.h>
20 static DEFINE_PER_CPU(struct clock_event_device
, gic_clockevent_device
);
21 static int gic_timer_irq
;
22 static unsigned int gic_frequency
;
24 static int gic_next_event(unsigned long delta
, struct clock_event_device
*evt
)
29 cnt
= gic_read_count();
31 gic_write_cpu_compare(cnt
, cpumask_first(evt
->cpumask
));
32 res
= ((int)(gic_read_count() - cnt
) >= 0) ? -ETIME
: 0;
36 static irqreturn_t
gic_compare_interrupt(int irq
, void *dev_id
)
38 struct clock_event_device
*cd
= dev_id
;
40 gic_write_compare(gic_read_compare());
41 cd
->event_handler(cd
);
45 struct irqaction gic_compare_irqaction
= {
46 .handler
= gic_compare_interrupt
,
47 .percpu_dev_id
= &gic_clockevent_device
,
48 .flags
= IRQF_PERCPU
| IRQF_TIMER
,
52 static void gic_clockevent_cpu_init(struct clock_event_device
*cd
)
54 unsigned int cpu
= smp_processor_id();
56 cd
->name
= "MIPS GIC";
57 cd
->features
= CLOCK_EVT_FEAT_ONESHOT
|
58 CLOCK_EVT_FEAT_C3STOP
;
61 cd
->irq
= gic_timer_irq
;
62 cd
->cpumask
= cpumask_of(cpu
);
63 cd
->set_next_event
= gic_next_event
;
65 clockevents_config_and_register(cd
, gic_frequency
, 0x300, 0x7fffffff);
67 enable_percpu_irq(gic_timer_irq
, IRQ_TYPE_NONE
);
70 static void gic_clockevent_cpu_exit(struct clock_event_device
*cd
)
72 disable_percpu_irq(gic_timer_irq
);
75 static void gic_update_frequency(void *data
)
77 unsigned long rate
= (unsigned long)data
;
79 clockevents_update_freq(this_cpu_ptr(&gic_clockevent_device
), rate
);
82 static int gic_cpu_notifier(struct notifier_block
*nb
, unsigned long action
,
85 switch (action
& ~CPU_TASKS_FROZEN
) {
87 gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device
));
90 gic_clockevent_cpu_exit(this_cpu_ptr(&gic_clockevent_device
));
97 static int gic_clk_notifier(struct notifier_block
*nb
, unsigned long action
,
100 struct clk_notifier_data
*cnd
= data
;
102 if (action
== POST_RATE_CHANGE
)
103 on_each_cpu(gic_update_frequency
, (void *)cnd
->new_rate
, 1);
109 static struct notifier_block gic_cpu_nb
= {
110 .notifier_call
= gic_cpu_notifier
,
113 static struct notifier_block gic_clk_nb
= {
114 .notifier_call
= gic_clk_notifier
,
117 static int gic_clockevent_init(void)
121 if (!cpu_has_counter
|| !gic_frequency
)
124 ret
= setup_percpu_irq(gic_timer_irq
, &gic_compare_irqaction
);
128 ret
= register_cpu_notifier(&gic_cpu_nb
);
130 pr_warn("GIC: Unable to register CPU notifier\n");
132 gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device
));
137 static cycle_t
gic_hpt_read(struct clocksource
*cs
)
139 return gic_read_count();
142 static struct clocksource gic_clocksource
= {
144 .read
= gic_hpt_read
,
145 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
146 .archdata
= { .vdso_clock_mode
= VDSO_CLOCK_GIC
},
149 static void __init
__gic_clocksource_init(void)
153 /* Set clocksource mask. */
154 gic_clocksource
.mask
= CLOCKSOURCE_MASK(gic_get_count_width());
156 /* Calculate a somewhat reasonable rating value. */
157 gic_clocksource
.rating
= 200 + gic_frequency
/ 10000000;
159 ret
= clocksource_register_hz(&gic_clocksource
, gic_frequency
);
161 pr_warn("GIC: Unable to register clocksource\n");
164 void __init
gic_clocksource_init(unsigned int frequency
)
166 gic_frequency
= frequency
;
167 gic_timer_irq
= MIPS_GIC_IRQ_BASE
+
168 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE
);
170 __gic_clocksource_init();
171 gic_clockevent_init();
173 /* And finally start the counter */
177 static void __init
gic_clocksource_of_init(struct device_node
*node
)
182 if (WARN_ON(!gic_present
|| !node
->parent
||
183 !of_device_is_compatible(node
->parent
, "mti,gic")))
186 clk
= of_clk_get(node
, 0);
188 if (clk_prepare_enable(clk
) < 0) {
189 pr_err("GIC failed to enable clock\n");
194 gic_frequency
= clk_get_rate(clk
);
195 } else if (of_property_read_u32(node
, "clock-frequency",
197 pr_err("GIC frequency not specified.\n");
200 gic_timer_irq
= irq_of_parse_and_map(node
, 0);
201 if (!gic_timer_irq
) {
202 pr_err("GIC timer IRQ not specified.\n");
206 __gic_clocksource_init();
208 ret
= gic_clockevent_init();
209 if (!ret
&& !IS_ERR(clk
)) {
210 if (clk_notifier_register(clk
, &gic_clk_nb
) < 0)
211 pr_warn("GIC: Unable to register clock notifier\n");
214 /* And finally start the counter */
217 CLOCKSOURCE_OF_DECLARE(mips_gic_timer
, "mti,gic-timer",
218 gic_clocksource_of_init
);