dm thin metadata: fix __udivdi3 undefined on 32-bit
[linux/fpc-iii.git] / drivers / gpio / gpio-vf610.c
blob87b950cec6ec929689a3d52b428f9224acebc623
1 /*
2 * vf610 GPIO support through PORT and GPIO module
4 * Copyright (c) 2014 Toradex AG.
6 * Author: Stefan Agner <stefan@agner.ch>.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/bitops.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/io.h>
24 #include <linux/ioport.h>
25 #include <linux/irq.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
28 #include <linux/of.h>
29 #include <linux/of_device.h>
30 #include <linux/of_irq.h>
32 #define VF610_GPIO_PER_PORT 32
34 struct vf610_gpio_port {
35 struct gpio_chip gc;
36 void __iomem *base;
37 void __iomem *gpio_base;
38 u8 irqc[VF610_GPIO_PER_PORT];
39 int irq;
42 #define GPIO_PDOR 0x00
43 #define GPIO_PSOR 0x04
44 #define GPIO_PCOR 0x08
45 #define GPIO_PTOR 0x0c
46 #define GPIO_PDIR 0x10
48 #define PORT_PCR(n) ((n) * 0x4)
49 #define PORT_PCR_IRQC_OFFSET 16
51 #define PORT_ISFR 0xa0
52 #define PORT_DFER 0xc0
53 #define PORT_DFCR 0xc4
54 #define PORT_DFWR 0xc8
56 #define PORT_INT_OFF 0x0
57 #define PORT_INT_LOGIC_ZERO 0x8
58 #define PORT_INT_RISING_EDGE 0x9
59 #define PORT_INT_FALLING_EDGE 0xa
60 #define PORT_INT_EITHER_EDGE 0xb
61 #define PORT_INT_LOGIC_ONE 0xc
63 static struct irq_chip vf610_gpio_irq_chip;
65 static struct vf610_gpio_port *to_vf610_gp(struct gpio_chip *gc)
67 return container_of(gc, struct vf610_gpio_port, gc);
70 static const struct of_device_id vf610_gpio_dt_ids[] = {
71 { .compatible = "fsl,vf610-gpio" },
72 { /* sentinel */ }
75 static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
77 writel_relaxed(val, reg);
80 static inline u32 vf610_gpio_readl(void __iomem *reg)
82 return readl_relaxed(reg);
85 static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
87 struct vf610_gpio_port *port = to_vf610_gp(gc);
89 return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio));
92 static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
94 struct vf610_gpio_port *port = to_vf610_gp(gc);
95 unsigned long mask = BIT(gpio);
97 if (val)
98 vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR);
99 else
100 vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR);
103 static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
105 return pinctrl_gpio_direction_input(chip->base + gpio);
108 static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
109 int value)
111 vf610_gpio_set(chip, gpio, value);
113 return pinctrl_gpio_direction_output(chip->base + gpio);
116 static void vf610_gpio_irq_handler(struct irq_desc *desc)
118 struct vf610_gpio_port *port =
119 to_vf610_gp(irq_desc_get_handler_data(desc));
120 struct irq_chip *chip = irq_desc_get_chip(desc);
121 int pin;
122 unsigned long irq_isfr;
124 chained_irq_enter(chip, desc);
126 irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
128 for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
129 vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
131 generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
134 chained_irq_exit(chip, desc);
137 static void vf610_gpio_irq_ack(struct irq_data *d)
139 struct vf610_gpio_port *port =
140 to_vf610_gp(irq_data_get_irq_chip_data(d));
141 int gpio = d->hwirq;
143 vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
146 static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
148 struct vf610_gpio_port *port =
149 to_vf610_gp(irq_data_get_irq_chip_data(d));
150 u8 irqc;
152 switch (type) {
153 case IRQ_TYPE_EDGE_RISING:
154 irqc = PORT_INT_RISING_EDGE;
155 break;
156 case IRQ_TYPE_EDGE_FALLING:
157 irqc = PORT_INT_FALLING_EDGE;
158 break;
159 case IRQ_TYPE_EDGE_BOTH:
160 irqc = PORT_INT_EITHER_EDGE;
161 break;
162 case IRQ_TYPE_LEVEL_LOW:
163 irqc = PORT_INT_LOGIC_ZERO;
164 break;
165 case IRQ_TYPE_LEVEL_HIGH:
166 irqc = PORT_INT_LOGIC_ONE;
167 break;
168 default:
169 return -EINVAL;
172 port->irqc[d->hwirq] = irqc;
174 if (type & IRQ_TYPE_LEVEL_MASK)
175 irq_set_handler_locked(d, handle_level_irq);
176 else
177 irq_set_handler_locked(d, handle_edge_irq);
179 return 0;
182 static void vf610_gpio_irq_mask(struct irq_data *d)
184 struct vf610_gpio_port *port =
185 to_vf610_gp(irq_data_get_irq_chip_data(d));
186 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
188 vf610_gpio_writel(0, pcr_base);
191 static void vf610_gpio_irq_unmask(struct irq_data *d)
193 struct vf610_gpio_port *port =
194 to_vf610_gp(irq_data_get_irq_chip_data(d));
195 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
197 vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
198 pcr_base);
201 static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
203 struct vf610_gpio_port *port =
204 to_vf610_gp(irq_data_get_irq_chip_data(d));
206 if (enable)
207 enable_irq_wake(port->irq);
208 else
209 disable_irq_wake(port->irq);
211 return 0;
214 static struct irq_chip vf610_gpio_irq_chip = {
215 .name = "gpio-vf610",
216 .irq_ack = vf610_gpio_irq_ack,
217 .irq_mask = vf610_gpio_irq_mask,
218 .irq_unmask = vf610_gpio_irq_unmask,
219 .irq_set_type = vf610_gpio_irq_set_type,
220 .irq_set_wake = vf610_gpio_irq_set_wake,
223 static int vf610_gpio_probe(struct platform_device *pdev)
225 struct device *dev = &pdev->dev;
226 struct device_node *np = dev->of_node;
227 struct vf610_gpio_port *port;
228 struct resource *iores;
229 struct gpio_chip *gc;
230 int ret;
232 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
233 if (!port)
234 return -ENOMEM;
236 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
237 port->base = devm_ioremap_resource(dev, iores);
238 if (IS_ERR(port->base))
239 return PTR_ERR(port->base);
241 iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
242 port->gpio_base = devm_ioremap_resource(dev, iores);
243 if (IS_ERR(port->gpio_base))
244 return PTR_ERR(port->gpio_base);
246 port->irq = platform_get_irq(pdev, 0);
247 if (port->irq < 0)
248 return port->irq;
250 gc = &port->gc;
251 gc->of_node = np;
252 gc->dev = dev;
253 gc->label = "vf610-gpio";
254 gc->ngpio = VF610_GPIO_PER_PORT;
255 gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
257 gc->request = gpiochip_generic_request;
258 gc->free = gpiochip_generic_free;
259 gc->direction_input = vf610_gpio_direction_input;
260 gc->get = vf610_gpio_get;
261 gc->direction_output = vf610_gpio_direction_output;
262 gc->set = vf610_gpio_set;
264 ret = gpiochip_add(gc);
265 if (ret < 0)
266 return ret;
268 /* Clear the interrupt status register for all GPIO's */
269 vf610_gpio_writel(~0, port->base + PORT_ISFR);
271 ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0,
272 handle_edge_irq, IRQ_TYPE_NONE);
273 if (ret) {
274 dev_err(dev, "failed to add irqchip\n");
275 gpiochip_remove(gc);
276 return ret;
278 gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq,
279 vf610_gpio_irq_handler);
281 return 0;
284 static struct platform_driver vf610_gpio_driver = {
285 .driver = {
286 .name = "gpio-vf610",
287 .of_match_table = vf610_gpio_dt_ids,
289 .probe = vf610_gpio_probe,
292 static int __init gpio_vf610_init(void)
294 return platform_driver_register(&vf610_gpio_driver);
296 device_initcall(gpio_vf610_init);
298 MODULE_AUTHOR("Stefan Agner <stefan@agner.ch>");
299 MODULE_DESCRIPTION("Freescale VF610 GPIO");
300 MODULE_LICENSE("GPL v2");