dm thin metadata: fix __udivdi3 undefined on 32-bit
[linux/fpc-iii.git] / drivers / i2c / busses / i2c-sibyte.c
blob2b6219d86b0f31372ecceea15a6a8e29966f8eae
1 /*
2 * Copyright (C) 2004 Steven J. Hill
3 * Copyright (C) 2001,2002,2003 Broadcom Corporation
4 * Copyright (C) 1995-2000 Simon G. Vogl
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/i2c.h>
21 #include <linux/io.h>
22 #include <asm/sibyte/sb1250_regs.h>
23 #include <asm/sibyte/sb1250_smbus.h>
26 struct i2c_algo_sibyte_data {
27 void *data; /* private data */
28 int bus; /* which bus */
29 void *reg_base; /* CSR base */
32 /* ----- global defines ----------------------------------------------- */
33 #define SMB_CSR(a,r) ((long)(a->reg_base + r))
36 static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
37 unsigned short flags, char read_write,
38 u8 command, int size, union i2c_smbus_data * data)
40 struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;
41 int data_bytes = 0;
42 int error;
44 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
47 switch (size) {
48 case I2C_SMBUS_QUICK:
49 csr_out32((V_SMB_ADDR(addr) |
50 (read_write == I2C_SMBUS_READ ? M_SMB_QDATA : 0) |
51 V_SMB_TT_QUICKCMD), SMB_CSR(adap, R_SMB_START));
52 break;
53 case I2C_SMBUS_BYTE:
54 if (read_write == I2C_SMBUS_READ) {
55 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_RD1BYTE),
56 SMB_CSR(adap, R_SMB_START));
57 data_bytes = 1;
58 } else {
59 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
60 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR1BYTE),
61 SMB_CSR(adap, R_SMB_START));
63 break;
64 case I2C_SMBUS_BYTE_DATA:
65 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
66 if (read_write == I2C_SMBUS_READ) {
67 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD1BYTE),
68 SMB_CSR(adap, R_SMB_START));
69 data_bytes = 1;
70 } else {
71 csr_out32(V_SMB_LB(data->byte),
72 SMB_CSR(adap, R_SMB_DATA));
73 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
74 SMB_CSR(adap, R_SMB_START));
76 break;
77 case I2C_SMBUS_WORD_DATA:
78 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
79 if (read_write == I2C_SMBUS_READ) {
80 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD2BYTE),
81 SMB_CSR(adap, R_SMB_START));
82 data_bytes = 2;
83 } else {
84 csr_out32(V_SMB_LB(data->word & 0xff),
85 SMB_CSR(adap, R_SMB_DATA));
86 csr_out32(V_SMB_MB(data->word >> 8),
87 SMB_CSR(adap, R_SMB_DATA));
88 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
89 SMB_CSR(adap, R_SMB_START));
91 break;
92 default:
93 return -EOPNOTSUPP;
96 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
99 error = csr_in32(SMB_CSR(adap, R_SMB_STATUS));
100 if (error & M_SMB_ERROR) {
101 /* Clear error bit by writing a 1 */
102 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS));
103 return (error & M_SMB_ERROR_TYPE) ? -EIO : -ENXIO;
106 if (data_bytes == 1)
107 data->byte = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xff;
108 if (data_bytes == 2)
109 data->word = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xffff;
111 return 0;
114 static u32 bit_func(struct i2c_adapter *adap)
116 return (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
117 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA);
121 /* -----exported algorithm data: ------------------------------------- */
123 static const struct i2c_algorithm i2c_sibyte_algo = {
124 .smbus_xfer = smbus_xfer,
125 .functionality = bit_func,
129 * registering functions to load algorithms at runtime
131 static int __init i2c_sibyte_add_bus(struct i2c_adapter *i2c_adap, int speed)
133 struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;
135 /* Register new adapter to i2c module... */
136 i2c_adap->algo = &i2c_sibyte_algo;
138 /* Set the requested frequency. */
139 csr_out32(speed, SMB_CSR(adap,R_SMB_FREQ));
140 csr_out32(0, SMB_CSR(adap,R_SMB_CONTROL));
142 return i2c_add_numbered_adapter(i2c_adap);
146 static struct i2c_algo_sibyte_data sibyte_board_data[2] = {
147 { NULL, 0, (void *) (CKSEG1+A_SMB_BASE(0)) },
148 { NULL, 1, (void *) (CKSEG1+A_SMB_BASE(1)) }
151 static struct i2c_adapter sibyte_board_adapter[2] = {
153 .owner = THIS_MODULE,
154 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
155 .algo = NULL,
156 .algo_data = &sibyte_board_data[0],
157 .nr = 0,
158 .name = "SiByte SMBus 0",
161 .owner = THIS_MODULE,
162 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
163 .algo = NULL,
164 .algo_data = &sibyte_board_data[1],
165 .nr = 1,
166 .name = "SiByte SMBus 1",
170 static int __init i2c_sibyte_init(void)
172 pr_info("i2c-sibyte: i2c SMBus adapter module for SiByte board\n");
173 if (i2c_sibyte_add_bus(&sibyte_board_adapter[0], K_SMB_FREQ_100KHZ) < 0)
174 return -ENODEV;
175 if (i2c_sibyte_add_bus(&sibyte_board_adapter[1],
176 K_SMB_FREQ_400KHZ) < 0) {
177 i2c_del_adapter(&sibyte_board_adapter[0]);
178 return -ENODEV;
180 return 0;
183 static void __exit i2c_sibyte_exit(void)
185 i2c_del_adapter(&sibyte_board_adapter[0]);
186 i2c_del_adapter(&sibyte_board_adapter[1]);
189 module_init(i2c_sibyte_init);
190 module_exit(i2c_sibyte_exit);
192 MODULE_AUTHOR("Kip Walker (Broadcom Corp.), Steven J. Hill <sjhill@realitydiluted.com>");
193 MODULE_DESCRIPTION("SMBus adapter routines for SiByte boards");
194 MODULE_LICENSE("GPL");