?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
dm thin metadata: fix __udivdi3 undefined on 32-bit
[linux/fpc-iii.git] / drivers / mmc / host / rtsx_usb_sdmmc.c
blobda9f71b8deb0b3fa423437d16cbae53658fd4c50
1 /* Realtek USB SD/MMC Card Interface driver
2 *
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, see <http://www.gnu.org/licenses/>.
16 *
17 * Author:
18 * Roger Tseng <rogerable@realtek.com>
19 */
20
21 #include <linux/module.h>
22 #include <linux/slab.h>
23 #include <linux/delay.h>
24 #include <linux/platform_device.h>
25 #include <linux/usb.h>
26 #include <linux/mmc/host.h>
27 #include <linux/mmc/mmc.h>
28 #include <linux/mmc/sd.h>
29 #include <linux/mmc/sdio.h>
30 #include <linux/mmc/card.h>
31 #include <linux/scatterlist.h>
32 #include <linux/pm_runtime.h>
33
34 #include <linux/mfd/rtsx_usb.h>
35 #include <asm/unaligned.h>
36
37 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
38 defined(CONFIG_MMC_REALTEK_USB_MODULE))
39 #include <linux/leds.h>
40 #include <linux/workqueue.h>
41 #define RTSX_USB_USE_LEDS_CLASS
42 #endif
43
44 struct rtsx_usb_sdmmc {
45 struct platform_device *pdev;
46 struct rtsx_ucr *ucr;
47 struct mmc_host *mmc;
48 struct mmc_request *mrq;
49
50 struct mutex host_mutex;
51
52 u8 ssc_depth;
53 unsigned int clock;
54 bool vpclk;
55 bool double_clk;
56 bool host_removal;
57 bool card_exist;
58 bool initial_mode;
59 bool ddr_mode;
60
61 unsigned char power_mode;
62
63 #ifdef RTSX_USB_USE_LEDS_CLASS
64 struct led_classdev led;
65 char led_name[32];
66 struct work_struct led_work;
67 #endif
68 };
69
70 static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
71 {
72 return &(host->pdev->dev);
73 }
74
75 static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
76 {
77 struct rtsx_ucr *ucr = host->ucr;
78 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
79 SD_STOP | SD_CLR_ERR,
80 SD_STOP | SD_CLR_ERR);
81
82 rtsx_usb_clear_dma_err(ucr);
83 rtsx_usb_clear_fsm_err(ucr);
84 }
85
86 #ifdef DEBUG
87 static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
88 {
89 struct rtsx_ucr *ucr = host->ucr;
90 u8 val = 0;
91
92 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
93 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
94 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
95 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
96 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
97 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
98 }
99 #else
100 #define sd_print_debug_regs(host)
101 #endif /* DEBUG */
102
103 static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
104 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
105 {
106 struct rtsx_ucr *ucr = host->ucr;
107 int err;
108 u8 trans_mode;
109
110 if (!buf)
111 buf_len = 0;
112
113 rtsx_usb_init_cmd(ucr);
114 if (cmd != NULL) {
115 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
116 , cmd->opcode);
117 if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
118 trans_mode = SD_TM_AUTO_TUNING;
119 else
120 trans_mode = SD_TM_NORMAL_READ;
121
122 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
123 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
124 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
125 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
127 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
129 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
130 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
131 SD_CMD4, 0xFF, (u8)cmd->arg);
132 } else {
133 trans_mode = SD_TM_AUTO_READ_3;
134 }
135
136 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
137 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
138 0xFF, (u8)(byte_cnt >> 8));
139 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
140 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
141
142 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
143 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
144 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
145 if (trans_mode != SD_TM_AUTO_TUNING)
146 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
147 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
148
149 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
150 0xFF, trans_mode | SD_TRANSFER_START);
151 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
152 SD_TRANSFER_END, SD_TRANSFER_END);
153
154 if (cmd != NULL) {
155 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
156 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
157 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
158 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
159 }
160
161 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
162 if (err) {
163 dev_dbg(sdmmc_dev(host),
164 "rtsx_usb_send_cmd failed (err = %d)\n", err);
165 return err;
166 }
167
168 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
169 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
170 sd_print_debug_regs(host);
171
172 if (!err) {
173 dev_dbg(sdmmc_dev(host),
174 "Transfer failed (SD_TRANSFER = %02x)\n",
175 ucr->rsp_buf[0]);
176 err = -EIO;
177 } else {
178 dev_dbg(sdmmc_dev(host),
179 "rtsx_usb_get_rsp failed (err = %d)\n", err);
180 }
181
182 return err;
183 }
184
185 if (cmd != NULL) {
186 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
187 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
188 cmd->resp[0]);
189 }
190
191 if (buf && buf_len) {
192 /* 2-byte aligned part */
193 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
194 if (err) {
195 dev_dbg(sdmmc_dev(host),
196 "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
197 return err;
198 }
199
200 /* unaligned byte */
201 if (byte_cnt % 2)
202 return rtsx_usb_read_register(ucr,
203 PPBUF_BASE2 + byte_cnt,
204 buf + byte_cnt - 1);
205 }
206
207 return 0;
208 }
209
210 static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
211 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
212 {
213 struct rtsx_ucr *ucr = host->ucr;
214 int err;
215 u8 trans_mode;
216
217 if (!buf)
218 buf_len = 0;
219
220 if (buf && buf_len) {
221 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
222 if (err) {
223 dev_dbg(sdmmc_dev(host),
224 "rtsx_usb_write_ppbuf failed (err = %d)\n",
225 err);
226 return err;
227 }
228 }
229
230 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
231 rtsx_usb_init_cmd(ucr);
232
233 if (cmd != NULL) {
234 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
235 cmd->opcode);
236 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
237 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
239 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
241 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
242 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
243 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
244 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
245 SD_CMD4, 0xFF, (u8)cmd->arg);
246 }
247
248 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
250 0xFF, (u8)(byte_cnt >> 8));
251 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
252 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
253
254 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
255 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
256 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
257 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
258 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
259
260 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
261 trans_mode | SD_TRANSFER_START);
262 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
263 SD_TRANSFER_END, SD_TRANSFER_END);
264
265 if (cmd != NULL) {
266 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
267 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
268 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
269 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
270 }
271
272 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
273 if (err) {
274 dev_dbg(sdmmc_dev(host),
275 "rtsx_usb_send_cmd failed (err = %d)\n", err);
276 return err;
277 }
278
279 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
280 if (err) {
281 sd_print_debug_regs(host);
282 dev_dbg(sdmmc_dev(host),
283 "rtsx_usb_get_rsp failed (err = %d)\n", err);
284 return err;
285 }
286
287 if (cmd != NULL) {
288 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
289 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
290 cmd->resp[0]);
291 }
292
293 return 0;
294 }
295
296 static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
297 struct mmc_command *cmd)
298 {
299 struct rtsx_ucr *ucr = host->ucr;
300 u8 cmd_idx = (u8)cmd->opcode;
301 u32 arg = cmd->arg;
302 int err = 0;
303 int timeout = 100;
304 int i;
305 u8 *ptr;
306 int stat_idx = 0;
307 int len = 2;
308 u8 rsp_type;
309
310 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
311 __func__, cmd_idx, arg);
312
313 /* Response type:
314 * R0
315 * R1, R5, R6, R7
316 * R1b
317 * R2
318 * R3, R4
319 */
320 switch (mmc_resp_type(cmd)) {
321 case MMC_RSP_NONE:
322 rsp_type = SD_RSP_TYPE_R0;
323 break;
324 case MMC_RSP_R1:
325 rsp_type = SD_RSP_TYPE_R1;
326 break;
327 case MMC_RSP_R1 & ~MMC_RSP_CRC:
328 rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
329 break;
330 case MMC_RSP_R1B:
331 rsp_type = SD_RSP_TYPE_R1b;
332 break;
333 case MMC_RSP_R2:
334 rsp_type = SD_RSP_TYPE_R2;
335 break;
336 case MMC_RSP_R3:
337 rsp_type = SD_RSP_TYPE_R3;
338 break;
339 default:
340 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
341 err = -EINVAL;
342 goto out;
343 }
344
345 if (rsp_type == SD_RSP_TYPE_R1b)
346 timeout = 3000;
347
348 if (cmd->opcode == SD_SWITCH_VOLTAGE) {
349 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
350 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
351 SD_CLK_TOGGLE_EN);
352 if (err)
353 goto out;
354 }
355
356 rtsx_usb_init_cmd(ucr);
357
358 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
359 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
360 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
361 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
362 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
363
364 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
365 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
366 0x01, PINGPONG_BUFFER);
367 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
368 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
369 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
370 SD_TRANSFER_END | SD_STAT_IDLE,
371 SD_TRANSFER_END | SD_STAT_IDLE);
372
373 if (rsp_type == SD_RSP_TYPE_R2) {
374 /* Read data from ping-pong buffer */
375 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
376 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
377 stat_idx = 16;
378 } else if (rsp_type != SD_RSP_TYPE_R0) {
379 /* Read data from SD_CMDx registers */
380 for (i = SD_CMD0; i <= SD_CMD4; i++)
381 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
382 stat_idx = 5;
383 }
384 len += stat_idx;
385
386 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
387
388 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
389 if (err) {
390 dev_dbg(sdmmc_dev(host),
391 "rtsx_usb_send_cmd error (err = %d)\n", err);
392 goto out;
393 }
394
395 err = rtsx_usb_get_rsp(ucr, len, timeout);
396 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
397 sd_print_debug_regs(host);
398 sd_clear_error(host);
399
400 if (!err) {
401 dev_dbg(sdmmc_dev(host),
402 "Transfer failed (SD_TRANSFER = %02x)\n",
403 ucr->rsp_buf[0]);
404 err = -EIO;
405 } else {
406 dev_dbg(sdmmc_dev(host),
407 "rtsx_usb_get_rsp failed (err = %d)\n", err);
408 }
409
410 goto out;
411 }
412
413 if (rsp_type == SD_RSP_TYPE_R0) {
414 err = 0;
415 goto out;
416 }
417
418 /* Skip result of CHECK_REG_CMD */
419 ptr = ucr->rsp_buf + 1;
420
421 /* Check (Start,Transmission) bit of Response */
422 if ((ptr[0] & 0xC0) != 0) {
423 err = -EILSEQ;
424 dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
425 goto out;
426 }
427
428 /* Check CRC7 */
429 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
430 if (ptr[stat_idx] & SD_CRC7_ERR) {
431 err = -EILSEQ;
432 dev_dbg(sdmmc_dev(host), "CRC7 error\n");
433 goto out;
434 }
435 }
436
437 if (rsp_type == SD_RSP_TYPE_R2) {
438 /*
439 * The controller offloads the last byte {CRC-7, end bit 1'b1}
440 * of response type R2. Assign dummy CRC, 0, and end bit to the
441 * byte(ptr[16], goes into the LSB of resp[3] later).
442 */
443 ptr[16] = 1;
444
445 for (i = 0; i < 4; i++) {
446 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
447 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
448 i, cmd->resp[i]);
449 }
450 } else {
451 cmd->resp[0] = get_unaligned_be32(ptr + 1);
452 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
453 cmd->resp[0]);
454 }
455
456 out:
457 cmd->error = err;
458 }
459
460 static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
461 {
462 struct rtsx_ucr *ucr = host->ucr;
463 struct mmc_data *data = mrq->data;
464 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
465 u8 cfg2, trans_mode;
466 int err;
467 u8 flag;
468 size_t data_len = data->blksz * data->blocks;
469 unsigned int pipe;
470
471 if (read) {
472 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
473 __func__, data_len);
474 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
475 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
476 trans_mode = SD_TM_AUTO_READ_3;
477 } else {
478 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
479 __func__, data_len);
480 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
481 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
482 trans_mode = SD_TM_AUTO_WRITE_3;
483 }
484
485 rtsx_usb_init_cmd(ucr);
486
487 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
488 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
489 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
490 0xFF, (u8)data->blocks);
491 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
492 0xFF, (u8)(data->blocks >> 8));
493
494 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
495 0x01, RING_BUFFER);
496
497 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
498 0xFF, (u8)(data_len >> 24));
499 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
500 0xFF, (u8)(data_len >> 16));
501 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
502 0xFF, (u8)(data_len >> 8));
503 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
504 0xFF, (u8)data_len);
505 if (read) {
506 flag = MODE_CDIR;
507 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
508 0x03 | DMA_PACK_SIZE_MASK,
509 DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
510 } else {
511 flag = MODE_CDOR;
512 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
513 0x03 | DMA_PACK_SIZE_MASK,
514 DMA_DIR_TO_CARD | DMA_EN | DMA_512);
515 }
516
517 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
518 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
519 trans_mode | SD_TRANSFER_START);
520 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
521 SD_TRANSFER_END, SD_TRANSFER_END);
522
523 err = rtsx_usb_send_cmd(ucr, flag, 100);
524 if (err)
525 return err;
526
527 if (read)
528 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
529 else
530 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
531
532 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
533 data->sg_len, NULL, 10000);
534 if (err) {
535 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
536 , err);
537 sd_clear_error(host);
538 return err;
539 }
540
541 return rtsx_usb_get_rsp(ucr, 1, 2000);
542 }
543
544 static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
545 {
546 rtsx_usb_write_register(host->ucr, SD_CFG1,
547 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
548 }
549
550 static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
551 {
552 rtsx_usb_write_register(host->ucr, SD_CFG1,
553 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
554 }
555
556 static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
557 struct mmc_request *mrq)
558 {
559 struct mmc_command *cmd = mrq->cmd;
560 struct mmc_data *data = mrq->data;
561 u8 *buf;
562
563 buf = kzalloc(data->blksz, GFP_NOIO);
564 if (!buf) {
565 cmd->error = -ENOMEM;
566 return;
567 }
568
569 if (data->flags & MMC_DATA_READ) {
570 if (host->initial_mode)
571 sd_disable_initial_mode(host);
572
573 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
574 data->blksz, 200);
575
576 if (host->initial_mode)
577 sd_enable_initial_mode(host);
578
579 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
580 } else {
581 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
582
583 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
584 data->blksz, 200);
585 }
586
587 kfree(buf);
588 }
589
590 static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
591 {
592 struct rtsx_ucr *ucr = host->ucr;
593 int err;
594
595 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
596 __func__, tx ? "TX" : "RX", sample_point);
597
598 rtsx_usb_init_cmd(ucr);
599
600 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
601
602 if (tx)
603 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
604 0x0F, sample_point);
605 else
606 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
607 0x0F, sample_point);
608
609 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
610 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
611 PHASE_NOT_RESET, PHASE_NOT_RESET);
612 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
613 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
614
615 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
616 if (err)
617 return err;
618
619 return 0;
620 }
621
622 static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
623 {
624 idx &= MAX_PHASE;
625 return phase_map & (1 << idx);
626 }
627
628 static int get_phase_len(u32 phase_map, unsigned int idx)
629 {
630 int i;
631
632 for (i = 0; i < MAX_PHASE + 1; i++) {
633 if (get_phase_point(phase_map, idx + i) == 0)
634 return i;
635 }
636 return MAX_PHASE + 1;
637 }
638
639 static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
640 {
641 int start = 0, len = 0;
642 int start_final = 0, len_final = 0;
643 u8 final_phase = 0xFF;
644
645 if (phase_map == 0) {
646 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
647 return final_phase;
648 }
649
650 while (start < MAX_PHASE + 1) {
651 len = get_phase_len(phase_map, start);
652 if (len_final < len) {
653 start_final = start;
654 len_final = len;
655 }
656 start += len ? len : 1;
657 }
658
659 final_phase = (start_final + len_final / 2) & MAX_PHASE;
660 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
661 phase_map, len_final, final_phase);
662
663 return final_phase;
664 }
665
666 static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
667 {
668 int err, i;
669 u8 val = 0;
670
671 for (i = 0; i < 100; i++) {
672 err = rtsx_usb_ep0_read_register(host->ucr,
673 SD_DATA_STATE, &val);
674 if (val & SD_DATA_IDLE)
675 return;
676
677 usleep_range(100, 1000);
678 }
679 }
680
681 static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
682 u8 opcode, u8 sample_point)
683 {
684 int err;
685 struct mmc_command cmd = {0};
686
687 err = sd_change_phase(host, sample_point, 0);
688 if (err)
689 return err;
690
691 cmd.opcode = MMC_SEND_TUNING_BLOCK;
692 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
693 if (err) {
694 /* Wait till SD DATA IDLE */
695 sd_wait_data_idle(host);
696 sd_clear_error(host);
697 return err;
698 }
699
700 return 0;
701 }
702
703 static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
704 u8 opcode, u16 *phase_map)
705 {
706 int err, i;
707 u16 raw_phase_map = 0;
708
709 for (i = MAX_PHASE; i >= 0; i--) {
710 err = sd_tuning_rx_cmd(host, opcode, (u8)i);
711 if (!err)
712 raw_phase_map |= 1 << i;
713 }
714
715 if (phase_map)
716 *phase_map = raw_phase_map;
717 }
718
719 static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
720 {
721 int err, i;
722 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
723 u8 final_phase;
724
725 /* setting fixed default TX phase */
726 err = sd_change_phase(host, 0x01, 1);
727 if (err) {
728 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
729 return err;
730 }
731
732 /* tuning RX phase */
733 for (i = 0; i < RX_TUNING_CNT; i++) {
734 sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
735
736 if (raw_phase_map[i] == 0)
737 break;
738 }
739
740 phase_map = 0xFFFF;
741 for (i = 0; i < RX_TUNING_CNT; i++) {
742 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
743 i, raw_phase_map[i]);
744 phase_map &= raw_phase_map[i];
745 }
746 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
747
748 if (phase_map) {
749 final_phase = sd_search_final_phase(host, phase_map);
750 if (final_phase == 0xFF)
751 return -EINVAL;
752
753 err = sd_change_phase(host, final_phase, 0);
754 if (err)
755 return err;
756 } else {
757 return -EINVAL;
758 }
759
760 return 0;
761 }
762
763 static int sdmmc_get_ro(struct mmc_host *mmc)
764 {
765 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
766 struct rtsx_ucr *ucr = host->ucr;
767 int err;
768 u16 val;
769
770 if (host->host_removal)
771 return -ENOMEDIUM;
772
773 mutex_lock(&ucr->dev_mutex);
774
775 /* Check SD card detect */
776 err = rtsx_usb_get_card_status(ucr, &val);
777
778 mutex_unlock(&ucr->dev_mutex);
779
780
781 /* Treat failed detection as non-ro */
782 if (err)
783 return 0;
784
785 if (val & SD_WP)
786 return 1;
787
788 return 0;
789 }
790
791 static int sdmmc_get_cd(struct mmc_host *mmc)
792 {
793 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
794 struct rtsx_ucr *ucr = host->ucr;
795 int err;
796 u16 val;
797
798 if (host->host_removal)
799 return -ENOMEDIUM;
800
801 mutex_lock(&ucr->dev_mutex);
802
803 /* Check SD card detect */
804 err = rtsx_usb_get_card_status(ucr, &val);
805
806 mutex_unlock(&ucr->dev_mutex);
807
808 /* Treat failed detection as non-exist */
809 if (err)
810 goto no_card;
811
812 if (val & SD_CD) {
813 host->card_exist = true;
814 return 1;
815 }
816
817 no_card:
818 host->card_exist = false;
819 return 0;
820 }
821
822 static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
823 {
824 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
825 struct rtsx_ucr *ucr = host->ucr;
826 struct mmc_command *cmd = mrq->cmd;
827 struct mmc_data *data = mrq->data;
828 unsigned int data_size = 0;
829
830 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
831
832 if (host->host_removal) {
833 cmd->error = -ENOMEDIUM;
834 goto finish;
835 }
836
837 if ((!host->card_exist)) {
838 cmd->error = -ENOMEDIUM;
839 goto finish_detect_card;
840 }
841
842 /*
843 * Reject SDIO CMDs to speed up card identification
844 * since unsupported
845 */
846 if (cmd->opcode == SD_IO_SEND_OP_COND ||
847 cmd->opcode == SD_IO_RW_DIRECT ||
848 cmd->opcode == SD_IO_RW_EXTENDED) {
849 cmd->error = -EINVAL;
850 goto finish;
851 }
852
853 mutex_lock(&ucr->dev_mutex);
854
855 mutex_lock(&host->host_mutex);
856 host->mrq = mrq;
857 mutex_unlock(&host->host_mutex);
858
859 if (mrq->data)
860 data_size = data->blocks * data->blksz;
861
862 if (!data_size) {
863 sd_send_cmd_get_rsp(host, cmd);
864 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
865 mmc_op_multi(cmd->opcode)) {
866 sd_send_cmd_get_rsp(host, cmd);
867
868 if (!cmd->error) {
869 sd_rw_multi(host, mrq);
870
871 if (mmc_op_multi(cmd->opcode) && mrq->stop) {
872 sd_send_cmd_get_rsp(host, mrq->stop);
873 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
874 FIFO_FLUSH, FIFO_FLUSH);
875 }
876 }
877 } else {
878 sd_normal_rw(host, mrq);
879 }
880
881 if (mrq->data) {
882 if (cmd->error || data->error)
883 data->bytes_xfered = 0;
884 else
885 data->bytes_xfered = data->blocks * data->blksz;
886 }
887
888 mutex_unlock(&ucr->dev_mutex);
889
890 finish_detect_card:
891 if (cmd->error) {
892 /*
893 * detect card when fail to update card existence state and
894 * speed up card removal when retry
895 */
896 sdmmc_get_cd(mmc);
897 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
898 }
899
900 finish:
901 mutex_lock(&host->host_mutex);
902 host->mrq = NULL;
903 mutex_unlock(&host->host_mutex);
904
905 mmc_request_done(mmc, mrq);
906 }
907
908 static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
909 unsigned char bus_width)
910 {
911 int err = 0;
912 u8 width[] = {
913 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
914 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
915 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
916 };
917
918 if (bus_width <= MMC_BUS_WIDTH_8)
919 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
920 0x03, width[bus_width]);
921
922 return err;
923 }
924
925 static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
926 {
927 rtsx_usb_init_cmd(ucr);
928
929 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
930 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
931 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
932 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
933 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
934 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
935
936 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
937 }
938
939 static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
940 {
941 rtsx_usb_init_cmd(ucr);
942
943 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
944 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
945 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
946 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
947 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
948 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
949
950 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
951 }
952
953 static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
954 {
955 rtsx_usb_init_cmd(ucr);
956
957 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
958 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
959 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
960 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
961 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
962 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
963
964 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
965 }
966
967 static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
968 {
969 rtsx_usb_init_cmd(ucr);
970
971 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
972 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
973 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
974 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
975 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
976 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
977
978 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
979 }
980
981 static int sd_power_on(struct rtsx_usb_sdmmc *host)
982 {
983 struct rtsx_ucr *ucr = host->ucr;
984 int err;
985
986 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
987 rtsx_usb_init_cmd(ucr);
988 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
989 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
990 CARD_SHARE_MASK, CARD_SHARE_SD);
991 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
992 SD_CLK_EN, SD_CLK_EN);
993 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
994 if (err)
995 return err;
996
997 if (CHECK_PKG(ucr, LQFP48))
998 err = sd_pull_ctl_enable_lqfp48(ucr);
999 else
1000 err = sd_pull_ctl_enable_qfn24(ucr);
1001 if (err)
1002 return err;
1003
1004 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
1005 POWER_MASK, PARTIAL_POWER_ON);
1006 if (err)
1007 return err;
1008
1009 usleep_range(800, 1000);
1010
1011 rtsx_usb_init_cmd(ucr);
1012 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1013 POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
1014 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
1015 SD_OUTPUT_EN, SD_OUTPUT_EN);
1016
1017 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
1018 }
1019
1020 static int sd_power_off(struct rtsx_usb_sdmmc *host)
1021 {
1022 struct rtsx_ucr *ucr = host->ucr;
1023 int err;
1024
1025 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1026 rtsx_usb_init_cmd(ucr);
1027
1028 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1029 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1030 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1031 POWER_MASK, POWER_OFF);
1032 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1033 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
1034
1035 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1036 if (err)
1037 return err;
1038
1039 if (CHECK_PKG(ucr, LQFP48))
1040 return sd_pull_ctl_disable_lqfp48(ucr);
1041 return sd_pull_ctl_disable_qfn24(ucr);
1042 }
1043
1044 static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
1045 unsigned char power_mode)
1046 {
1047 int err;
1048
1049 if (power_mode != MMC_POWER_OFF)
1050 power_mode = MMC_POWER_ON;
1051
1052 if (power_mode == host->power_mode)
1053 return 0;
1054
1055 if (power_mode == MMC_POWER_OFF) {
1056 err = sd_power_off(host);
1057 pm_runtime_put(sdmmc_dev(host));
1058 } else {
1059 pm_runtime_get_sync(sdmmc_dev(host));
1060 err = sd_power_on(host);
1061 }
1062
1063 if (!err)
1064 host->power_mode = power_mode;
1065
1066 return err;
1067 }
1068
1069 static int sd_set_timing(struct rtsx_usb_sdmmc *host,
1070 unsigned char timing, bool *ddr_mode)
1071 {
1072 struct rtsx_ucr *ucr = host->ucr;
1073 int err;
1074
1075 *ddr_mode = false;
1076
1077 rtsx_usb_init_cmd(ucr);
1078
1079 switch (timing) {
1080 case MMC_TIMING_UHS_SDR104:
1081 case MMC_TIMING_UHS_SDR50:
1082 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1083 0x0C | SD_ASYNC_FIFO_RST,
1084 SD_30_MODE | SD_ASYNC_FIFO_RST);
1085 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1086 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1087 break;
1088
1089 case MMC_TIMING_UHS_DDR50:
1090 *ddr_mode = true;
1091
1092 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1093 0x0C | SD_ASYNC_FIFO_RST,
1094 SD_DDR_MODE | SD_ASYNC_FIFO_RST);
1095 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1096 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1097 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1098 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
1099 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1100 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
1101 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
1102 break;
1103
1104 case MMC_TIMING_MMC_HS:
1105 case MMC_TIMING_SD_HS:
1106 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1107 0x0C, SD_20_MODE);
1108 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1109 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1110 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1111 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
1112 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1113 SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
1114 break;
1115
1116 default:
1117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1118 SD_CFG1, 0x0C, SD_20_MODE);
1119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1120 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1121 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1122 SD_PUSH_POINT_CTL, 0xFF, 0);
1123 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1124 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
1125 break;
1126 }
1127
1128 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1129
1130 return err;
1131 }
1132
1133 static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1134 {
1135 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1136 struct rtsx_ucr *ucr = host->ucr;
1137
1138 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1139 mutex_lock(&ucr->dev_mutex);
1140
1141 sd_set_power_mode(host, ios->power_mode);
1142 sd_set_bus_width(host, ios->bus_width);
1143 sd_set_timing(host, ios->timing, &host->ddr_mode);
1144
1145 host->vpclk = false;
1146 host->double_clk = true;
1147
1148 switch (ios->timing) {
1149 case MMC_TIMING_UHS_SDR104:
1150 case MMC_TIMING_UHS_SDR50:
1151 host->ssc_depth = SSC_DEPTH_2M;
1152 host->vpclk = true;
1153 host->double_clk = false;
1154 break;
1155 case MMC_TIMING_UHS_DDR50:
1156 case MMC_TIMING_UHS_SDR25:
1157 host->ssc_depth = SSC_DEPTH_1M;
1158 break;
1159 default:
1160 host->ssc_depth = SSC_DEPTH_512K;
1161 break;
1162 }
1163
1164 host->initial_mode = (ios->clock <= 1000000) ? true : false;
1165 host->clock = ios->clock;
1166
1167 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1168 host->initial_mode, host->double_clk, host->vpclk);
1169
1170 mutex_unlock(&ucr->dev_mutex);
1171 dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
1172 }
1173
1174 static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1175 {
1176 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1177 struct rtsx_ucr *ucr = host->ucr;
1178 int err = 0;
1179
1180 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
1181 __func__, ios->signal_voltage);
1182
1183 if (host->host_removal)
1184 return -ENOMEDIUM;
1185
1186 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
1187 return -EPERM;
1188
1189 mutex_lock(&ucr->dev_mutex);
1190
1191 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1192 if (err) {
1193 mutex_unlock(&ucr->dev_mutex);
1194 return err;
1195 }
1196
1197 /* Let mmc core do the busy checking, simply stop the forced-toggle
1198 * clock(while issuing CMD11) and switch voltage.
1199 */
1200 rtsx_usb_init_cmd(ucr);
1201
1202 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1203 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1204 SD_IO_USING_1V8, SD_IO_USING_3V3);
1205 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1206 TUNE_SD18_MASK, TUNE_SD18_3V3);
1207 } else {
1208 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1209 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1210 SD_CLK_FORCE_STOP);
1211 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1212 SD_IO_USING_1V8, SD_IO_USING_1V8);
1213 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1214 TUNE_SD18_MASK, TUNE_SD18_1V8);
1215 }
1216
1217 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1218 mutex_unlock(&ucr->dev_mutex);
1219
1220 return err;
1221 }
1222
1223 static int sdmmc_card_busy(struct mmc_host *mmc)
1224 {
1225 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1226 struct rtsx_ucr *ucr = host->ucr;
1227 int err;
1228 u8 stat;
1229 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
1230 | SD_DAT0_STATUS;
1231
1232 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1233
1234 mutex_lock(&ucr->dev_mutex);
1235
1236 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1237 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1238 SD_CLK_TOGGLE_EN);
1239 if (err)
1240 goto out;
1241
1242 mdelay(1);
1243
1244 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1245 if (err)
1246 goto out;
1247
1248 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1249 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
1250 out:
1251 mutex_unlock(&ucr->dev_mutex);
1252
1253 if (err)
1254 return err;
1255
1256 /* check if any pin between dat[0:3] is low */
1257 if ((stat & mask) != mask)
1258 return 1;
1259 else
1260 return 0;
1261 }
1262
1263 static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
1264 {
1265 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1266 struct rtsx_ucr *ucr = host->ucr;
1267 int err = 0;
1268
1269 if (host->host_removal)
1270 return -ENOMEDIUM;
1271
1272 mutex_lock(&ucr->dev_mutex);
1273
1274 if (!host->ddr_mode)
1275 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
1276
1277 mutex_unlock(&ucr->dev_mutex);
1278
1279 return err;
1280 }
1281
1282 static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
1283 .request = sdmmc_request,
1284 .set_ios = sdmmc_set_ios,
1285 .get_ro = sdmmc_get_ro,
1286 .get_cd = sdmmc_get_cd,
1287 .start_signal_voltage_switch = sdmmc_switch_voltage,
1288 .card_busy = sdmmc_card_busy,
1289 .execute_tuning = sdmmc_execute_tuning,
1290 };
1291
1292 #ifdef RTSX_USB_USE_LEDS_CLASS
1293 static void rtsx_usb_led_control(struct led_classdev *led,
1294 enum led_brightness brightness)
1295 {
1296 struct rtsx_usb_sdmmc *host = container_of(led,
1297 struct rtsx_usb_sdmmc, led);
1298
1299 if (host->host_removal)
1300 return;
1301
1302 host->led.brightness = brightness;
1303 schedule_work(&host->led_work);
1304 }
1305
1306 static void rtsx_usb_update_led(struct work_struct *work)
1307 {
1308 struct rtsx_usb_sdmmc *host =
1309 container_of(work, struct rtsx_usb_sdmmc, led_work);
1310 struct rtsx_ucr *ucr = host->ucr;
1311
1312 pm_runtime_get_sync(sdmmc_dev(host));
1313 mutex_lock(&ucr->dev_mutex);
1314
1315 if (host->led.brightness == LED_OFF)
1316 rtsx_usb_turn_off_led(ucr);
1317 else
1318 rtsx_usb_turn_on_led(ucr);
1319
1320 mutex_unlock(&ucr->dev_mutex);
1321 pm_runtime_put(sdmmc_dev(host));
1322 }
1323 #endif
1324
1325 static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
1326 {
1327 struct mmc_host *mmc = host->mmc;
1328
1329 mmc->f_min = 250000;
1330 mmc->f_max = 208000000;
1331 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
1332 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
1333 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
1334 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
1335 MMC_CAP_NEEDS_POLL;
1336 mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE;
1337
1338 mmc->max_current_330 = 400;
1339 mmc->max_current_180 = 800;
1340 mmc->ops = &rtsx_usb_sdmmc_ops;
1341 mmc->max_segs = 256;
1342 mmc->max_seg_size = 65536;
1343 mmc->max_blk_size = 512;
1344 mmc->max_blk_count = 65535;
1345 mmc->max_req_size = 524288;
1346
1347 host->power_mode = MMC_POWER_OFF;
1348 }
1349
1350 static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
1351 {
1352 struct mmc_host *mmc;
1353 struct rtsx_usb_sdmmc *host;
1354 struct rtsx_ucr *ucr;
1355 #ifdef RTSX_USB_USE_LEDS_CLASS
1356 int err;
1357 #endif
1358
1359 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1360 if (!ucr)
1361 return -ENXIO;
1362
1363 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
1364
1365 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
1366 if (!mmc)
1367 return -ENOMEM;
1368
1369 host = mmc_priv(mmc);
1370 host->ucr = ucr;
1371 host->mmc = mmc;
1372 host->pdev = pdev;
1373 platform_set_drvdata(pdev, host);
1374
1375 mutex_init(&host->host_mutex);
1376 rtsx_usb_init_host(host);
1377 pm_runtime_enable(&pdev->dev);
1378
1379 #ifdef RTSX_USB_USE_LEDS_CLASS
1380 snprintf(host->led_name, sizeof(host->led_name),
1381 "%s::", mmc_hostname(mmc));
1382 host->led.name = host->led_name;
1383 host->led.brightness = LED_OFF;
1384 host->led.default_trigger = mmc_hostname(mmc);
1385 host->led.brightness_set = rtsx_usb_led_control;
1386
1387 err = led_classdev_register(mmc_dev(mmc), &host->led);
1388 if (err)
1389 dev_err(&(pdev->dev),
1390 "Failed to register LED device: %d\n", err);
1391 INIT_WORK(&host->led_work, rtsx_usb_update_led);
1392
1393 #endif
1394 mmc_add_host(mmc);
1395
1396 return 0;
1397 }
1398
1399 static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
1400 {
1401 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
1402 struct mmc_host *mmc;
1403
1404 if (!host)
1405 return 0;
1406
1407 mmc = host->mmc;
1408 host->host_removal = true;
1409
1410 mutex_lock(&host->host_mutex);
1411 if (host->mrq) {
1412 dev_dbg(&(pdev->dev),
1413 "%s: Controller removed during transfer\n",
1414 mmc_hostname(mmc));
1415 host->mrq->cmd->error = -ENOMEDIUM;
1416 if (host->mrq->stop)
1417 host->mrq->stop->error = -ENOMEDIUM;
1418 mmc_request_done(mmc, host->mrq);
1419 }
1420 mutex_unlock(&host->host_mutex);
1421
1422 mmc_remove_host(mmc);
1423
1424 #ifdef RTSX_USB_USE_LEDS_CLASS
1425 cancel_work_sync(&host->led_work);
1426 led_classdev_unregister(&host->led);
1427 #endif
1428
1429 mmc_free_host(mmc);
1430 pm_runtime_disable(&pdev->dev);
1431 platform_set_drvdata(pdev, NULL);
1432
1433 dev_dbg(&(pdev->dev),
1434 ": Realtek USB SD/MMC module has been removed\n");
1435
1436 return 0;
1437 }
1438
1439 static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
1440 {
1441 .name = "rtsx_usb_sdmmc",
1442 }, {
1443 /* sentinel */
1444 }
1445 };
1446 MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
1447
1448 static struct platform_driver rtsx_usb_sdmmc_driver = {
1449 .probe = rtsx_usb_sdmmc_drv_probe,
1450 .remove = rtsx_usb_sdmmc_drv_remove,
1451 .id_table = rtsx_usb_sdmmc_ids,
1452 .driver = {
1453 .name = "rtsx_usb_sdmmc",
1454 },
1455 };
1456 module_platform_driver(rtsx_usb_sdmmc_driver);
1457
1458 MODULE_LICENSE("GPL v2");
1459 MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
1460 MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");
Linux with added FPC-III support