dm thin metadata: fix __udivdi3 undefined on 32-bit
[linux/fpc-iii.git] / drivers / mmc / host / sdhci-of-arasan.c
blob75379cb0fb354e7aa7749852ced8fca5973d435e
1 /*
2 * Arasan Secure Digital Host Controller Interface.
3 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
4 * Copyright (c) 2012 Wind River Systems, Inc.
5 * Copyright (C) 2013 Pengutronix e.K.
6 * Copyright (C) 2013 Xilinx Inc.
8 * Based on sdhci-of-esdhc.c
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 * Copyright (c) 2009 MontaVista Software, Inc.
13 * Authors: Xiaobo Xie <X.Xie@freescale.com>
14 * Anton Vorontsov <avorontsov@ru.mvista.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or (at
19 * your option) any later version.
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include "sdhci-pltfm.h"
26 #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c
28 #define CLK_CTRL_TIMEOUT_SHIFT 16
29 #define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT)
30 #define CLK_CTRL_TIMEOUT_MIN_EXP 13
32 /**
33 * struct sdhci_arasan_data
34 * @clk_ahb: Pointer to the AHB clock
36 struct sdhci_arasan_data {
37 struct clk *clk_ahb;
40 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
42 u32 div;
43 unsigned long freq;
44 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
46 div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
47 div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
49 freq = clk_get_rate(pltfm_host->clk);
50 freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
52 return freq;
55 static struct sdhci_ops sdhci_arasan_ops = {
56 .set_clock = sdhci_set_clock,
57 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
58 .get_timeout_clock = sdhci_arasan_get_timeout_clock,
59 .set_bus_width = sdhci_set_bus_width,
60 .reset = sdhci_reset,
61 .set_uhs_signaling = sdhci_set_uhs_signaling,
64 static struct sdhci_pltfm_data sdhci_arasan_pdata = {
65 .ops = &sdhci_arasan_ops,
66 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
67 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
68 SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
71 #ifdef CONFIG_PM_SLEEP
72 /**
73 * sdhci_arasan_suspend - Suspend method for the driver
74 * @dev: Address of the device structure
75 * Returns 0 on success and error value on error
77 * Put the device in a low power state.
79 static int sdhci_arasan_suspend(struct device *dev)
81 struct platform_device *pdev = to_platform_device(dev);
82 struct sdhci_host *host = platform_get_drvdata(pdev);
83 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
84 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
85 int ret;
87 ret = sdhci_suspend_host(host);
88 if (ret)
89 return ret;
91 clk_disable(pltfm_host->clk);
92 clk_disable(sdhci_arasan->clk_ahb);
94 return 0;
97 /**
98 * sdhci_arasan_resume - Resume method for the driver
99 * @dev: Address of the device structure
100 * Returns 0 on success and error value on error
102 * Resume operation after suspend
104 static int sdhci_arasan_resume(struct device *dev)
106 struct platform_device *pdev = to_platform_device(dev);
107 struct sdhci_host *host = platform_get_drvdata(pdev);
108 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
109 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
110 int ret;
112 ret = clk_enable(sdhci_arasan->clk_ahb);
113 if (ret) {
114 dev_err(dev, "Cannot enable AHB clock.\n");
115 return ret;
118 ret = clk_enable(pltfm_host->clk);
119 if (ret) {
120 dev_err(dev, "Cannot enable SD clock.\n");
121 clk_disable(sdhci_arasan->clk_ahb);
122 return ret;
125 return sdhci_resume_host(host);
127 #endif /* ! CONFIG_PM_SLEEP */
129 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
130 sdhci_arasan_resume);
132 static int sdhci_arasan_probe(struct platform_device *pdev)
134 int ret;
135 struct clk *clk_xin;
136 struct sdhci_host *host;
137 struct sdhci_pltfm_host *pltfm_host;
138 struct sdhci_arasan_data *sdhci_arasan;
140 sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan),
141 GFP_KERNEL);
142 if (!sdhci_arasan)
143 return -ENOMEM;
145 sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
146 if (IS_ERR(sdhci_arasan->clk_ahb)) {
147 dev_err(&pdev->dev, "clk_ahb clock not found.\n");
148 return PTR_ERR(sdhci_arasan->clk_ahb);
151 clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
152 if (IS_ERR(clk_xin)) {
153 dev_err(&pdev->dev, "clk_xin clock not found.\n");
154 return PTR_ERR(clk_xin);
157 ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
158 if (ret) {
159 dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
160 return ret;
163 ret = clk_prepare_enable(clk_xin);
164 if (ret) {
165 dev_err(&pdev->dev, "Unable to enable SD clock.\n");
166 goto clk_dis_ahb;
169 host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0);
170 if (IS_ERR(host)) {
171 ret = PTR_ERR(host);
172 goto clk_disable_all;
175 if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a")) {
176 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
177 host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
180 sdhci_get_of_property(pdev);
181 pltfm_host = sdhci_priv(host);
182 pltfm_host->priv = sdhci_arasan;
183 pltfm_host->clk = clk_xin;
185 ret = mmc_of_parse(host->mmc);
186 if (ret) {
187 dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
188 goto clk_disable_all;
191 ret = sdhci_add_host(host);
192 if (ret)
193 goto err_pltfm_free;
195 return 0;
197 err_pltfm_free:
198 sdhci_pltfm_free(pdev);
199 clk_disable_all:
200 clk_disable_unprepare(clk_xin);
201 clk_dis_ahb:
202 clk_disable_unprepare(sdhci_arasan->clk_ahb);
204 return ret;
207 static int sdhci_arasan_remove(struct platform_device *pdev)
209 struct sdhci_host *host = platform_get_drvdata(pdev);
210 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
211 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
213 clk_disable_unprepare(sdhci_arasan->clk_ahb);
215 return sdhci_pltfm_unregister(pdev);
218 static const struct of_device_id sdhci_arasan_of_match[] = {
219 { .compatible = "arasan,sdhci-8.9a" },
220 { .compatible = "arasan,sdhci-5.1" },
221 { .compatible = "arasan,sdhci-4.9a" },
224 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
226 static struct platform_driver sdhci_arasan_driver = {
227 .driver = {
228 .name = "sdhci-arasan",
229 .of_match_table = sdhci_arasan_of_match,
230 .pm = &sdhci_arasan_dev_pm_ops,
232 .probe = sdhci_arasan_probe,
233 .remove = sdhci_arasan_remove,
236 module_platform_driver(sdhci_arasan_driver);
238 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
239 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
240 MODULE_LICENSE("GPL");