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dm thin metadata: fix __udivdi3 undefined on 32-bit
[linux/fpc-iii.git] / drivers / usb / gadget / udc / s3c2410_udc.c
blobeb3571ee59e3c4a454b87e2103a921ed88eea2f7
1 /*
2 * linux/drivers/usb/gadget/s3c2410_udc.c
3 *
4 * Samsung S3C24xx series on-chip full speed USB device controllers
5 *
6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15 #define pr_fmt(fmt) "s3c2410_udc: " fmt
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/ioport.h>
21 #include <linux/sched.h>
22 #include <linux/slab.h>
23 #include <linux/errno.h>
24 #include <linux/init.h>
25 #include <linux/timer.h>
26 #include <linux/list.h>
27 #include <linux/interrupt.h>
28 #include <linux/platform_device.h>
29 #include <linux/clk.h>
30 #include <linux/gpio.h>
31 #include <linux/prefetch.h>
32 #include <linux/io.h>
33
34 #include <linux/debugfs.h>
35 #include <linux/seq_file.h>
36
37 #include <linux/usb.h>
38 #include <linux/usb/gadget.h>
39
40 #include <asm/byteorder.h>
41 #include <asm/irq.h>
42 #include <asm/unaligned.h>
43 #include <mach/irqs.h>
44
45 #include <mach/hardware.h>
46
47 #include <plat/regs-udc.h>
48 #include <linux/platform_data/usb-s3c2410_udc.h>
49
50
51 #include "s3c2410_udc.h"
52
53 #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
54 #define DRIVER_VERSION "29 Apr 2007"
55 #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
56 "Arnaud Patard <arnaud.patard@rtp-net.org>"
57
58 static const char gadget_name[] = "s3c2410_udc";
59 static const char driver_desc[] = DRIVER_DESC;
60
61 static struct s3c2410_udc *the_controller;
62 static struct clk *udc_clock;
63 static struct clk *usb_bus_clock;
64 static void __iomem *base_addr;
65 static u64 rsrc_start;
66 static u64 rsrc_len;
67 static struct dentry *s3c2410_udc_debugfs_root;
68
69 static inline u32 udc_read(u32 reg)
70 {
71 return readb(base_addr + reg);
72 }
73
74 static inline void udc_write(u32 value, u32 reg)
75 {
76 writeb(value, base_addr + reg);
77 }
78
79 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
80 {
81 writeb(value, base + reg);
82 }
83
84 static struct s3c2410_udc_mach_info *udc_info;
85
86 /*************************** DEBUG FUNCTION ***************************/
87 #define DEBUG_NORMAL 1
88 #define DEBUG_VERBOSE 2
89
90 #ifdef CONFIG_USB_S3C2410_DEBUG
91 #define USB_S3C2410_DEBUG_LEVEL 0
92
93 static uint32_t s3c2410_ticks = 0;
94
95 __printf(2, 3)
96 static void dprintk(int level, const char *fmt, ...)
97 {
98 static long prevticks;
99 static int invocation;
100 struct va_format vaf;
101 va_list args;
102
103 if (level > USB_S3C2410_DEBUG_LEVEL)
104 return;
105
106 va_start(args, fmt);
107
108 vaf.fmt = fmt;
109 vaf.va = &args;
110
111 if (s3c2410_ticks != prevticks) {
112 prevticks = s3c2410_ticks;
113 invocation = 0;
114 }
115
116 pr_debug("%1lu.%02d USB: %pV", prevticks, invocation++, &vaf);
117
118 va_end(args);
119 }
120 #else
121 __printf(2, 3)
122 static void dprintk(int level, const char *fmt, ...)
123 {
124 }
125 #endif
126
127 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
128 {
129 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
130 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
131 u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
132 u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
133
134 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
135 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
136 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
137 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
138 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
139 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
140 udc_write(0, S3C2410_UDC_INDEX_REG);
141 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
142 udc_write(1, S3C2410_UDC_INDEX_REG);
143 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
144 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
145 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
146 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
147 udc_write(2, S3C2410_UDC_INDEX_REG);
148 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
149 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
150 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
151 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
152
153 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
154 "PWR_REG : 0x%04X\n"
155 "EP_INT_REG : 0x%04X\n"
156 "USB_INT_REG : 0x%04X\n"
157 "EP_INT_EN_REG : 0x%04X\n"
158 "USB_INT_EN_REG : 0x%04X\n"
159 "EP0_CSR : 0x%04X\n"
160 "EP1_I_CSR1 : 0x%04X\n"
161 "EP1_I_CSR2 : 0x%04X\n"
162 "EP1_O_CSR1 : 0x%04X\n"
163 "EP1_O_CSR2 : 0x%04X\n"
164 "EP2_I_CSR1 : 0x%04X\n"
165 "EP2_I_CSR2 : 0x%04X\n"
166 "EP2_O_CSR1 : 0x%04X\n"
167 "EP2_O_CSR2 : 0x%04X\n",
168 addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
169 ep_int_en_reg, usb_int_en_reg, ep0_csr,
170 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
171 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
172 );
173
174 return 0;
175 }
176
177 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
178 struct file *file)
179 {
180 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
181 }
182
183 static const struct file_operations s3c2410_udc_debugfs_fops = {
184 .open = s3c2410_udc_debugfs_fops_open,
185 .read = seq_read,
186 .llseek = seq_lseek,
187 .release = single_release,
188 .owner = THIS_MODULE,
189 };
190
191 /* io macros */
192
193 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
194 {
195 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
196 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
197 S3C2410_UDC_EP0_CSR_REG);
198 }
199
200 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
201 {
202 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
203 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
204 }
205
206 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
207 {
208 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
209 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
210 }
211
212 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
213 {
214 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
215 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
216 }
217
218 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
219 {
220 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
221 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
222 }
223
224 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
225 {
226 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
227 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
228 }
229
230 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
231 {
232 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
233
234 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
235 | S3C2410_UDC_EP0_CSR_DE),
236 S3C2410_UDC_EP0_CSR_REG);
237 }
238
239 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
240 {
241 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
242 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
243 | S3C2410_UDC_EP0_CSR_DE),
244 S3C2410_UDC_EP0_CSR_REG);
245 }
246
247 /*------------------------- I/O ----------------------------------*/
248
249 /*
250 * s3c2410_udc_done
251 */
252 static void s3c2410_udc_done(struct s3c2410_ep *ep,
253 struct s3c2410_request *req, int status)
254 {
255 unsigned halted = ep->halted;
256
257 list_del_init(&req->queue);
258
259 if (likely(req->req.status == -EINPROGRESS))
260 req->req.status = status;
261 else
262 status = req->req.status;
263
264 ep->halted = 1;
265 usb_gadget_giveback_request(&ep->ep, &req->req);
266 ep->halted = halted;
267 }
268
269 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
270 struct s3c2410_ep *ep, int status)
271 {
272 /* Sanity check */
273 if (&ep->queue == NULL)
274 return;
275
276 while (!list_empty(&ep->queue)) {
277 struct s3c2410_request *req;
278 req = list_entry(ep->queue.next, struct s3c2410_request,
279 queue);
280 s3c2410_udc_done(ep, req, status);
281 }
282 }
283
284 static inline int s3c2410_udc_fifo_count_out(void)
285 {
286 int tmp;
287
288 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
289 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
290 return tmp;
291 }
292
293 /*
294 * s3c2410_udc_write_packet
295 */
296 static inline int s3c2410_udc_write_packet(int fifo,
297 struct s3c2410_request *req,
298 unsigned max)
299 {
300 unsigned len = min(req->req.length - req->req.actual, max);
301 u8 *buf = req->req.buf + req->req.actual;
302
303 prefetch(buf);
304
305 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
306 req->req.actual, req->req.length, len, req->req.actual + len);
307
308 req->req.actual += len;
309
310 udelay(5);
311 writesb(base_addr + fifo, buf, len);
312 return len;
313 }
314
315 /*
316 * s3c2410_udc_write_fifo
317 *
318 * return: 0 = still running, 1 = completed, negative = errno
319 */
320 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
321 struct s3c2410_request *req)
322 {
323 unsigned count;
324 int is_last;
325 u32 idx;
326 int fifo_reg;
327 u32 ep_csr;
328
329 idx = ep->bEndpointAddress & 0x7F;
330 switch (idx) {
331 default:
332 idx = 0;
333 case 0:
334 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
335 break;
336 case 1:
337 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
338 break;
339 case 2:
340 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
341 break;
342 case 3:
343 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
344 break;
345 case 4:
346 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
347 break;
348 }
349
350 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
351
352 /* last packet is often short (sometimes a zlp) */
353 if (count != ep->ep.maxpacket)
354 is_last = 1;
355 else if (req->req.length != req->req.actual || req->req.zero)
356 is_last = 0;
357 else
358 is_last = 2;
359
360 /* Only ep0 debug messages are interesting */
361 if (idx == 0)
362 dprintk(DEBUG_NORMAL,
363 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
364 idx, count, req->req.actual, req->req.length,
365 is_last, req->req.zero);
366
367 if (is_last) {
368 /* The order is important. It prevents sending 2 packets
369 * at the same time */
370
371 if (idx == 0) {
372 /* Reset signal => no need to say 'data sent' */
373 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
374 & S3C2410_UDC_USBINT_RESET))
375 s3c2410_udc_set_ep0_de_in(base_addr);
376 ep->dev->ep0state = EP0_IDLE;
377 } else {
378 udc_write(idx, S3C2410_UDC_INDEX_REG);
379 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
380 udc_write(idx, S3C2410_UDC_INDEX_REG);
381 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
382 S3C2410_UDC_IN_CSR1_REG);
383 }
384
385 s3c2410_udc_done(ep, req, 0);
386 is_last = 1;
387 } else {
388 if (idx == 0) {
389 /* Reset signal => no need to say 'data sent' */
390 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
391 & S3C2410_UDC_USBINT_RESET))
392 s3c2410_udc_set_ep0_ipr(base_addr);
393 } else {
394 udc_write(idx, S3C2410_UDC_INDEX_REG);
395 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
396 udc_write(idx, S3C2410_UDC_INDEX_REG);
397 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
398 S3C2410_UDC_IN_CSR1_REG);
399 }
400 }
401
402 return is_last;
403 }
404
405 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
406 struct s3c2410_request *req, unsigned avail)
407 {
408 unsigned len;
409
410 len = min(req->req.length - req->req.actual, avail);
411 req->req.actual += len;
412
413 readsb(fifo + base_addr, buf, len);
414 return len;
415 }
416
417 /*
418 * return: 0 = still running, 1 = queue empty, negative = errno
419 */
420 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
421 struct s3c2410_request *req)
422 {
423 u8 *buf;
424 u32 ep_csr;
425 unsigned bufferspace;
426 int is_last = 1;
427 unsigned avail;
428 int fifo_count = 0;
429 u32 idx;
430 int fifo_reg;
431
432 idx = ep->bEndpointAddress & 0x7F;
433
434 switch (idx) {
435 default:
436 idx = 0;
437 case 0:
438 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
439 break;
440 case 1:
441 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
442 break;
443 case 2:
444 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
445 break;
446 case 3:
447 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
448 break;
449 case 4:
450 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
451 break;
452 }
453
454 if (!req->req.length)
455 return 1;
456
457 buf = req->req.buf + req->req.actual;
458 bufferspace = req->req.length - req->req.actual;
459 if (!bufferspace) {
460 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
461 return -1;
462 }
463
464 udc_write(idx, S3C2410_UDC_INDEX_REG);
465
466 fifo_count = s3c2410_udc_fifo_count_out();
467 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
468
469 if (fifo_count > ep->ep.maxpacket)
470 avail = ep->ep.maxpacket;
471 else
472 avail = fifo_count;
473
474 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
475
476 /* checking this with ep0 is not accurate as we already
477 * read a control request
478 **/
479 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
480 is_last = 1;
481 /* overflowed this request? flush extra data */
482 if (fifo_count != avail)
483 req->req.status = -EOVERFLOW;
484 } else {
485 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
486 }
487
488 udc_write(idx, S3C2410_UDC_INDEX_REG);
489 fifo_count = s3c2410_udc_fifo_count_out();
490
491 /* Only ep0 debug messages are interesting */
492 if (idx == 0)
493 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
494 __func__, fifo_count, is_last);
495
496 if (is_last) {
497 if (idx == 0) {
498 s3c2410_udc_set_ep0_de_out(base_addr);
499 ep->dev->ep0state = EP0_IDLE;
500 } else {
501 udc_write(idx, S3C2410_UDC_INDEX_REG);
502 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
503 udc_write(idx, S3C2410_UDC_INDEX_REG);
504 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
505 S3C2410_UDC_OUT_CSR1_REG);
506 }
507
508 s3c2410_udc_done(ep, req, 0);
509 } else {
510 if (idx == 0) {
511 s3c2410_udc_clear_ep0_opr(base_addr);
512 } else {
513 udc_write(idx, S3C2410_UDC_INDEX_REG);
514 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
515 udc_write(idx, S3C2410_UDC_INDEX_REG);
516 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
517 S3C2410_UDC_OUT_CSR1_REG);
518 }
519 }
520
521 return is_last;
522 }
523
524 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
525 {
526 unsigned char *outbuf = (unsigned char *)crq;
527 int bytes_read = 0;
528
529 udc_write(0, S3C2410_UDC_INDEX_REG);
530
531 bytes_read = s3c2410_udc_fifo_count_out();
532
533 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
534
535 if (bytes_read > sizeof(struct usb_ctrlrequest))
536 bytes_read = sizeof(struct usb_ctrlrequest);
537
538 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
539
540 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
541 bytes_read, crq->bRequest, crq->bRequestType,
542 crq->wValue, crq->wIndex, crq->wLength);
543
544 return bytes_read;
545 }
546
547 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
548 struct usb_ctrlrequest *crq)
549 {
550 u16 status = 0;
551 u8 ep_num = crq->wIndex & 0x7F;
552 u8 is_in = crq->wIndex & USB_DIR_IN;
553
554 switch (crq->bRequestType & USB_RECIP_MASK) {
555 case USB_RECIP_INTERFACE:
556 break;
557
558 case USB_RECIP_DEVICE:
559 status = dev->devstatus;
560 break;
561
562 case USB_RECIP_ENDPOINT:
563 if (ep_num > 4 || crq->wLength > 2)
564 return 1;
565
566 if (ep_num == 0) {
567 udc_write(0, S3C2410_UDC_INDEX_REG);
568 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
569 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
570 } else {
571 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
572 if (is_in) {
573 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
574 status = status & S3C2410_UDC_ICSR1_SENDSTL;
575 } else {
576 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
577 status = status & S3C2410_UDC_OCSR1_SENDSTL;
578 }
579 }
580
581 status = status ? 1 : 0;
582 break;
583
584 default:
585 return 1;
586 }
587
588 /* Seems to be needed to get it working. ouch :( */
589 udelay(5);
590 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
591 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
592 s3c2410_udc_set_ep0_de_in(base_addr);
593
594 return 0;
595 }
596 /*------------------------- usb state machine -------------------------------*/
597 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
598
599 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
600 struct s3c2410_ep *ep,
601 struct usb_ctrlrequest *crq,
602 u32 ep0csr)
603 {
604 int len, ret, tmp;
605
606 /* start control request? */
607 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
608 return;
609
610 s3c2410_udc_nuke(dev, ep, -EPROTO);
611
612 len = s3c2410_udc_read_fifo_crq(crq);
613 if (len != sizeof(*crq)) {
614 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
615 " wanted %d bytes got %d. Stalling out...\n",
616 sizeof(*crq), len);
617 s3c2410_udc_set_ep0_ss(base_addr);
618 return;
619 }
620
621 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
622 crq->bRequest, crq->bRequestType, crq->wLength);
623
624 /* cope with automagic for some standard requests. */
625 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
626 == USB_TYPE_STANDARD;
627 dev->req_config = 0;
628 dev->req_pending = 1;
629
630 switch (crq->bRequest) {
631 case USB_REQ_SET_CONFIGURATION:
632 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
633
634 if (crq->bRequestType == USB_RECIP_DEVICE) {
635 dev->req_config = 1;
636 s3c2410_udc_set_ep0_de_out(base_addr);
637 }
638 break;
639
640 case USB_REQ_SET_INTERFACE:
641 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
642
643 if (crq->bRequestType == USB_RECIP_INTERFACE) {
644 dev->req_config = 1;
645 s3c2410_udc_set_ep0_de_out(base_addr);
646 }
647 break;
648
649 case USB_REQ_SET_ADDRESS:
650 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
651
652 if (crq->bRequestType == USB_RECIP_DEVICE) {
653 tmp = crq->wValue & 0x7F;
654 dev->address = tmp;
655 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
656 S3C2410_UDC_FUNC_ADDR_REG);
657 s3c2410_udc_set_ep0_de_out(base_addr);
658 return;
659 }
660 break;
661
662 case USB_REQ_GET_STATUS:
663 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
664 s3c2410_udc_clear_ep0_opr(base_addr);
665
666 if (dev->req_std) {
667 if (!s3c2410_udc_get_status(dev, crq))
668 return;
669 }
670 break;
671
672 case USB_REQ_CLEAR_FEATURE:
673 s3c2410_udc_clear_ep0_opr(base_addr);
674
675 if (crq->bRequestType != USB_RECIP_ENDPOINT)
676 break;
677
678 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
679 break;
680
681 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
682 s3c2410_udc_set_ep0_de_out(base_addr);
683 return;
684
685 case USB_REQ_SET_FEATURE:
686 s3c2410_udc_clear_ep0_opr(base_addr);
687
688 if (crq->bRequestType != USB_RECIP_ENDPOINT)
689 break;
690
691 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
692 break;
693
694 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
695 s3c2410_udc_set_ep0_de_out(base_addr);
696 return;
697
698 default:
699 s3c2410_udc_clear_ep0_opr(base_addr);
700 break;
701 }
702
703 if (crq->bRequestType & USB_DIR_IN)
704 dev->ep0state = EP0_IN_DATA_PHASE;
705 else
706 dev->ep0state = EP0_OUT_DATA_PHASE;
707
708 if (!dev->driver)
709 return;
710
711 /* deliver the request to the gadget driver */
712 ret = dev->driver->setup(&dev->gadget, crq);
713 if (ret < 0) {
714 if (dev->req_config) {
715 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
716 crq->bRequest, ret);
717 return;
718 }
719
720 if (ret == -EOPNOTSUPP)
721 dprintk(DEBUG_NORMAL, "Operation not supported\n");
722 else
723 dprintk(DEBUG_NORMAL,
724 "dev->driver->setup failed. (%d)\n", ret);
725
726 udelay(5);
727 s3c2410_udc_set_ep0_ss(base_addr);
728 s3c2410_udc_set_ep0_de_out(base_addr);
729 dev->ep0state = EP0_IDLE;
730 /* deferred i/o == no response yet */
731 } else if (dev->req_pending) {
732 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
733 dev->req_pending = 0;
734 }
735
736 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
737 }
738
739 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
740 {
741 u32 ep0csr;
742 struct s3c2410_ep *ep = &dev->ep[0];
743 struct s3c2410_request *req;
744 struct usb_ctrlrequest crq;
745
746 if (list_empty(&ep->queue))
747 req = NULL;
748 else
749 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
750
751 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
752 * S3C2410_UDC_EP0_CSR_REG when index is zero */
753
754 udc_write(0, S3C2410_UDC_INDEX_REG);
755 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
756
757 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
758 ep0csr, ep0states[dev->ep0state]);
759
760 /* clear stall status */
761 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
762 s3c2410_udc_nuke(dev, ep, -EPIPE);
763 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
764 s3c2410_udc_clear_ep0_sst(base_addr);
765 dev->ep0state = EP0_IDLE;
766 return;
767 }
768
769 /* clear setup end */
770 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
771 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
772 s3c2410_udc_nuke(dev, ep, 0);
773 s3c2410_udc_clear_ep0_se(base_addr);
774 dev->ep0state = EP0_IDLE;
775 }
776
777 switch (dev->ep0state) {
778 case EP0_IDLE:
779 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
780 break;
781
782 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
783 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
784 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
785 s3c2410_udc_write_fifo(ep, req);
786 break;
787
788 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
789 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
790 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
791 s3c2410_udc_read_fifo(ep, req);
792 break;
793
794 case EP0_END_XFER:
795 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
796 dev->ep0state = EP0_IDLE;
797 break;
798
799 case EP0_STALL:
800 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
801 dev->ep0state = EP0_IDLE;
802 break;
803 }
804 }
805
806 /*
807 * handle_ep - Manage I/O endpoints
808 */
809
810 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
811 {
812 struct s3c2410_request *req;
813 int is_in = ep->bEndpointAddress & USB_DIR_IN;
814 u32 ep_csr1;
815 u32 idx;
816
817 if (likely(!list_empty(&ep->queue)))
818 req = list_entry(ep->queue.next,
819 struct s3c2410_request, queue);
820 else
821 req = NULL;
822
823 idx = ep->bEndpointAddress & 0x7F;
824
825 if (is_in) {
826 udc_write(idx, S3C2410_UDC_INDEX_REG);
827 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
828 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
829 idx, ep_csr1, req ? 1 : 0);
830
831 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
832 dprintk(DEBUG_VERBOSE, "st\n");
833 udc_write(idx, S3C2410_UDC_INDEX_REG);
834 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
835 S3C2410_UDC_IN_CSR1_REG);
836 return;
837 }
838
839 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
840 s3c2410_udc_write_fifo(ep, req);
841 } else {
842 udc_write(idx, S3C2410_UDC_INDEX_REG);
843 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
844 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
845
846 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
847 udc_write(idx, S3C2410_UDC_INDEX_REG);
848 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
849 S3C2410_UDC_OUT_CSR1_REG);
850 return;
851 }
852
853 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
854 s3c2410_udc_read_fifo(ep, req);
855 }
856 }
857
858 #include <mach/regs-irq.h>
859
860 /*
861 * s3c2410_udc_irq - interrupt handler
862 */
863 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
864 {
865 struct s3c2410_udc *dev = _dev;
866 int usb_status;
867 int usbd_status;
868 int pwr_reg;
869 int ep0csr;
870 int i;
871 u32 idx, idx2;
872 unsigned long flags;
873
874 spin_lock_irqsave(&dev->lock, flags);
875
876 /* Driver connected ? */
877 if (!dev->driver) {
878 /* Clear interrupts */
879 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
880 S3C2410_UDC_USB_INT_REG);
881 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
882 S3C2410_UDC_EP_INT_REG);
883 }
884
885 /* Save index */
886 idx = udc_read(S3C2410_UDC_INDEX_REG);
887
888 /* Read status registers */
889 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
890 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
891 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
892
893 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
894 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
895
896 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
897 usb_status, usbd_status, pwr_reg, ep0csr);
898
899 /*
900 * Now, handle interrupts. There's two types :
901 * - Reset, Resume, Suspend coming -> usb_int_reg
902 * - EP -> ep_int_reg
903 */
904
905 /* RESET */
906 if (usb_status & S3C2410_UDC_USBINT_RESET) {
907 /* two kind of reset :
908 * - reset start -> pwr reg = 8
909 * - reset end -> pwr reg = 0
910 **/
911 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
912 ep0csr, pwr_reg);
913
914 dev->gadget.speed = USB_SPEED_UNKNOWN;
915 udc_write(0x00, S3C2410_UDC_INDEX_REG);
916 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
917 S3C2410_UDC_MAXP_REG);
918 dev->address = 0;
919
920 dev->ep0state = EP0_IDLE;
921 dev->gadget.speed = USB_SPEED_FULL;
922
923 /* clear interrupt */
924 udc_write(S3C2410_UDC_USBINT_RESET,
925 S3C2410_UDC_USB_INT_REG);
926
927 udc_write(idx, S3C2410_UDC_INDEX_REG);
928 spin_unlock_irqrestore(&dev->lock, flags);
929 return IRQ_HANDLED;
930 }
931
932 /* RESUME */
933 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
934 dprintk(DEBUG_NORMAL, "USB resume\n");
935
936 /* clear interrupt */
937 udc_write(S3C2410_UDC_USBINT_RESUME,
938 S3C2410_UDC_USB_INT_REG);
939
940 if (dev->gadget.speed != USB_SPEED_UNKNOWN
941 && dev->driver
942 && dev->driver->resume)
943 dev->driver->resume(&dev->gadget);
944 }
945
946 /* SUSPEND */
947 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
948 dprintk(DEBUG_NORMAL, "USB suspend\n");
949
950 /* clear interrupt */
951 udc_write(S3C2410_UDC_USBINT_SUSPEND,
952 S3C2410_UDC_USB_INT_REG);
953
954 if (dev->gadget.speed != USB_SPEED_UNKNOWN
955 && dev->driver
956 && dev->driver->suspend)
957 dev->driver->suspend(&dev->gadget);
958
959 dev->ep0state = EP0_IDLE;
960 }
961
962 /* EP */
963 /* control traffic */
964 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
965 * generate an interrupt
966 */
967 if (usbd_status & S3C2410_UDC_INT_EP0) {
968 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
969 /* Clear the interrupt bit by setting it to 1 */
970 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
971 s3c2410_udc_handle_ep0(dev);
972 }
973
974 /* endpoint data transfers */
975 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
976 u32 tmp = 1 << i;
977 if (usbd_status & tmp) {
978 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
979
980 /* Clear the interrupt bit by setting it to 1 */
981 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
982 s3c2410_udc_handle_ep(&dev->ep[i]);
983 }
984 }
985
986 /* what else causes this interrupt? a receive! who is it? */
987 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
988 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
989 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
990 udc_write(i, S3C2410_UDC_INDEX_REG);
991
992 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
993 s3c2410_udc_handle_ep(&dev->ep[i]);
994
995 /* restore index */
996 udc_write(idx2, S3C2410_UDC_INDEX_REG);
997 }
998 }
999
1000 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1001
1002 /* Restore old index */
1003 udc_write(idx, S3C2410_UDC_INDEX_REG);
1004
1005 spin_unlock_irqrestore(&dev->lock, flags);
1006
1007 return IRQ_HANDLED;
1008 }
1009 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1010
1011 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1012 {
1013 return container_of(ep, struct s3c2410_ep, ep);
1014 }
1015
1016 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1017 {
1018 return container_of(gadget, struct s3c2410_udc, gadget);
1019 }
1020
1021 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1022 {
1023 return container_of(req, struct s3c2410_request, req);
1024 }
1025
1026 /*
1027 * s3c2410_udc_ep_enable
1028 */
1029 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1030 const struct usb_endpoint_descriptor *desc)
1031 {
1032 struct s3c2410_udc *dev;
1033 struct s3c2410_ep *ep;
1034 u32 max, tmp;
1035 unsigned long flags;
1036 u32 csr1, csr2;
1037 u32 int_en_reg;
1038
1039 ep = to_s3c2410_ep(_ep);
1040
1041 if (!_ep || !desc
1042 || _ep->name == ep0name
1043 || desc->bDescriptorType != USB_DT_ENDPOINT)
1044 return -EINVAL;
1045
1046 dev = ep->dev;
1047 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1048 return -ESHUTDOWN;
1049
1050 max = usb_endpoint_maxp(desc) & 0x1fff;
1051
1052 local_irq_save(flags);
1053 _ep->maxpacket = max & 0x7ff;
1054 ep->ep.desc = desc;
1055 ep->halted = 0;
1056 ep->bEndpointAddress = desc->bEndpointAddress;
1057
1058 /* set max packet */
1059 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1060 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1061
1062 /* set type, direction, address; reset fifo counters */
1063 if (desc->bEndpointAddress & USB_DIR_IN) {
1064 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1065 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1066
1067 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1068 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1069 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1070 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1071 } else {
1072 /* don't flush in fifo or it will cause endpoint interrupt */
1073 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1074 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1075
1076 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1077 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1078 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1079 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1080
1081 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1082 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1083
1084 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1085 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1086 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1087 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1088 }
1089
1090 /* enable irqs */
1091 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1092 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1093
1094 /* print some debug message */
1095 tmp = desc->bEndpointAddress;
1096 dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1097 _ep->name, ep->num, tmp,
1098 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1099
1100 local_irq_restore(flags);
1101 s3c2410_udc_set_halt(_ep, 0);
1102
1103 return 0;
1104 }
1105
1106 /*
1107 * s3c2410_udc_ep_disable
1108 */
1109 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1110 {
1111 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1112 unsigned long flags;
1113 u32 int_en_reg;
1114
1115 if (!_ep || !ep->ep.desc) {
1116 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1117 _ep ? ep->ep.name : NULL);
1118 return -EINVAL;
1119 }
1120
1121 local_irq_save(flags);
1122
1123 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1124
1125 ep->ep.desc = NULL;
1126 ep->halted = 1;
1127
1128 s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1129
1130 /* disable irqs */
1131 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1132 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1133
1134 local_irq_restore(flags);
1135
1136 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1137
1138 return 0;
1139 }
1140
1141 /*
1142 * s3c2410_udc_alloc_request
1143 */
1144 static struct usb_request *
1145 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1146 {
1147 struct s3c2410_request *req;
1148
1149 dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1150
1151 if (!_ep)
1152 return NULL;
1153
1154 req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1155 if (!req)
1156 return NULL;
1157
1158 INIT_LIST_HEAD(&req->queue);
1159 return &req->req;
1160 }
1161
1162 /*
1163 * s3c2410_udc_free_request
1164 */
1165 static void
1166 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1167 {
1168 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1169 struct s3c2410_request *req = to_s3c2410_req(_req);
1170
1171 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1172
1173 if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1174 return;
1175
1176 WARN_ON(!list_empty(&req->queue));
1177 kfree(req);
1178 }
1179
1180 /*
1181 * s3c2410_udc_queue
1182 */
1183 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1184 gfp_t gfp_flags)
1185 {
1186 struct s3c2410_request *req = to_s3c2410_req(_req);
1187 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1188 struct s3c2410_udc *dev;
1189 u32 ep_csr = 0;
1190 int fifo_count = 0;
1191 unsigned long flags;
1192
1193 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1194 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1195 return -EINVAL;
1196 }
1197
1198 dev = ep->dev;
1199 if (unlikely(!dev->driver
1200 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1201 return -ESHUTDOWN;
1202 }
1203
1204 local_irq_save(flags);
1205
1206 if (unlikely(!_req || !_req->complete
1207 || !_req->buf || !list_empty(&req->queue))) {
1208 if (!_req)
1209 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1210 else {
1211 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1212 __func__, !_req->complete, !_req->buf,
1213 !list_empty(&req->queue));
1214 }
1215
1216 local_irq_restore(flags);
1217 return -EINVAL;
1218 }
1219
1220 _req->status = -EINPROGRESS;
1221 _req->actual = 0;
1222
1223 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1224 __func__, ep->bEndpointAddress, _req->length);
1225
1226 if (ep->bEndpointAddress) {
1227 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1228
1229 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1230 ? S3C2410_UDC_IN_CSR1_REG
1231 : S3C2410_UDC_OUT_CSR1_REG);
1232 fifo_count = s3c2410_udc_fifo_count_out();
1233 } else {
1234 udc_write(0, S3C2410_UDC_INDEX_REG);
1235 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1236 fifo_count = s3c2410_udc_fifo_count_out();
1237 }
1238
1239 /* kickstart this i/o queue? */
1240 if (list_empty(&ep->queue) && !ep->halted) {
1241 if (ep->bEndpointAddress == 0 /* ep0 */) {
1242 switch (dev->ep0state) {
1243 case EP0_IN_DATA_PHASE:
1244 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1245 && s3c2410_udc_write_fifo(ep,
1246 req)) {
1247 dev->ep0state = EP0_IDLE;
1248 req = NULL;
1249 }
1250 break;
1251
1252 case EP0_OUT_DATA_PHASE:
1253 if ((!_req->length)
1254 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1255 && s3c2410_udc_read_fifo(ep,
1256 req))) {
1257 dev->ep0state = EP0_IDLE;
1258 req = NULL;
1259 }
1260 break;
1261
1262 default:
1263 local_irq_restore(flags);
1264 return -EL2HLT;
1265 }
1266 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1267 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1268 && s3c2410_udc_write_fifo(ep, req)) {
1269 req = NULL;
1270 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1271 && fifo_count
1272 && s3c2410_udc_read_fifo(ep, req)) {
1273 req = NULL;
1274 }
1275 }
1276
1277 /* pio or dma irq handler advances the queue. */
1278 if (likely(req))
1279 list_add_tail(&req->queue, &ep->queue);
1280
1281 local_irq_restore(flags);
1282
1283 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1284 return 0;
1285 }
1286
1287 /*
1288 * s3c2410_udc_dequeue
1289 */
1290 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1291 {
1292 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1293 struct s3c2410_udc *udc;
1294 int retval = -EINVAL;
1295 unsigned long flags;
1296 struct s3c2410_request *req = NULL;
1297
1298 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1299
1300 if (!the_controller->driver)
1301 return -ESHUTDOWN;
1302
1303 if (!_ep || !_req)
1304 return retval;
1305
1306 udc = to_s3c2410_udc(ep->gadget);
1307
1308 local_irq_save(flags);
1309
1310 list_for_each_entry(req, &ep->queue, queue) {
1311 if (&req->req == _req) {
1312 list_del_init(&req->queue);
1313 _req->status = -ECONNRESET;
1314 retval = 0;
1315 break;
1316 }
1317 }
1318
1319 if (retval == 0) {
1320 dprintk(DEBUG_VERBOSE,
1321 "dequeued req %p from %s, len %d buf %p\n",
1322 req, _ep->name, _req->length, _req->buf);
1323
1324 s3c2410_udc_done(ep, req, -ECONNRESET);
1325 }
1326
1327 local_irq_restore(flags);
1328 return retval;
1329 }
1330
1331 /*
1332 * s3c2410_udc_set_halt
1333 */
1334 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1335 {
1336 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1337 u32 ep_csr = 0;
1338 unsigned long flags;
1339 u32 idx;
1340
1341 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1342 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1343 return -EINVAL;
1344 }
1345
1346 local_irq_save(flags);
1347
1348 idx = ep->bEndpointAddress & 0x7F;
1349
1350 if (idx == 0) {
1351 s3c2410_udc_set_ep0_ss(base_addr);
1352 s3c2410_udc_set_ep0_de_out(base_addr);
1353 } else {
1354 udc_write(idx, S3C2410_UDC_INDEX_REG);
1355 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1356 ? S3C2410_UDC_IN_CSR1_REG
1357 : S3C2410_UDC_OUT_CSR1_REG);
1358
1359 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1360 if (value)
1361 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1362 S3C2410_UDC_IN_CSR1_REG);
1363 else {
1364 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1365 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1366 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1367 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1368 }
1369 } else {
1370 if (value)
1371 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1372 S3C2410_UDC_OUT_CSR1_REG);
1373 else {
1374 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1375 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1376 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1377 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1378 }
1379 }
1380 }
1381
1382 ep->halted = value ? 1 : 0;
1383 local_irq_restore(flags);
1384
1385 return 0;
1386 }
1387
1388 static const struct usb_ep_ops s3c2410_ep_ops = {
1389 .enable = s3c2410_udc_ep_enable,
1390 .disable = s3c2410_udc_ep_disable,
1391
1392 .alloc_request = s3c2410_udc_alloc_request,
1393 .free_request = s3c2410_udc_free_request,
1394
1395 .queue = s3c2410_udc_queue,
1396 .dequeue = s3c2410_udc_dequeue,
1397
1398 .set_halt = s3c2410_udc_set_halt,
1399 };
1400
1401 /*------------------------- usb_gadget_ops ----------------------------------*/
1402
1403 /*
1404 * s3c2410_udc_get_frame
1405 */
1406 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1407 {
1408 int tmp;
1409
1410 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1411
1412 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1413 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1414 return tmp;
1415 }
1416
1417 /*
1418 * s3c2410_udc_wakeup
1419 */
1420 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1421 {
1422 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1423 return 0;
1424 }
1425
1426 /*
1427 * s3c2410_udc_set_selfpowered
1428 */
1429 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1430 {
1431 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1432
1433 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1434
1435 gadget->is_selfpowered = (value != 0);
1436 if (value)
1437 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1438 else
1439 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1440
1441 return 0;
1442 }
1443
1444 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1445 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1446
1447 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1448 {
1449 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1450
1451 if (udc_info && (udc_info->udc_command ||
1452 gpio_is_valid(udc_info->pullup_pin))) {
1453
1454 if (is_on)
1455 s3c2410_udc_enable(udc);
1456 else {
1457 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1458 if (udc->driver && udc->driver->disconnect)
1459 udc->driver->disconnect(&udc->gadget);
1460
1461 }
1462 s3c2410_udc_disable(udc);
1463 }
1464 } else {
1465 return -EOPNOTSUPP;
1466 }
1467
1468 return 0;
1469 }
1470
1471 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1472 {
1473 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1474
1475 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1476
1477 udc->vbus = (is_active != 0);
1478 s3c2410_udc_set_pullup(udc, is_active);
1479 return 0;
1480 }
1481
1482 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1483 {
1484 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1485
1486 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1487
1488 s3c2410_udc_set_pullup(udc, is_on);
1489 return 0;
1490 }
1491
1492 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1493 {
1494 struct s3c2410_udc *dev = _dev;
1495 unsigned int value;
1496
1497 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1498
1499 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1500 if (udc_info->vbus_pin_inverted)
1501 value = !value;
1502
1503 if (value != dev->vbus)
1504 s3c2410_udc_vbus_session(&dev->gadget, value);
1505
1506 return IRQ_HANDLED;
1507 }
1508
1509 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1510 {
1511 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1512
1513 if (udc_info && udc_info->vbus_draw) {
1514 udc_info->vbus_draw(ma);
1515 return 0;
1516 }
1517
1518 return -ENOTSUPP;
1519 }
1520
1521 static int s3c2410_udc_start(struct usb_gadget *g,
1522 struct usb_gadget_driver *driver);
1523 static int s3c2410_udc_stop(struct usb_gadget *g);
1524
1525 static const struct usb_gadget_ops s3c2410_ops = {
1526 .get_frame = s3c2410_udc_get_frame,
1527 .wakeup = s3c2410_udc_wakeup,
1528 .set_selfpowered = s3c2410_udc_set_selfpowered,
1529 .pullup = s3c2410_udc_pullup,
1530 .vbus_session = s3c2410_udc_vbus_session,
1531 .vbus_draw = s3c2410_vbus_draw,
1532 .udc_start = s3c2410_udc_start,
1533 .udc_stop = s3c2410_udc_stop,
1534 };
1535
1536 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1537 {
1538 if (!udc_info)
1539 return;
1540
1541 if (udc_info->udc_command) {
1542 udc_info->udc_command(cmd);
1543 } else if (gpio_is_valid(udc_info->pullup_pin)) {
1544 int value;
1545
1546 switch (cmd) {
1547 case S3C2410_UDC_P_ENABLE:
1548 value = 1;
1549 break;
1550 case S3C2410_UDC_P_DISABLE:
1551 value = 0;
1552 break;
1553 default:
1554 return;
1555 }
1556 value ^= udc_info->pullup_pin_inverted;
1557
1558 gpio_set_value(udc_info->pullup_pin, value);
1559 }
1560 }
1561
1562 /*------------------------- gadget driver handling---------------------------*/
1563 /*
1564 * s3c2410_udc_disable
1565 */
1566 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1567 {
1568 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1569
1570 /* Disable all interrupts */
1571 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1572 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1573
1574 /* Clear the interrupt registers */
1575 udc_write(S3C2410_UDC_USBINT_RESET
1576 | S3C2410_UDC_USBINT_RESUME
1577 | S3C2410_UDC_USBINT_SUSPEND,
1578 S3C2410_UDC_USB_INT_REG);
1579
1580 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1581
1582 /* Good bye, cruel world */
1583 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1584
1585 /* Set speed to unknown */
1586 dev->gadget.speed = USB_SPEED_UNKNOWN;
1587 }
1588
1589 /*
1590 * s3c2410_udc_reinit
1591 */
1592 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1593 {
1594 u32 i;
1595
1596 /* device/ep0 records init */
1597 INIT_LIST_HEAD(&dev->gadget.ep_list);
1598 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1599 dev->ep0state = EP0_IDLE;
1600
1601 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1602 struct s3c2410_ep *ep = &dev->ep[i];
1603
1604 if (i != 0)
1605 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1606
1607 ep->dev = dev;
1608 ep->ep.desc = NULL;
1609 ep->halted = 0;
1610 INIT_LIST_HEAD(&ep->queue);
1611 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1612 }
1613 }
1614
1615 /*
1616 * s3c2410_udc_enable
1617 */
1618 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1619 {
1620 int i;
1621
1622 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1623
1624 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1625 dev->gadget.speed = USB_SPEED_FULL;
1626
1627 /* Set MAXP for all endpoints */
1628 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1629 udc_write(i, S3C2410_UDC_INDEX_REG);
1630 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1631 S3C2410_UDC_MAXP_REG);
1632 }
1633
1634 /* Set default power state */
1635 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1636
1637 /* Enable reset and suspend interrupt interrupts */
1638 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1639 S3C2410_UDC_USB_INT_EN_REG);
1640
1641 /* Enable ep0 interrupt */
1642 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1643
1644 /* time to say "hello, world" */
1645 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1646 }
1647
1648 static int s3c2410_udc_start(struct usb_gadget *g,
1649 struct usb_gadget_driver *driver)
1650 {
1651 struct s3c2410_udc *udc = to_s3c2410(g);
1652
1653 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1654
1655 /* Hook the driver */
1656 udc->driver = driver;
1657
1658 /* Enable udc */
1659 s3c2410_udc_enable(udc);
1660
1661 return 0;
1662 }
1663
1664 static int s3c2410_udc_stop(struct usb_gadget *g)
1665 {
1666 struct s3c2410_udc *udc = to_s3c2410(g);
1667
1668 udc->driver = NULL;
1669
1670 /* Disable udc */
1671 s3c2410_udc_disable(udc);
1672
1673 return 0;
1674 }
1675
1676 /*---------------------------------------------------------------------------*/
1677 static struct s3c2410_udc memory = {
1678 .gadget = {
1679 .ops = &s3c2410_ops,
1680 .ep0 = &memory.ep[0].ep,
1681 .name = gadget_name,
1682 .dev = {
1683 .init_name = "gadget",
1684 },
1685 },
1686
1687 /* control endpoint */
1688 .ep[0] = {
1689 .num = 0,
1690 .ep = {
1691 .name = ep0name,
1692 .ops = &s3c2410_ep_ops,
1693 .maxpacket = EP0_FIFO_SIZE,
1694 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1695 USB_EP_CAPS_DIR_ALL),
1696 },
1697 .dev = &memory,
1698 },
1699
1700 /* first group of endpoints */
1701 .ep[1] = {
1702 .num = 1,
1703 .ep = {
1704 .name = "ep1-bulk",
1705 .ops = &s3c2410_ep_ops,
1706 .maxpacket = EP_FIFO_SIZE,
1707 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1708 USB_EP_CAPS_DIR_ALL),
1709 },
1710 .dev = &memory,
1711 .fifo_size = EP_FIFO_SIZE,
1712 .bEndpointAddress = 1,
1713 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1714 },
1715 .ep[2] = {
1716 .num = 2,
1717 .ep = {
1718 .name = "ep2-bulk",
1719 .ops = &s3c2410_ep_ops,
1720 .maxpacket = EP_FIFO_SIZE,
1721 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1722 USB_EP_CAPS_DIR_ALL),
1723 },
1724 .dev = &memory,
1725 .fifo_size = EP_FIFO_SIZE,
1726 .bEndpointAddress = 2,
1727 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1728 },
1729 .ep[3] = {
1730 .num = 3,
1731 .ep = {
1732 .name = "ep3-bulk",
1733 .ops = &s3c2410_ep_ops,
1734 .maxpacket = EP_FIFO_SIZE,
1735 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1736 USB_EP_CAPS_DIR_ALL),
1737 },
1738 .dev = &memory,
1739 .fifo_size = EP_FIFO_SIZE,
1740 .bEndpointAddress = 3,
1741 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1742 },
1743 .ep[4] = {
1744 .num = 4,
1745 .ep = {
1746 .name = "ep4-bulk",
1747 .ops = &s3c2410_ep_ops,
1748 .maxpacket = EP_FIFO_SIZE,
1749 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1750 USB_EP_CAPS_DIR_ALL),
1751 },
1752 .dev = &memory,
1753 .fifo_size = EP_FIFO_SIZE,
1754 .bEndpointAddress = 4,
1755 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1756 }
1757
1758 };
1759
1760 /*
1761 * probe - binds to the platform device
1762 */
1763 static int s3c2410_udc_probe(struct platform_device *pdev)
1764 {
1765 struct s3c2410_udc *udc = &memory;
1766 struct device *dev = &pdev->dev;
1767 int retval;
1768 int irq;
1769
1770 dev_dbg(dev, "%s()\n", __func__);
1771
1772 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1773 if (IS_ERR(usb_bus_clock)) {
1774 dev_err(dev, "failed to get usb bus clock source\n");
1775 return PTR_ERR(usb_bus_clock);
1776 }
1777
1778 clk_prepare_enable(usb_bus_clock);
1779
1780 udc_clock = clk_get(NULL, "usb-device");
1781 if (IS_ERR(udc_clock)) {
1782 dev_err(dev, "failed to get udc clock source\n");
1783 return PTR_ERR(udc_clock);
1784 }
1785
1786 clk_prepare_enable(udc_clock);
1787
1788 mdelay(10);
1789
1790 dev_dbg(dev, "got and enabled clocks\n");
1791
1792 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1793 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1794 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1795 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1796 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1797 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1798 }
1799
1800 spin_lock_init(&udc->lock);
1801 udc_info = dev_get_platdata(&pdev->dev);
1802
1803 rsrc_start = S3C2410_PA_USBDEV;
1804 rsrc_len = S3C24XX_SZ_USBDEV;
1805
1806 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1807 return -EBUSY;
1808
1809 base_addr = ioremap(rsrc_start, rsrc_len);
1810 if (!base_addr) {
1811 retval = -ENOMEM;
1812 goto err_mem;
1813 }
1814
1815 the_controller = udc;
1816 platform_set_drvdata(pdev, udc);
1817
1818 s3c2410_udc_disable(udc);
1819 s3c2410_udc_reinit(udc);
1820
1821 /* irq setup after old hardware state is cleaned up */
1822 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1823 0, gadget_name, udc);
1824
1825 if (retval != 0) {
1826 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1827 retval = -EBUSY;
1828 goto err_map;
1829 }
1830
1831 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1832
1833 if (udc_info && udc_info->vbus_pin > 0) {
1834 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1835 if (retval < 0) {
1836 dev_err(dev, "cannot claim vbus pin\n");
1837 goto err_int;
1838 }
1839
1840 irq = gpio_to_irq(udc_info->vbus_pin);
1841 if (irq < 0) {
1842 dev_err(dev, "no irq for gpio vbus pin\n");
1843 retval = irq;
1844 goto err_gpio_claim;
1845 }
1846
1847 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1848 IRQF_TRIGGER_RISING
1849 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1850 gadget_name, udc);
1851
1852 if (retval != 0) {
1853 dev_err(dev, "can't get vbus irq %d, err %d\n",
1854 irq, retval);
1855 retval = -EBUSY;
1856 goto err_gpio_claim;
1857 }
1858
1859 dev_dbg(dev, "got irq %i\n", irq);
1860 } else {
1861 udc->vbus = 1;
1862 }
1863
1864 if (udc_info && !udc_info->udc_command &&
1865 gpio_is_valid(udc_info->pullup_pin)) {
1866
1867 retval = gpio_request_one(udc_info->pullup_pin,
1868 udc_info->vbus_pin_inverted ?
1869 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1870 "udc pullup");
1871 if (retval)
1872 goto err_vbus_irq;
1873 }
1874
1875 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1876 if (retval)
1877 goto err_add_udc;
1878
1879 if (s3c2410_udc_debugfs_root) {
1880 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1881 s3c2410_udc_debugfs_root,
1882 udc, &s3c2410_udc_debugfs_fops);
1883 if (!udc->regs_info)
1884 dev_warn(dev, "debugfs file creation failed\n");
1885 }
1886
1887 dev_dbg(dev, "probe ok\n");
1888
1889 return 0;
1890
1891 err_add_udc:
1892 if (udc_info && !udc_info->udc_command &&
1893 gpio_is_valid(udc_info->pullup_pin))
1894 gpio_free(udc_info->pullup_pin);
1895 err_vbus_irq:
1896 if (udc_info && udc_info->vbus_pin > 0)
1897 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1898 err_gpio_claim:
1899 if (udc_info && udc_info->vbus_pin > 0)
1900 gpio_free(udc_info->vbus_pin);
1901 err_int:
1902 free_irq(IRQ_USBD, udc);
1903 err_map:
1904 iounmap(base_addr);
1905 err_mem:
1906 release_mem_region(rsrc_start, rsrc_len);
1907
1908 return retval;
1909 }
1910
1911 /*
1912 * s3c2410_udc_remove
1913 */
1914 static int s3c2410_udc_remove(struct platform_device *pdev)
1915 {
1916 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1917 unsigned int irq;
1918
1919 dev_dbg(&pdev->dev, "%s()\n", __func__);
1920
1921 if (udc->driver)
1922 return -EBUSY;
1923
1924 usb_del_gadget_udc(&udc->gadget);
1925 debugfs_remove(udc->regs_info);
1926
1927 if (udc_info && !udc_info->udc_command &&
1928 gpio_is_valid(udc_info->pullup_pin))
1929 gpio_free(udc_info->pullup_pin);
1930
1931 if (udc_info && udc_info->vbus_pin > 0) {
1932 irq = gpio_to_irq(udc_info->vbus_pin);
1933 free_irq(irq, udc);
1934 }
1935
1936 free_irq(IRQ_USBD, udc);
1937
1938 iounmap(base_addr);
1939 release_mem_region(rsrc_start, rsrc_len);
1940
1941 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1942 clk_disable_unprepare(udc_clock);
1943 clk_put(udc_clock);
1944 udc_clock = NULL;
1945 }
1946
1947 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1948 clk_disable_unprepare(usb_bus_clock);
1949 clk_put(usb_bus_clock);
1950 usb_bus_clock = NULL;
1951 }
1952
1953 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1954 return 0;
1955 }
1956
1957 #ifdef CONFIG_PM
1958 static int
1959 s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1960 {
1961 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1962
1963 return 0;
1964 }
1965
1966 static int s3c2410_udc_resume(struct platform_device *pdev)
1967 {
1968 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1969
1970 return 0;
1971 }
1972 #else
1973 #define s3c2410_udc_suspend NULL
1974 #define s3c2410_udc_resume NULL
1975 #endif
1976
1977 static const struct platform_device_id s3c_udc_ids[] = {
1978 { "s3c2410-usbgadget", },
1979 { "s3c2440-usbgadget", },
1980 { }
1981 };
1982 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1983
1984 static struct platform_driver udc_driver_24x0 = {
1985 .driver = {
1986 .name = "s3c24x0-usbgadget",
1987 },
1988 .probe = s3c2410_udc_probe,
1989 .remove = s3c2410_udc_remove,
1990 .suspend = s3c2410_udc_suspend,
1991 .resume = s3c2410_udc_resume,
1992 .id_table = s3c_udc_ids,
1993 };
1994
1995 static int __init udc_init(void)
1996 {
1997 int retval;
1998
1999 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2000
2001 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2002 if (IS_ERR(s3c2410_udc_debugfs_root)) {
2003 pr_err("%s: debugfs dir creation failed %ld\n",
2004 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2005 s3c2410_udc_debugfs_root = NULL;
2006 }
2007
2008 retval = platform_driver_register(&udc_driver_24x0);
2009 if (retval)
2010 goto err;
2011
2012 return 0;
2013
2014 err:
2015 debugfs_remove(s3c2410_udc_debugfs_root);
2016 return retval;
2017 }
2018
2019 static void __exit udc_exit(void)
2020 {
2021 platform_driver_unregister(&udc_driver_24x0);
2022 debugfs_remove(s3c2410_udc_debugfs_root);
2023 }
2024
2025 module_init(udc_init);
2026 module_exit(udc_exit);
2027
2028 MODULE_AUTHOR(DRIVER_AUTHOR);
2029 MODULE_DESCRIPTION(DRIVER_DESC);
2030 MODULE_VERSION(DRIVER_VERSION);
2031 MODULE_LICENSE("GPL");
Linux with added FPC-III support