dm thin metadata: fix __udivdi3 undefined on 32-bit
[linux/fpc-iii.git] / drivers / usb / phy / phy-fsl-usb.c
blob85d031ce85c1fcbd7453d087e794b64338ec1f2b
1 /*
2 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
4 * Author: Li Yang <LeoLi@freescale.com>
5 * Jerry Huang <Chang-Ming.Huang@freescale.com>
7 * Initialization based on code from Shlomi Gridish.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28 #include <linux/proc_fs.h>
29 #include <linux/errno.h>
30 #include <linux/interrupt.h>
31 #include <linux/io.h>
32 #include <linux/timer.h>
33 #include <linux/usb.h>
34 #include <linux/device.h>
35 #include <linux/usb/ch9.h>
36 #include <linux/usb/gadget.h>
37 #include <linux/workqueue.h>
38 #include <linux/time.h>
39 #include <linux/fsl_devices.h>
40 #include <linux/platform_device.h>
41 #include <linux/uaccess.h>
43 #include <asm/unaligned.h>
45 #include "phy-fsl-usb.h"
47 #define DRIVER_VERSION "Rev. 1.55"
48 #define DRIVER_AUTHOR "Jerry Huang/Li Yang"
49 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
50 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
52 static const char driver_name[] = "fsl-usb2-otg";
54 const pm_message_t otg_suspend_state = {
55 .event = 1,
58 #define HA_DATA_PULSE
60 static struct usb_dr_mmap *usb_dr_regs;
61 static struct fsl_otg *fsl_otg_dev;
62 static int srp_wait_done;
64 /* FSM timers */
65 struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
66 *b_ase0_brst_tmr, *b_se0_srp_tmr;
68 /* Driver specific timers */
69 struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
70 *b_srp_wait_tmr, *a_wait_enum_tmr;
72 static struct list_head active_timers;
74 static struct fsl_otg_config fsl_otg_initdata = {
75 .otg_port = 1,
78 #ifdef CONFIG_PPC32
79 static u32 _fsl_readl_be(const unsigned __iomem *p)
81 return in_be32(p);
84 static u32 _fsl_readl_le(const unsigned __iomem *p)
86 return in_le32(p);
89 static void _fsl_writel_be(u32 v, unsigned __iomem *p)
91 out_be32(p, v);
94 static void _fsl_writel_le(u32 v, unsigned __iomem *p)
96 out_le32(p, v);
99 static u32 (*_fsl_readl)(const unsigned __iomem *p);
100 static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
102 #define fsl_readl(p) (*_fsl_readl)((p))
103 #define fsl_writel(v, p) (*_fsl_writel)((v), (p))
105 #else
106 #define fsl_readl(addr) readl(addr)
107 #define fsl_writel(val, addr) writel(val, addr)
108 #endif /* CONFIG_PPC32 */
110 int write_ulpi(u8 addr, u8 data)
112 u32 temp;
114 temp = 0x60000000 | (addr << 16) | data;
115 fsl_writel(temp, &usb_dr_regs->ulpiview);
116 return 0;
119 /* -------------------------------------------------------------*/
120 /* Operations that will be called from OTG Finite State Machine */
122 /* Charge vbus for vbus pulsing in SRP */
123 void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
125 u32 tmp;
127 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
129 if (on)
130 /* stop discharging, start charging */
131 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
132 OTGSC_CTRL_VBUS_CHARGE;
133 else
134 /* stop charging */
135 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
137 fsl_writel(tmp, &usb_dr_regs->otgsc);
140 /* Discharge vbus through a resistor to ground */
141 void fsl_otg_dischrg_vbus(int on)
143 u32 tmp;
145 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
147 if (on)
148 /* stop charging, start discharging */
149 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
150 OTGSC_CTRL_VBUS_DISCHARGE;
151 else
152 /* stop discharging */
153 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
155 fsl_writel(tmp, &usb_dr_regs->otgsc);
158 /* A-device driver vbus, controlled through PP bit in PORTSC */
159 void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
161 u32 tmp;
163 if (on) {
164 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
165 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
166 } else {
167 tmp = fsl_readl(&usb_dr_regs->portsc) &
168 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
169 fsl_writel(tmp, &usb_dr_regs->portsc);
174 * Pull-up D+, signalling connect by periperal. Also used in
175 * data-line pulsing in SRP
177 void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
179 u32 tmp;
181 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
183 if (on)
184 tmp |= OTGSC_CTRL_DATA_PULSING;
185 else
186 tmp &= ~OTGSC_CTRL_DATA_PULSING;
188 fsl_writel(tmp, &usb_dr_regs->otgsc);
192 * Generate SOF by host. This is controlled through suspend/resume the
193 * port. In host mode, controller will automatically send SOF.
194 * Suspend will block the data on the port.
196 void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
198 u32 tmp;
200 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
201 if (on)
202 tmp |= PORTSC_PORT_FORCE_RESUME;
203 else
204 tmp |= PORTSC_PORT_SUSPEND;
206 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
210 /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
211 void fsl_otg_start_pulse(struct otg_fsm *fsm)
213 u32 tmp;
215 srp_wait_done = 0;
216 #ifdef HA_DATA_PULSE
217 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
218 tmp |= OTGSC_HA_DATA_PULSE;
219 fsl_writel(tmp, &usb_dr_regs->otgsc);
220 #else
221 fsl_otg_loc_conn(1);
222 #endif
224 fsl_otg_add_timer(fsm, b_data_pulse_tmr);
227 void b_data_pulse_end(unsigned long foo)
229 #ifdef HA_DATA_PULSE
230 #else
231 fsl_otg_loc_conn(0);
232 #endif
234 /* Do VBUS pulse after data pulse */
235 fsl_otg_pulse_vbus();
238 void fsl_otg_pulse_vbus(void)
240 srp_wait_done = 0;
241 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
242 /* start the timer to end vbus charge */
243 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
246 void b_vbus_pulse_end(unsigned long foo)
248 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
251 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
252 * we need to discharge the bus for a while to distinguish
253 * residual voltage of vbus pulsing and A device pull up
255 fsl_otg_dischrg_vbus(1);
256 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
259 void b_srp_end(unsigned long foo)
261 fsl_otg_dischrg_vbus(0);
262 srp_wait_done = 1;
264 if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
265 fsl_otg_dev->fsm.b_sess_vld)
266 fsl_otg_dev->fsm.b_srp_done = 1;
270 * Workaround for a_host suspending too fast. When a_bus_req=0,
271 * a_host will start by SRP. It needs to set b_hnp_enable before
272 * actually suspending to start HNP
274 void a_wait_enum(unsigned long foo)
276 VDBG("a_wait_enum timeout\n");
277 if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
278 fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
279 else
280 otg_statemachine(&fsl_otg_dev->fsm);
283 /* The timeout callback function to set time out bit */
284 void set_tmout(unsigned long indicator)
286 *(int *)indicator = 1;
289 /* Initialize timers */
290 int fsl_otg_init_timers(struct otg_fsm *fsm)
292 /* FSM used timers */
293 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
294 (unsigned long)&fsm->a_wait_vrise_tmout);
295 if (!a_wait_vrise_tmr)
296 return -ENOMEM;
298 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
299 (unsigned long)&fsm->a_wait_bcon_tmout);
300 if (!a_wait_bcon_tmr)
301 return -ENOMEM;
303 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
304 (unsigned long)&fsm->a_aidl_bdis_tmout);
305 if (!a_aidl_bdis_tmr)
306 return -ENOMEM;
308 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
309 (unsigned long)&fsm->b_ase0_brst_tmout);
310 if (!b_ase0_brst_tmr)
311 return -ENOMEM;
313 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
314 (unsigned long)&fsm->b_se0_srp);
315 if (!b_se0_srp_tmr)
316 return -ENOMEM;
318 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
319 (unsigned long)&fsm->b_srp_done);
320 if (!b_srp_fail_tmr)
321 return -ENOMEM;
323 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
324 (unsigned long)&fsm);
325 if (!a_wait_enum_tmr)
326 return -ENOMEM;
328 /* device driver used timers */
329 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
330 if (!b_srp_wait_tmr)
331 return -ENOMEM;
333 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
334 TB_DATA_PLS, 0);
335 if (!b_data_pulse_tmr)
336 return -ENOMEM;
338 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
339 TB_VBUS_PLS, 0);
340 if (!b_vbus_pulse_tmr)
341 return -ENOMEM;
343 return 0;
346 /* Uninitialize timers */
347 void fsl_otg_uninit_timers(void)
349 /* FSM used timers */
350 kfree(a_wait_vrise_tmr);
351 kfree(a_wait_bcon_tmr);
352 kfree(a_aidl_bdis_tmr);
353 kfree(b_ase0_brst_tmr);
354 kfree(b_se0_srp_tmr);
355 kfree(b_srp_fail_tmr);
356 kfree(a_wait_enum_tmr);
358 /* device driver used timers */
359 kfree(b_srp_wait_tmr);
360 kfree(b_data_pulse_tmr);
361 kfree(b_vbus_pulse_tmr);
364 static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
366 struct fsl_otg_timer *timer;
368 /* REVISIT: use array of pointers to timers instead */
369 switch (t) {
370 case A_WAIT_VRISE:
371 timer = a_wait_vrise_tmr;
372 break;
373 case A_WAIT_BCON:
374 timer = a_wait_vrise_tmr;
375 break;
376 case A_AIDL_BDIS:
377 timer = a_wait_vrise_tmr;
378 break;
379 case B_ASE0_BRST:
380 timer = a_wait_vrise_tmr;
381 break;
382 case B_SE0_SRP:
383 timer = a_wait_vrise_tmr;
384 break;
385 case B_SRP_FAIL:
386 timer = a_wait_vrise_tmr;
387 break;
388 case A_WAIT_ENUM:
389 timer = a_wait_vrise_tmr;
390 break;
391 default:
392 timer = NULL;
395 return timer;
398 /* Add timer to timer list */
399 void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
401 struct fsl_otg_timer *timer = gtimer;
402 struct fsl_otg_timer *tmp_timer;
405 * Check if the timer is already in the active list,
406 * if so update timer count
408 list_for_each_entry(tmp_timer, &active_timers, list)
409 if (tmp_timer == timer) {
410 timer->count = timer->expires;
411 return;
413 timer->count = timer->expires;
414 list_add_tail(&timer->list, &active_timers);
417 static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
419 struct fsl_otg_timer *timer;
421 timer = fsl_otg_get_timer(t);
422 if (!timer)
423 return;
425 fsl_otg_add_timer(fsm, timer);
428 /* Remove timer from the timer list; clear timeout status */
429 void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
431 struct fsl_otg_timer *timer = gtimer;
432 struct fsl_otg_timer *tmp_timer, *del_tmp;
434 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
435 if (tmp_timer == timer)
436 list_del(&timer->list);
439 static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
441 struct fsl_otg_timer *timer;
443 timer = fsl_otg_get_timer(t);
444 if (!timer)
445 return;
447 fsl_otg_del_timer(fsm, timer);
450 /* Reset controller, not reset the bus */
451 void otg_reset_controller(void)
453 u32 command;
455 command = fsl_readl(&usb_dr_regs->usbcmd);
456 command |= (1 << 1);
457 fsl_writel(command, &usb_dr_regs->usbcmd);
458 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
462 /* Call suspend/resume routines in host driver */
463 int fsl_otg_start_host(struct otg_fsm *fsm, int on)
465 struct usb_otg *otg = fsm->otg;
466 struct device *dev;
467 struct fsl_otg *otg_dev =
468 container_of(otg->usb_phy, struct fsl_otg, phy);
469 u32 retval = 0;
471 if (!otg->host)
472 return -ENODEV;
473 dev = otg->host->controller;
476 * Update a_vbus_vld state as a_vbus_vld int is disabled
477 * in device mode
479 fsm->a_vbus_vld =
480 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
481 if (on) {
482 /* start fsl usb host controller */
483 if (otg_dev->host_working)
484 goto end;
485 else {
486 otg_reset_controller();
487 VDBG("host on......\n");
488 if (dev->driver->pm && dev->driver->pm->resume) {
489 retval = dev->driver->pm->resume(dev);
490 if (fsm->id) {
491 /* default-b */
492 fsl_otg_drv_vbus(fsm, 1);
494 * Workaround: b_host can't driver
495 * vbus, but PP in PORTSC needs to
496 * be 1 for host to work.
497 * So we set drv_vbus bit in
498 * transceiver to 0 thru ULPI.
500 write_ulpi(0x0c, 0x20);
504 otg_dev->host_working = 1;
506 } else {
507 /* stop fsl usb host controller */
508 if (!otg_dev->host_working)
509 goto end;
510 else {
511 VDBG("host off......\n");
512 if (dev && dev->driver) {
513 if (dev->driver->pm && dev->driver->pm->suspend)
514 retval = dev->driver->pm->suspend(dev);
515 if (fsm->id)
516 /* default-b */
517 fsl_otg_drv_vbus(fsm, 0);
519 otg_dev->host_working = 0;
522 end:
523 return retval;
527 * Call suspend and resume function in udc driver
528 * to stop and start udc driver.
530 int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
532 struct usb_otg *otg = fsm->otg;
533 struct device *dev;
535 if (!otg->gadget || !otg->gadget->dev.parent)
536 return -ENODEV;
538 VDBG("gadget %s\n", on ? "on" : "off");
539 dev = otg->gadget->dev.parent;
541 if (on) {
542 if (dev->driver->resume)
543 dev->driver->resume(dev);
544 } else {
545 if (dev->driver->suspend)
546 dev->driver->suspend(dev, otg_suspend_state);
549 return 0;
553 * Called by initialization code of host driver. Register host controller
554 * to the OTG. Suspend host for OTG role detection.
556 static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
558 struct fsl_otg *otg_dev;
560 if (!otg)
561 return -ENODEV;
563 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
564 if (otg_dev != fsl_otg_dev)
565 return -ENODEV;
567 otg->host = host;
569 otg_dev->fsm.a_bus_drop = 0;
570 otg_dev->fsm.a_bus_req = 1;
572 if (host) {
573 VDBG("host off......\n");
575 otg->host->otg_port = fsl_otg_initdata.otg_port;
576 otg->host->is_b_host = otg_dev->fsm.id;
578 * must leave time for hub_wq to finish its thing
579 * before yanking the host driver out from under it,
580 * so suspend the host after a short delay.
582 otg_dev->host_working = 1;
583 schedule_delayed_work(&otg_dev->otg_event, 100);
584 return 0;
585 } else {
586 /* host driver going away */
587 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
588 OTGSC_STS_USB_ID)) {
589 /* Mini-A cable connected */
590 struct otg_fsm *fsm = &otg_dev->fsm;
592 otg->state = OTG_STATE_UNDEFINED;
593 fsm->protocol = PROTO_UNDEF;
597 otg_dev->host_working = 0;
599 otg_statemachine(&otg_dev->fsm);
601 return 0;
604 /* Called by initialization code of udc. Register udc to OTG. */
605 static int fsl_otg_set_peripheral(struct usb_otg *otg,
606 struct usb_gadget *gadget)
608 struct fsl_otg *otg_dev;
610 if (!otg)
611 return -ENODEV;
613 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
614 VDBG("otg_dev 0x%x\n", (int)otg_dev);
615 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
616 if (otg_dev != fsl_otg_dev)
617 return -ENODEV;
619 if (!gadget) {
620 if (!otg->default_a)
621 otg->gadget->ops->vbus_draw(otg->gadget, 0);
622 usb_gadget_vbus_disconnect(otg->gadget);
623 otg->gadget = 0;
624 otg_dev->fsm.b_bus_req = 0;
625 otg_statemachine(&otg_dev->fsm);
626 return 0;
629 otg->gadget = gadget;
630 otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
632 otg_dev->fsm.b_bus_req = 1;
634 /* start the gadget right away if the ID pin says Mini-B */
635 pr_debug("ID pin=%d\n", otg_dev->fsm.id);
636 if (otg_dev->fsm.id == 1) {
637 fsl_otg_start_host(&otg_dev->fsm, 0);
638 otg_drv_vbus(&otg_dev->fsm, 0);
639 fsl_otg_start_gadget(&otg_dev->fsm, 1);
642 return 0;
645 /* Set OTG port power, only for B-device */
646 static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA)
648 if (!fsl_otg_dev)
649 return -ENODEV;
650 if (phy->otg->state == OTG_STATE_B_PERIPHERAL)
651 pr_info("FSL OTG: Draw %d mA\n", mA);
653 return 0;
657 * Delayed pin detect interrupt processing.
659 * When the Mini-A cable is disconnected from the board,
660 * the pin-detect interrupt happens before the disconnect
661 * interrupts for the connected device(s). In order to
662 * process the disconnect interrupt(s) prior to switching
663 * roles, the pin-detect interrupts are delayed, and handled
664 * by this routine.
666 static void fsl_otg_event(struct work_struct *work)
668 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
669 struct otg_fsm *fsm = &og->fsm;
671 if (fsm->id) { /* switch to gadget */
672 fsl_otg_start_host(fsm, 0);
673 otg_drv_vbus(fsm, 0);
674 fsl_otg_start_gadget(fsm, 1);
678 /* B-device start SRP */
679 static int fsl_otg_start_srp(struct usb_otg *otg)
681 struct fsl_otg *otg_dev;
683 if (!otg || otg->state != OTG_STATE_B_IDLE)
684 return -ENODEV;
686 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
687 if (otg_dev != fsl_otg_dev)
688 return -ENODEV;
690 otg_dev->fsm.b_bus_req = 1;
691 otg_statemachine(&otg_dev->fsm);
693 return 0;
696 /* A_host suspend will call this function to start hnp */
697 static int fsl_otg_start_hnp(struct usb_otg *otg)
699 struct fsl_otg *otg_dev;
701 if (!otg)
702 return -ENODEV;
704 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
705 if (otg_dev != fsl_otg_dev)
706 return -ENODEV;
708 pr_debug("start_hnp...\n");
710 /* clear a_bus_req to enter a_suspend state */
711 otg_dev->fsm.a_bus_req = 0;
712 otg_statemachine(&otg_dev->fsm);
714 return 0;
718 * Interrupt handler. OTG/host/peripheral share the same int line.
719 * OTG driver clears OTGSC interrupts and leaves USB interrupts
720 * intact. It needs to have knowledge of some USB interrupts
721 * such as port change.
723 irqreturn_t fsl_otg_isr(int irq, void *dev_id)
725 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
726 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
727 u32 otg_int_src, otg_sc;
729 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
730 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
732 /* Only clear otg interrupts */
733 fsl_writel(otg_sc, &usb_dr_regs->otgsc);
735 /*FIXME: ID change not generate when init to 0 */
736 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
737 otg->default_a = (fsm->id == 0);
739 /* process OTG interrupts */
740 if (otg_int_src) {
741 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
742 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
743 otg->default_a = (fsm->id == 0);
744 /* clear conn information */
745 if (fsm->id)
746 fsm->b_conn = 0;
747 else
748 fsm->a_conn = 0;
750 if (otg->host)
751 otg->host->is_b_host = fsm->id;
752 if (otg->gadget)
753 otg->gadget->is_a_peripheral = !fsm->id;
754 VDBG("ID int (ID is %d)\n", fsm->id);
756 if (fsm->id) { /* switch to gadget */
757 schedule_delayed_work(
758 &((struct fsl_otg *)dev_id)->otg_event,
759 100);
760 } else { /* switch to host */
761 cancel_delayed_work(&
762 ((struct fsl_otg *)dev_id)->
763 otg_event);
764 fsl_otg_start_gadget(fsm, 0);
765 otg_drv_vbus(fsm, 1);
766 fsl_otg_start_host(fsm, 1);
768 return IRQ_HANDLED;
771 return IRQ_NONE;
774 static struct otg_fsm_ops fsl_otg_ops = {
775 .chrg_vbus = fsl_otg_chrg_vbus,
776 .drv_vbus = fsl_otg_drv_vbus,
777 .loc_conn = fsl_otg_loc_conn,
778 .loc_sof = fsl_otg_loc_sof,
779 .start_pulse = fsl_otg_start_pulse,
781 .add_timer = fsl_otg_fsm_add_timer,
782 .del_timer = fsl_otg_fsm_del_timer,
784 .start_host = fsl_otg_start_host,
785 .start_gadget = fsl_otg_start_gadget,
788 /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
789 static int fsl_otg_conf(struct platform_device *pdev)
791 struct fsl_otg *fsl_otg_tc;
792 int status;
794 if (fsl_otg_dev)
795 return 0;
797 /* allocate space to fsl otg device */
798 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
799 if (!fsl_otg_tc)
800 return -ENOMEM;
802 fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
803 if (!fsl_otg_tc->phy.otg) {
804 kfree(fsl_otg_tc);
805 return -ENOMEM;
808 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
810 INIT_LIST_HEAD(&active_timers);
811 status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
812 if (status) {
813 pr_info("Couldn't init OTG timers\n");
814 goto err;
816 mutex_init(&fsl_otg_tc->fsm.lock);
818 /* Set OTG state machine operations */
819 fsl_otg_tc->fsm.ops = &fsl_otg_ops;
821 /* initialize the otg structure */
822 fsl_otg_tc->phy.label = DRIVER_DESC;
823 fsl_otg_tc->phy.dev = &pdev->dev;
824 fsl_otg_tc->phy.set_power = fsl_otg_set_power;
826 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
827 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
828 fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
829 fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
830 fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
832 fsl_otg_dev = fsl_otg_tc;
834 /* Store the otg transceiver */
835 status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
836 if (status) {
837 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
838 goto err;
841 return 0;
842 err:
843 fsl_otg_uninit_timers();
844 kfree(fsl_otg_tc->phy.otg);
845 kfree(fsl_otg_tc);
846 return status;
849 /* OTG Initialization */
850 int usb_otg_start(struct platform_device *pdev)
852 struct fsl_otg *p_otg;
853 struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
854 struct otg_fsm *fsm;
855 int status;
856 struct resource *res;
857 u32 temp;
858 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
860 p_otg = container_of(otg_trans, struct fsl_otg, phy);
861 fsm = &p_otg->fsm;
863 /* Initialize the state machine structure with default values */
864 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
865 fsm->otg = p_otg->phy.otg;
867 /* We don't require predefined MEM/IRQ resource index */
868 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
869 if (!res)
870 return -ENXIO;
872 /* We don't request_mem_region here to enable resource sharing
873 * with host/device */
875 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
876 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
877 pdata->regs = (void *)usb_dr_regs;
879 if (pdata->init && pdata->init(pdev) != 0)
880 return -EINVAL;
882 #ifdef CONFIG_PPC32
883 if (pdata->big_endian_mmio) {
884 _fsl_readl = _fsl_readl_be;
885 _fsl_writel = _fsl_writel_be;
886 } else {
887 _fsl_readl = _fsl_readl_le;
888 _fsl_writel = _fsl_writel_le;
890 #endif
892 /* request irq */
893 p_otg->irq = platform_get_irq(pdev, 0);
894 status = request_irq(p_otg->irq, fsl_otg_isr,
895 IRQF_SHARED, driver_name, p_otg);
896 if (status) {
897 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
898 p_otg->irq, status);
899 iounmap(p_otg->dr_mem_map);
900 kfree(p_otg->phy.otg);
901 kfree(p_otg);
902 return status;
905 /* stop the controller */
906 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
907 temp &= ~USB_CMD_RUN_STOP;
908 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
910 /* reset the controller */
911 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
912 temp |= USB_CMD_CTRL_RESET;
913 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
915 /* wait reset completed */
916 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
919 /* configure the VBUSHS as IDLE(both host and device) */
920 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
921 fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
923 /* configure PHY interface */
924 temp = fsl_readl(&p_otg->dr_mem_map->portsc);
925 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
926 switch (pdata->phy_mode) {
927 case FSL_USB2_PHY_ULPI:
928 temp |= PORTSC_PTS_ULPI;
929 break;
930 case FSL_USB2_PHY_UTMI_WIDE:
931 temp |= PORTSC_PTW_16BIT;
932 /* fall through */
933 case FSL_USB2_PHY_UTMI:
934 temp |= PORTSC_PTS_UTMI;
935 /* fall through */
936 default:
937 break;
939 fsl_writel(temp, &p_otg->dr_mem_map->portsc);
941 if (pdata->have_sysif_regs) {
942 /* configure control enable IO output, big endian register */
943 temp = __raw_readl(&p_otg->dr_mem_map->control);
944 temp |= USB_CTRL_IOENB;
945 __raw_writel(temp, &p_otg->dr_mem_map->control);
948 /* disable all interrupt and clear all OTGSC status */
949 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
950 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
951 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
952 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
955 * The identification (id) input is FALSE when a Mini-A plug is inserted
956 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
957 * Also: record initial state of ID pin
959 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
960 p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
961 p_otg->fsm.id = 1;
962 } else {
963 p_otg->phy.otg->state = OTG_STATE_A_IDLE;
964 p_otg->fsm.id = 0;
967 pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
969 /* enable OTG ID pin interrupt */
970 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
971 temp |= OTGSC_INTR_USB_ID_EN;
972 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
973 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
975 return 0;
979 * state file in sysfs
981 static ssize_t show_fsl_usb2_otg_state(struct device *dev,
982 struct device_attribute *attr, char *buf)
984 struct otg_fsm *fsm = &fsl_otg_dev->fsm;
985 char *next = buf;
986 unsigned size = PAGE_SIZE;
987 int t;
989 mutex_lock(&fsm->lock);
991 /* basic driver infomation */
992 t = scnprintf(next, size,
993 DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
994 DRIVER_VERSION);
995 size -= t;
996 next += t;
998 /* Registers */
999 t = scnprintf(next, size,
1000 "OTGSC: 0x%08x\n"
1001 "PORTSC: 0x%08x\n"
1002 "USBMODE: 0x%08x\n"
1003 "USBCMD: 0x%08x\n"
1004 "USBSTS: 0x%08x\n"
1005 "USBINTR: 0x%08x\n",
1006 fsl_readl(&usb_dr_regs->otgsc),
1007 fsl_readl(&usb_dr_regs->portsc),
1008 fsl_readl(&usb_dr_regs->usbmode),
1009 fsl_readl(&usb_dr_regs->usbcmd),
1010 fsl_readl(&usb_dr_regs->usbsts),
1011 fsl_readl(&usb_dr_regs->usbintr));
1012 size -= t;
1013 next += t;
1015 /* State */
1016 t = scnprintf(next, size,
1017 "OTG state: %s\n\n",
1018 usb_otg_state_string(fsl_otg_dev->phy.otg->state));
1019 size -= t;
1020 next += t;
1022 /* State Machine Variables */
1023 t = scnprintf(next, size,
1024 "a_bus_req: %d\n"
1025 "b_bus_req: %d\n"
1026 "a_bus_resume: %d\n"
1027 "a_bus_suspend: %d\n"
1028 "a_conn: %d\n"
1029 "a_sess_vld: %d\n"
1030 "a_srp_det: %d\n"
1031 "a_vbus_vld: %d\n"
1032 "b_bus_resume: %d\n"
1033 "b_bus_suspend: %d\n"
1034 "b_conn: %d\n"
1035 "b_se0_srp: %d\n"
1036 "b_ssend_srp: %d\n"
1037 "b_sess_vld: %d\n"
1038 "id: %d\n",
1039 fsm->a_bus_req,
1040 fsm->b_bus_req,
1041 fsm->a_bus_resume,
1042 fsm->a_bus_suspend,
1043 fsm->a_conn,
1044 fsm->a_sess_vld,
1045 fsm->a_srp_det,
1046 fsm->a_vbus_vld,
1047 fsm->b_bus_resume,
1048 fsm->b_bus_suspend,
1049 fsm->b_conn,
1050 fsm->b_se0_srp,
1051 fsm->b_ssend_srp,
1052 fsm->b_sess_vld,
1053 fsm->id);
1054 size -= t;
1055 next += t;
1057 mutex_unlock(&fsm->lock);
1059 return PAGE_SIZE - size;
1062 static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1065 /* Char driver interface to control some OTG input */
1068 * Handle some ioctl command, such as get otg
1069 * status and set host suspend
1071 static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1072 unsigned long arg)
1074 u32 retval = 0;
1076 switch (cmd) {
1077 case GET_OTG_STATUS:
1078 retval = fsl_otg_dev->host_working;
1079 break;
1081 case SET_A_SUSPEND_REQ:
1082 fsl_otg_dev->fsm.a_suspend_req_inf = arg;
1083 break;
1085 case SET_A_BUS_DROP:
1086 fsl_otg_dev->fsm.a_bus_drop = arg;
1087 break;
1089 case SET_A_BUS_REQ:
1090 fsl_otg_dev->fsm.a_bus_req = arg;
1091 break;
1093 case SET_B_BUS_REQ:
1094 fsl_otg_dev->fsm.b_bus_req = arg;
1095 break;
1097 default:
1098 break;
1101 otg_statemachine(&fsl_otg_dev->fsm);
1103 return retval;
1106 static int fsl_otg_open(struct inode *inode, struct file *file)
1108 return 0;
1111 static int fsl_otg_release(struct inode *inode, struct file *file)
1113 return 0;
1116 static const struct file_operations otg_fops = {
1117 .owner = THIS_MODULE,
1118 .llseek = NULL,
1119 .read = NULL,
1120 .write = NULL,
1121 .unlocked_ioctl = fsl_otg_ioctl,
1122 .open = fsl_otg_open,
1123 .release = fsl_otg_release,
1126 static int fsl_otg_probe(struct platform_device *pdev)
1128 int ret;
1130 if (!dev_get_platdata(&pdev->dev))
1131 return -ENODEV;
1133 /* configure the OTG */
1134 ret = fsl_otg_conf(pdev);
1135 if (ret) {
1136 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1137 return ret;
1140 /* start OTG */
1141 ret = usb_otg_start(pdev);
1142 if (ret) {
1143 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1144 return ret;
1147 ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1148 if (ret) {
1149 dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1150 return ret;
1153 ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1154 if (ret)
1155 dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1157 return ret;
1160 static int fsl_otg_remove(struct platform_device *pdev)
1162 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
1164 usb_remove_phy(&fsl_otg_dev->phy);
1165 free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1167 iounmap((void *)usb_dr_regs);
1169 fsl_otg_uninit_timers();
1170 kfree(fsl_otg_dev->phy.otg);
1171 kfree(fsl_otg_dev);
1173 device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1175 unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1177 if (pdata->exit)
1178 pdata->exit(pdev);
1180 return 0;
1183 struct platform_driver fsl_otg_driver = {
1184 .probe = fsl_otg_probe,
1185 .remove = fsl_otg_remove,
1186 .driver = {
1187 .name = driver_name,
1188 .owner = THIS_MODULE,
1192 module_platform_driver(fsl_otg_driver);
1194 MODULE_DESCRIPTION(DRIVER_INFO);
1195 MODULE_AUTHOR(DRIVER_AUTHOR);
1196 MODULE_LICENSE("GPL");