drivers/pwm/pwm-lpc32xx.c

   1 /*
   2  * Copyright 2012 Alexandre Pereira da Silva <aletes.xgr@gmail.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2.
   7  *
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/err.h>
  12 #include <linux/io.h>
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/of_address.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/pwm.h>
  19 #include <linux/slab.h>
  20
  21 struct lpc32xx_pwm_chip {
  22         struct pwm_chip chip;
  23         struct clk *clk;
  24         void __iomem *base;
  25 };
  26
  27 #define PWM_ENABLE      (1 << 31)
  28 #define PWM_RELOADV(x)  (((x) & 0xFF) << 8)
  29 #define PWM_DUTY(x)     ((x) & 0xFF)
  30
  31 #define to_lpc32xx_pwm_chip(_chip) \
  32         container_of(_chip, struct lpc32xx_pwm_chip, chip)
  33
  34 static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  35                               int duty_ns, int period_ns)
  36 {
  37         struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
  38         unsigned long long c;
  39         int period_cycles, duty_cycles;
  40
  41         c = clk_get_rate(lpc32xx->clk) / 256;
  42         c = c * period_ns;
  43         do_div(c, NSEC_PER_SEC);
  44
  45         /* Handle high and low extremes */
  46         if (c == 0)
  47                 c = 1;
  48         if (c > 255)
  49                 c = 0; /* 0 set division by 256 */
  50         period_cycles = c;
  51
  52         /* The duty-cycle value is as follows:
  53          *
  54          *  DUTY-CYCLE     HIGH LEVEL
  55          *      1            99.9%
  56          *      25           90.0%
  57          *      128          50.0%
  58          *      220          10.0%
  59          *      255           0.1%
  60          *      0             0.0%
  61          *
  62          * In other words, the register value is duty-cycle % 256 with
  63          * duty-cycle in the range 1-256.
  64          */
  65         c = 256 * duty_ns;
  66         do_div(c, period_ns);
  67         if (c > 255)
  68                 c = 255;
  69         duty_cycles = 256 - c;
  70
  71         writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
  72                 lpc32xx->base + (pwm->hwpwm << 2));
  73
  74         return 0;
  75 }
  76
  77 static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  78 {
  79         struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
  80
  81         return clk_enable(lpc32xx->clk);
  82 }
  83
  84 static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  85 {
  86         struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
  87
  88         writel(0, lpc32xx->base + (pwm->hwpwm << 2));
  89         clk_disable(lpc32xx->clk);
  90 }
  91
  92 static const struct pwm_ops lpc32xx_pwm_ops = {
  93         .config = lpc32xx_pwm_config,
  94         .enable = lpc32xx_pwm_enable,
  95         .disable = lpc32xx_pwm_disable,
  96         .owner = THIS_MODULE,
  97 };
  98
  99 static int lpc32xx_pwm_probe(struct platform_device *pdev)
 100 {
 101         struct lpc32xx_pwm_chip *lpc32xx;
 102         struct resource *res;
 103         int ret;
 104
 105         lpc32xx = devm_kzalloc(&pdev->dev, sizeof(*lpc32xx), GFP_KERNEL);
 106         if (!lpc32xx)
 107                 return -ENOMEM;
 108
 109         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 110         if (!res)
 111                 return -EINVAL;
 112
 113         lpc32xx->base = devm_request_and_ioremap(&pdev->dev, res);
 114         if (!lpc32xx->base)
 115                 return -EADDRNOTAVAIL;
 116
 117         lpc32xx->clk = devm_clk_get(&pdev->dev, NULL);
 118         if (IS_ERR(lpc32xx->clk))
 119                 return PTR_ERR(lpc32xx->clk);
 120
 121         lpc32xx->chip.dev = &pdev->dev;
 122         lpc32xx->chip.ops = &lpc32xx_pwm_ops;
 123         lpc32xx->chip.npwm = 2;
 124         lpc32xx->chip.base = -1;
 125
 126         ret = pwmchip_add(&lpc32xx->chip);
 127         if (ret < 0) {
 128                 dev_err(&pdev->dev, "failed to add PWM chip, error %d\n", ret);
 129                 return ret;
 130         }
 131
 132         platform_set_drvdata(pdev, lpc32xx);
 133
 134         return 0;
 135 }
 136
 137 static int lpc32xx_pwm_remove(struct platform_device *pdev)
 138 {
 139         struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
 140         unsigned int i;
 141
 142         for (i = 0; i < lpc32xx->chip.npwm; i++)
 143                 pwm_disable(&lpc32xx->chip.pwms[i]);
 144
 145         return pwmchip_remove(&lpc32xx->chip);
 146 }
 147
 148 static struct of_device_id lpc32xx_pwm_dt_ids[] = {
 149         { .compatible = "nxp,lpc3220-pwm", },
 150         { /* sentinel */ }
 151 };
 152 MODULE_DEVICE_TABLE(of, lpc32xx_pwm_dt_ids);
 153
 154 static struct platform_driver lpc32xx_pwm_driver = {
 155         .driver = {
 156                 .name = "lpc32xx-pwm",
 157                 .of_match_table = of_match_ptr(lpc32xx_pwm_dt_ids),
 158         },
 159         .probe = lpc32xx_pwm_probe,
 160         .remove = lpc32xx_pwm_remove,
 161 };
 162 module_platform_driver(lpc32xx_pwm_driver);
 163
 164 MODULE_ALIAS("platform:lpc32xx-pwm");
 165 MODULE_AUTHOR("Alexandre Pereira da Silva <aletes.xgr@gmail.com>");
 166 MODULE_DESCRIPTION("LPC32XX PWM Driver");
 167 MODULE_LICENSE("GPL v2");