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perf build: Get rid of LIB_INCLUDE variable
[linux/fpc-iii.git] / drivers / regulator / tps65910-regulator.c
blobe2cffe01b8072263330b28164130cf2fd23953b5
1 /*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/err.h>
20 #include <linux/platform_device.h>
21 #include <linux/regulator/driver.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/slab.h>
24 #include <linux/gpio.h>
25 #include <linux/mfd/tps65910.h>
26 #include <linux/regulator/of_regulator.h>
27
28 #define TPS65910_SUPPLY_STATE_ENABLED 0x1
29 #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
31 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
33
34 /* supported VIO voltages in microvolts */
35 static const unsigned int VIO_VSEL_table[] = {
36 1500000, 1800000, 2500000, 3300000,
37 };
38
39 /* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
41 /* supported VRTC voltages in microvolts */
42 static const unsigned int VRTC_VSEL_table[] = {
43 1800000,
44 };
45
46 /* supported VDD3 voltages in microvolts */
47 static const unsigned int VDD3_VSEL_table[] = {
48 5000000,
49 };
50
51 /* supported VDIG1 voltages in microvolts */
52 static const unsigned int VDIG1_VSEL_table[] = {
53 1200000, 1500000, 1800000, 2700000,
54 };
55
56 /* supported VDIG2 voltages in microvolts */
57 static const unsigned int VDIG2_VSEL_table[] = {
58 1000000, 1100000, 1200000, 1800000,
59 };
60
61 /* supported VPLL voltages in microvolts */
62 static const unsigned int VPLL_VSEL_table[] = {
63 1000000, 1100000, 1800000, 2500000,
64 };
65
66 /* supported VDAC voltages in microvolts */
67 static const unsigned int VDAC_VSEL_table[] = {
68 1800000, 2600000, 2800000, 2850000,
69 };
70
71 /* supported VAUX1 voltages in microvolts */
72 static const unsigned int VAUX1_VSEL_table[] = {
73 1800000, 2500000, 2800000, 2850000,
74 };
75
76 /* supported VAUX2 voltages in microvolts */
77 static const unsigned int VAUX2_VSEL_table[] = {
78 1800000, 2800000, 2900000, 3300000,
79 };
80
81 /* supported VAUX33 voltages in microvolts */
82 static const unsigned int VAUX33_VSEL_table[] = {
83 1800000, 2000000, 2800000, 3300000,
84 };
85
86 /* supported VMMC voltages in microvolts */
87 static const unsigned int VMMC_VSEL_table[] = {
88 1800000, 2800000, 3000000, 3300000,
89 };
90
91 /* supported BBCH voltages in microvolts */
92 static const unsigned int VBB_VSEL_table[] = {
93 3000000, 2520000, 3150000, 5000000,
94 };
95
96 struct tps_info {
97 const char *name;
98 const char *vin_name;
99 u8 n_voltages;
100 const unsigned int *voltage_table;
101 int enable_time_us;
102 };
103
104 static struct tps_info tps65910_regs[] = {
105 {
106 .name = "vrtc",
107 .vin_name = "vcc7",
108 .n_voltages = ARRAY_SIZE(VRTC_VSEL_table),
109 .voltage_table = VRTC_VSEL_table,
110 .enable_time_us = 2200,
111 },
112 {
113 .name = "vio",
114 .vin_name = "vccio",
115 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
116 .voltage_table = VIO_VSEL_table,
117 .enable_time_us = 350,
118 },
119 {
120 .name = "vdd1",
121 .vin_name = "vcc1",
122 .enable_time_us = 350,
123 },
124 {
125 .name = "vdd2",
126 .vin_name = "vcc2",
127 .enable_time_us = 350,
128 },
129 {
130 .name = "vdd3",
131 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
132 .voltage_table = VDD3_VSEL_table,
133 .enable_time_us = 200,
134 },
135 {
136 .name = "vdig1",
137 .vin_name = "vcc6",
138 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
139 .voltage_table = VDIG1_VSEL_table,
140 .enable_time_us = 100,
141 },
142 {
143 .name = "vdig2",
144 .vin_name = "vcc6",
145 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
146 .voltage_table = VDIG2_VSEL_table,
147 .enable_time_us = 100,
148 },
149 {
150 .name = "vpll",
151 .vin_name = "vcc5",
152 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
153 .voltage_table = VPLL_VSEL_table,
154 .enable_time_us = 100,
155 },
156 {
157 .name = "vdac",
158 .vin_name = "vcc5",
159 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
160 .voltage_table = VDAC_VSEL_table,
161 .enable_time_us = 100,
162 },
163 {
164 .name = "vaux1",
165 .vin_name = "vcc4",
166 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
167 .voltage_table = VAUX1_VSEL_table,
168 .enable_time_us = 100,
169 },
170 {
171 .name = "vaux2",
172 .vin_name = "vcc4",
173 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
174 .voltage_table = VAUX2_VSEL_table,
175 .enable_time_us = 100,
176 },
177 {
178 .name = "vaux33",
179 .vin_name = "vcc3",
180 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
181 .voltage_table = VAUX33_VSEL_table,
182 .enable_time_us = 100,
183 },
184 {
185 .name = "vmmc",
186 .vin_name = "vcc3",
187 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
188 .voltage_table = VMMC_VSEL_table,
189 .enable_time_us = 100,
190 },
191 {
192 .name = "vbb",
193 .vin_name = "vcc7",
194 .n_voltages = ARRAY_SIZE(VBB_VSEL_table),
195 .voltage_table = VBB_VSEL_table,
196 },
197 };
198
199 static struct tps_info tps65911_regs[] = {
200 {
201 .name = "vrtc",
202 .vin_name = "vcc7",
203 .enable_time_us = 2200,
204 },
205 {
206 .name = "vio",
207 .vin_name = "vccio",
208 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
209 .voltage_table = VIO_VSEL_table,
210 .enable_time_us = 350,
211 },
212 {
213 .name = "vdd1",
214 .vin_name = "vcc1",
215 .n_voltages = 0x4C,
216 .enable_time_us = 350,
217 },
218 {
219 .name = "vdd2",
220 .vin_name = "vcc2",
221 .n_voltages = 0x4C,
222 .enable_time_us = 350,
223 },
224 {
225 .name = "vddctrl",
226 .n_voltages = 0x44,
227 .enable_time_us = 900,
228 },
229 {
230 .name = "ldo1",
231 .vin_name = "vcc6",
232 .n_voltages = 0x33,
233 .enable_time_us = 420,
234 },
235 {
236 .name = "ldo2",
237 .vin_name = "vcc6",
238 .n_voltages = 0x33,
239 .enable_time_us = 420,
240 },
241 {
242 .name = "ldo3",
243 .vin_name = "vcc5",
244 .n_voltages = 0x1A,
245 .enable_time_us = 230,
246 },
247 {
248 .name = "ldo4",
249 .vin_name = "vcc5",
250 .n_voltages = 0x33,
251 .enable_time_us = 230,
252 },
253 {
254 .name = "ldo5",
255 .vin_name = "vcc4",
256 .n_voltages = 0x1A,
257 .enable_time_us = 230,
258 },
259 {
260 .name = "ldo6",
261 .vin_name = "vcc3",
262 .n_voltages = 0x1A,
263 .enable_time_us = 230,
264 },
265 {
266 .name = "ldo7",
267 .vin_name = "vcc3",
268 .n_voltages = 0x1A,
269 .enable_time_us = 230,
270 },
271 {
272 .name = "ldo8",
273 .vin_name = "vcc3",
274 .n_voltages = 0x1A,
275 .enable_time_us = 230,
276 },
277 };
278
279 #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
280 static unsigned int tps65910_ext_sleep_control[] = {
281 0,
282 EXT_CONTROL_REG_BITS(VIO, 1, 0),
283 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
284 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
285 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
286 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
287 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
288 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
289 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
290 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
291 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
292 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
293 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
294 };
295
296 static unsigned int tps65911_ext_sleep_control[] = {
297 0,
298 EXT_CONTROL_REG_BITS(VIO, 1, 0),
299 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
300 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
301 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
302 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
303 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
304 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
305 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
306 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
307 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
308 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
309 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
310 };
311
312 struct tps65910_reg {
313 struct regulator_desc *desc;
314 struct tps65910 *mfd;
315 struct regulator_dev **rdev;
316 struct tps_info **info;
317 int num_regulators;
318 int mode;
319 int (*get_ctrl_reg)(int);
320 unsigned int *ext_sleep_control;
321 unsigned int board_ext_control[TPS65910_NUM_REGS];
322 };
323
324 static int tps65910_get_ctrl_register(int id)
325 {
326 switch (id) {
327 case TPS65910_REG_VRTC:
328 return TPS65910_VRTC;
329 case TPS65910_REG_VIO:
330 return TPS65910_VIO;
331 case TPS65910_REG_VDD1:
332 return TPS65910_VDD1;
333 case TPS65910_REG_VDD2:
334 return TPS65910_VDD2;
335 case TPS65910_REG_VDD3:
336 return TPS65910_VDD3;
337 case TPS65910_REG_VDIG1:
338 return TPS65910_VDIG1;
339 case TPS65910_REG_VDIG2:
340 return TPS65910_VDIG2;
341 case TPS65910_REG_VPLL:
342 return TPS65910_VPLL;
343 case TPS65910_REG_VDAC:
344 return TPS65910_VDAC;
345 case TPS65910_REG_VAUX1:
346 return TPS65910_VAUX1;
347 case TPS65910_REG_VAUX2:
348 return TPS65910_VAUX2;
349 case TPS65910_REG_VAUX33:
350 return TPS65910_VAUX33;
351 case TPS65910_REG_VMMC:
352 return TPS65910_VMMC;
353 case TPS65910_REG_VBB:
354 return TPS65910_BBCH;
355 default:
356 return -EINVAL;
357 }
358 }
359
360 static int tps65911_get_ctrl_register(int id)
361 {
362 switch (id) {
363 case TPS65910_REG_VRTC:
364 return TPS65910_VRTC;
365 case TPS65910_REG_VIO:
366 return TPS65910_VIO;
367 case TPS65910_REG_VDD1:
368 return TPS65910_VDD1;
369 case TPS65910_REG_VDD2:
370 return TPS65910_VDD2;
371 case TPS65911_REG_VDDCTRL:
372 return TPS65911_VDDCTRL;
373 case TPS65911_REG_LDO1:
374 return TPS65911_LDO1;
375 case TPS65911_REG_LDO2:
376 return TPS65911_LDO2;
377 case TPS65911_REG_LDO3:
378 return TPS65911_LDO3;
379 case TPS65911_REG_LDO4:
380 return TPS65911_LDO4;
381 case TPS65911_REG_LDO5:
382 return TPS65911_LDO5;
383 case TPS65911_REG_LDO6:
384 return TPS65911_LDO6;
385 case TPS65911_REG_LDO7:
386 return TPS65911_LDO7;
387 case TPS65911_REG_LDO8:
388 return TPS65911_LDO8;
389 default:
390 return -EINVAL;
391 }
392 }
393
394 static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
395 {
396 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
397 struct tps65910 *mfd = pmic->mfd;
398 int reg, value, id = rdev_get_id(dev);
399
400 reg = pmic->get_ctrl_reg(id);
401 if (reg < 0)
402 return reg;
403
404 switch (mode) {
405 case REGULATOR_MODE_NORMAL:
406 return tps65910_reg_update_bits(pmic->mfd, reg,
407 LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
408 LDO_ST_ON_BIT);
409 case REGULATOR_MODE_IDLE:
410 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
411 return tps65910_reg_set_bits(mfd, reg, value);
412 case REGULATOR_MODE_STANDBY:
413 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
414 }
415
416 return -EINVAL;
417 }
418
419 static unsigned int tps65910_get_mode(struct regulator_dev *dev)
420 {
421 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
422 int ret, reg, value, id = rdev_get_id(dev);
423
424 reg = pmic->get_ctrl_reg(id);
425 if (reg < 0)
426 return reg;
427
428 ret = tps65910_reg_read(pmic->mfd, reg, &value);
429 if (ret < 0)
430 return ret;
431
432 if (!(value & LDO_ST_ON_BIT))
433 return REGULATOR_MODE_STANDBY;
434 else if (value & LDO_ST_MODE_BIT)
435 return REGULATOR_MODE_IDLE;
436 else
437 return REGULATOR_MODE_NORMAL;
438 }
439
440 static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
441 {
442 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
443 int ret, id = rdev_get_id(dev);
444 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
445
446 switch (id) {
447 case TPS65910_REG_VDD1:
448 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
449 if (ret < 0)
450 return ret;
451 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
452 if (ret < 0)
453 return ret;
454 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
455 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
456 if (ret < 0)
457 return ret;
458 sr = opvsel & VDD1_OP_CMD_MASK;
459 opvsel &= VDD1_OP_SEL_MASK;
460 srvsel &= VDD1_SR_SEL_MASK;
461 vselmax = 75;
462 break;
463 case TPS65910_REG_VDD2:
464 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
465 if (ret < 0)
466 return ret;
467 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
468 if (ret < 0)
469 return ret;
470 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
471 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
472 if (ret < 0)
473 return ret;
474 sr = opvsel & VDD2_OP_CMD_MASK;
475 opvsel &= VDD2_OP_SEL_MASK;
476 srvsel &= VDD2_SR_SEL_MASK;
477 vselmax = 75;
478 break;
479 case TPS65911_REG_VDDCTRL:
480 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
481 &opvsel);
482 if (ret < 0)
483 return ret;
484 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
485 &srvsel);
486 if (ret < 0)
487 return ret;
488 sr = opvsel & VDDCTRL_OP_CMD_MASK;
489 opvsel &= VDDCTRL_OP_SEL_MASK;
490 srvsel &= VDDCTRL_SR_SEL_MASK;
491 vselmax = 64;
492 break;
493 }
494
495 /* multiplier 0 == 1 but 2,3 normal */
496 if (!mult)
497 mult = 1;
498
499 if (sr) {
500 /* normalise to valid range */
501 if (srvsel < 3)
502 srvsel = 3;
503 if (srvsel > vselmax)
504 srvsel = vselmax;
505 return srvsel - 3;
506 } else {
507
508 /* normalise to valid range*/
509 if (opvsel < 3)
510 opvsel = 3;
511 if (opvsel > vselmax)
512 opvsel = vselmax;
513 return opvsel - 3;
514 }
515 return -EINVAL;
516 }
517
518 static int tps65910_get_voltage_sel(struct regulator_dev *dev)
519 {
520 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
521 int ret, reg, value, id = rdev_get_id(dev);
522
523 reg = pmic->get_ctrl_reg(id);
524 if (reg < 0)
525 return reg;
526
527 ret = tps65910_reg_read(pmic->mfd, reg, &value);
528 if (ret < 0)
529 return ret;
530
531 switch (id) {
532 case TPS65910_REG_VIO:
533 case TPS65910_REG_VDIG1:
534 case TPS65910_REG_VDIG2:
535 case TPS65910_REG_VPLL:
536 case TPS65910_REG_VDAC:
537 case TPS65910_REG_VAUX1:
538 case TPS65910_REG_VAUX2:
539 case TPS65910_REG_VAUX33:
540 case TPS65910_REG_VMMC:
541 value &= LDO_SEL_MASK;
542 value >>= LDO_SEL_SHIFT;
543 break;
544 case TPS65910_REG_VBB:
545 value &= BBCH_BBSEL_MASK;
546 value >>= BBCH_BBSEL_SHIFT;
547 break;
548 default:
549 return -EINVAL;
550 }
551
552 return value;
553 }
554
555 static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
556 {
557 return dev->desc->volt_table[0];
558 }
559
560 static int tps65911_get_voltage_sel(struct regulator_dev *dev)
561 {
562 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
563 int ret, id = rdev_get_id(dev);
564 unsigned int value, reg;
565
566 reg = pmic->get_ctrl_reg(id);
567
568 ret = tps65910_reg_read(pmic->mfd, reg, &value);
569 if (ret < 0)
570 return ret;
571
572 switch (id) {
573 case TPS65911_REG_LDO1:
574 case TPS65911_REG_LDO2:
575 case TPS65911_REG_LDO4:
576 value &= LDO1_SEL_MASK;
577 value >>= LDO_SEL_SHIFT;
578 break;
579 case TPS65911_REG_LDO3:
580 case TPS65911_REG_LDO5:
581 case TPS65911_REG_LDO6:
582 case TPS65911_REG_LDO7:
583 case TPS65911_REG_LDO8:
584 value &= LDO3_SEL_MASK;
585 value >>= LDO_SEL_SHIFT;
586 break;
587 case TPS65910_REG_VIO:
588 value &= LDO_SEL_MASK;
589 value >>= LDO_SEL_SHIFT;
590 break;
591 default:
592 return -EINVAL;
593 }
594
595 return value;
596 }
597
598 static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
599 unsigned selector)
600 {
601 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
602 int id = rdev_get_id(dev), vsel;
603 int dcdc_mult = 0;
604
605 switch (id) {
606 case TPS65910_REG_VDD1:
607 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
608 if (dcdc_mult == 1)
609 dcdc_mult--;
610 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
611
612 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
613 VDD1_VGAIN_SEL_MASK,
614 dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
615 tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
616 break;
617 case TPS65910_REG_VDD2:
618 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
619 if (dcdc_mult == 1)
620 dcdc_mult--;
621 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
622
623 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
624 VDD1_VGAIN_SEL_MASK,
625 dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
626 tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
627 break;
628 case TPS65911_REG_VDDCTRL:
629 vsel = selector + 3;
630 tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
631 }
632
633 return 0;
634 }
635
636 static int tps65910_set_voltage_sel(struct regulator_dev *dev,
637 unsigned selector)
638 {
639 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
640 int reg, id = rdev_get_id(dev);
641
642 reg = pmic->get_ctrl_reg(id);
643 if (reg < 0)
644 return reg;
645
646 switch (id) {
647 case TPS65910_REG_VIO:
648 case TPS65910_REG_VDIG1:
649 case TPS65910_REG_VDIG2:
650 case TPS65910_REG_VPLL:
651 case TPS65910_REG_VDAC:
652 case TPS65910_REG_VAUX1:
653 case TPS65910_REG_VAUX2:
654 case TPS65910_REG_VAUX33:
655 case TPS65910_REG_VMMC:
656 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
657 selector << LDO_SEL_SHIFT);
658 case TPS65910_REG_VBB:
659 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
660 selector << BBCH_BBSEL_SHIFT);
661 }
662
663 return -EINVAL;
664 }
665
666 static int tps65911_set_voltage_sel(struct regulator_dev *dev,
667 unsigned selector)
668 {
669 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
670 int reg, id = rdev_get_id(dev);
671
672 reg = pmic->get_ctrl_reg(id);
673 if (reg < 0)
674 return reg;
675
676 switch (id) {
677 case TPS65911_REG_LDO1:
678 case TPS65911_REG_LDO2:
679 case TPS65911_REG_LDO4:
680 return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
681 selector << LDO_SEL_SHIFT);
682 case TPS65911_REG_LDO3:
683 case TPS65911_REG_LDO5:
684 case TPS65911_REG_LDO6:
685 case TPS65911_REG_LDO7:
686 case TPS65911_REG_LDO8:
687 return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
688 selector << LDO_SEL_SHIFT);
689 case TPS65910_REG_VIO:
690 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
691 selector << LDO_SEL_SHIFT);
692 case TPS65910_REG_VBB:
693 return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
694 selector << BBCH_BBSEL_SHIFT);
695 }
696
697 return -EINVAL;
698 }
699
700
701 static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
702 unsigned selector)
703 {
704 int volt, mult = 1, id = rdev_get_id(dev);
705
706 switch (id) {
707 case TPS65910_REG_VDD1:
708 case TPS65910_REG_VDD2:
709 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
710 volt = VDD1_2_MIN_VOLT +
711 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
712 break;
713 case TPS65911_REG_VDDCTRL:
714 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
715 break;
716 default:
717 BUG();
718 return -EINVAL;
719 }
720
721 return volt * 100 * mult;
722 }
723
724 static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
725 {
726 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
727 int step_mv = 0, id = rdev_get_id(dev);
728
729 switch (id) {
730 case TPS65911_REG_LDO1:
731 case TPS65911_REG_LDO2:
732 case TPS65911_REG_LDO4:
733 /* The first 5 values of the selector correspond to 1V */
734 if (selector < 5)
735 selector = 0;
736 else
737 selector -= 4;
738
739 step_mv = 50;
740 break;
741 case TPS65911_REG_LDO3:
742 case TPS65911_REG_LDO5:
743 case TPS65911_REG_LDO6:
744 case TPS65911_REG_LDO7:
745 case TPS65911_REG_LDO8:
746 /* The first 3 values of the selector correspond to 1V */
747 if (selector < 3)
748 selector = 0;
749 else
750 selector -= 2;
751
752 step_mv = 100;
753 break;
754 case TPS65910_REG_VIO:
755 return pmic->info[id]->voltage_table[selector];
756 default:
757 return -EINVAL;
758 }
759
760 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
761 }
762
763 /* Regulator ops (except VRTC) */
764 static struct regulator_ops tps65910_ops_dcdc = {
765 .is_enabled = regulator_is_enabled_regmap,
766 .enable = regulator_enable_regmap,
767 .disable = regulator_disable_regmap,
768 .set_mode = tps65910_set_mode,
769 .get_mode = tps65910_get_mode,
770 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
771 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
772 .set_voltage_time_sel = regulator_set_voltage_time_sel,
773 .list_voltage = tps65910_list_voltage_dcdc,
774 .map_voltage = regulator_map_voltage_ascend,
775 };
776
777 static struct regulator_ops tps65910_ops_vdd3 = {
778 .is_enabled = regulator_is_enabled_regmap,
779 .enable = regulator_enable_regmap,
780 .disable = regulator_disable_regmap,
781 .set_mode = tps65910_set_mode,
782 .get_mode = tps65910_get_mode,
783 .get_voltage = tps65910_get_voltage_vdd3,
784 .list_voltage = regulator_list_voltage_table,
785 .map_voltage = regulator_map_voltage_ascend,
786 };
787
788 static struct regulator_ops tps65910_ops_vbb = {
789 .is_enabled = regulator_is_enabled_regmap,
790 .enable = regulator_enable_regmap,
791 .disable = regulator_disable_regmap,
792 .set_mode = tps65910_set_mode,
793 .get_mode = tps65910_get_mode,
794 .get_voltage_sel = tps65910_get_voltage_sel,
795 .set_voltage_sel = tps65910_set_voltage_sel,
796 .list_voltage = regulator_list_voltage_table,
797 .map_voltage = regulator_map_voltage_iterate,
798 };
799
800 static struct regulator_ops tps65910_ops = {
801 .is_enabled = regulator_is_enabled_regmap,
802 .enable = regulator_enable_regmap,
803 .disable = regulator_disable_regmap,
804 .set_mode = tps65910_set_mode,
805 .get_mode = tps65910_get_mode,
806 .get_voltage_sel = tps65910_get_voltage_sel,
807 .set_voltage_sel = tps65910_set_voltage_sel,
808 .list_voltage = regulator_list_voltage_table,
809 .map_voltage = regulator_map_voltage_ascend,
810 };
811
812 static struct regulator_ops tps65911_ops = {
813 .is_enabled = regulator_is_enabled_regmap,
814 .enable = regulator_enable_regmap,
815 .disable = regulator_disable_regmap,
816 .set_mode = tps65910_set_mode,
817 .get_mode = tps65910_get_mode,
818 .get_voltage_sel = tps65911_get_voltage_sel,
819 .set_voltage_sel = tps65911_set_voltage_sel,
820 .list_voltage = tps65911_list_voltage,
821 .map_voltage = regulator_map_voltage_ascend,
822 };
823
824 static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
825 int id, int ext_sleep_config)
826 {
827 struct tps65910 *mfd = pmic->mfd;
828 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
829 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
830 int ret;
831
832 /*
833 * Regulator can not be control from multiple external input EN1, EN2
834 * and EN3 together.
835 */
836 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
837 int en_count;
838 en_count = ((ext_sleep_config &
839 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
840 en_count += ((ext_sleep_config &
841 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
842 en_count += ((ext_sleep_config &
843 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
844 en_count += ((ext_sleep_config &
845 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
846 if (en_count > 1) {
847 dev_err(mfd->dev,
848 "External sleep control flag is not proper\n");
849 return -EINVAL;
850 }
851 }
852
853 pmic->board_ext_control[id] = ext_sleep_config;
854
855 /* External EN1 control */
856 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
857 ret = tps65910_reg_set_bits(mfd,
858 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
859 else
860 ret = tps65910_reg_clear_bits(mfd,
861 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
862 if (ret < 0) {
863 dev_err(mfd->dev,
864 "Error in configuring external control EN1\n");
865 return ret;
866 }
867
868 /* External EN2 control */
869 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
870 ret = tps65910_reg_set_bits(mfd,
871 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
872 else
873 ret = tps65910_reg_clear_bits(mfd,
874 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
875 if (ret < 0) {
876 dev_err(mfd->dev,
877 "Error in configuring external control EN2\n");
878 return ret;
879 }
880
881 /* External EN3 control for TPS65910 LDO only */
882 if ((tps65910_chip_id(mfd) == TPS65910) &&
883 (id >= TPS65910_REG_VDIG1)) {
884 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
885 ret = tps65910_reg_set_bits(mfd,
886 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
887 else
888 ret = tps65910_reg_clear_bits(mfd,
889 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
890 if (ret < 0) {
891 dev_err(mfd->dev,
892 "Error in configuring external control EN3\n");
893 return ret;
894 }
895 }
896
897 /* Return if no external control is selected */
898 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
899 /* Clear all sleep controls */
900 ret = tps65910_reg_clear_bits(mfd,
901 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
902 if (!ret)
903 ret = tps65910_reg_clear_bits(mfd,
904 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
905 if (ret < 0)
906 dev_err(mfd->dev,
907 "Error in configuring SLEEP register\n");
908 return ret;
909 }
910
911 /*
912 * For regulator that has separate operational and sleep register make
913 * sure that operational is used and clear sleep register to turn
914 * regulator off when external control is inactive
915 */
916 if ((id == TPS65910_REG_VDD1) ||
917 (id == TPS65910_REG_VDD2) ||
918 ((id == TPS65911_REG_VDDCTRL) &&
919 (tps65910_chip_id(mfd) == TPS65911))) {
920 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
921 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
922 int opvsel, srvsel;
923
924 ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
925 if (ret < 0)
926 return ret;
927 ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
928 if (ret < 0)
929 return ret;
930
931 if (opvsel & VDD1_OP_CMD_MASK) {
932 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
933
934 ret = tps65910_reg_write(pmic->mfd, op_reg_add,
935 reg_val);
936 if (ret < 0) {
937 dev_err(mfd->dev,
938 "Error in configuring op register\n");
939 return ret;
940 }
941 }
942 ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
943 if (ret < 0) {
944 dev_err(mfd->dev, "Error in setting sr register\n");
945 return ret;
946 }
947 }
948
949 ret = tps65910_reg_clear_bits(mfd,
950 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
951 if (!ret) {
952 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
953 ret = tps65910_reg_set_bits(mfd,
954 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
955 else
956 ret = tps65910_reg_clear_bits(mfd,
957 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
958 }
959 if (ret < 0)
960 dev_err(mfd->dev,
961 "Error in configuring SLEEP register\n");
962
963 return ret;
964 }
965
966 #ifdef CONFIG_OF
967
968 static struct of_regulator_match tps65910_matches[] = {
969 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
970 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
971 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
972 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
973 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
974 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
975 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
976 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
977 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
978 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
979 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
980 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
981 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
982 { .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
983 };
984
985 static struct of_regulator_match tps65911_matches[] = {
986 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
987 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
988 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
989 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
990 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
991 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
992 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
993 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
994 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
995 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
996 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
997 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
998 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
999 };
1000
1001 static struct tps65910_board *tps65910_parse_dt_reg_data(
1002 struct platform_device *pdev,
1003 struct of_regulator_match **tps65910_reg_matches)
1004 {
1005 struct tps65910_board *pmic_plat_data;
1006 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1007 struct device_node *np, *regulators;
1008 struct of_regulator_match *matches;
1009 unsigned int prop;
1010 int idx = 0, ret, count;
1011
1012 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
1013 GFP_KERNEL);
1014 if (!pmic_plat_data)
1015 return NULL;
1016
1017 np = pdev->dev.parent->of_node;
1018 regulators = of_get_child_by_name(np, "regulators");
1019 if (!regulators) {
1020 dev_err(&pdev->dev, "regulator node not found\n");
1021 return NULL;
1022 }
1023
1024 switch (tps65910_chip_id(tps65910)) {
1025 case TPS65910:
1026 count = ARRAY_SIZE(tps65910_matches);
1027 matches = tps65910_matches;
1028 break;
1029 case TPS65911:
1030 count = ARRAY_SIZE(tps65911_matches);
1031 matches = tps65911_matches;
1032 break;
1033 default:
1034 of_node_put(regulators);
1035 dev_err(&pdev->dev, "Invalid tps chip version\n");
1036 return NULL;
1037 }
1038
1039 ret = of_regulator_match(&pdev->dev, regulators, matches, count);
1040 of_node_put(regulators);
1041 if (ret < 0) {
1042 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
1043 ret);
1044 return NULL;
1045 }
1046
1047 *tps65910_reg_matches = matches;
1048
1049 for (idx = 0; idx < count; idx++) {
1050 if (!matches[idx].of_node)
1051 continue;
1052
1053 pmic_plat_data->tps65910_pmic_init_data[idx] =
1054 matches[idx].init_data;
1055
1056 ret = of_property_read_u32(matches[idx].of_node,
1057 "ti,regulator-ext-sleep-control", &prop);
1058 if (!ret)
1059 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1060
1061 }
1062
1063 return pmic_plat_data;
1064 }
1065 #else
1066 static inline struct tps65910_board *tps65910_parse_dt_reg_data(
1067 struct platform_device *pdev,
1068 struct of_regulator_match **tps65910_reg_matches)
1069 {
1070 *tps65910_reg_matches = NULL;
1071 return NULL;
1072 }
1073 #endif
1074
1075 static int tps65910_probe(struct platform_device *pdev)
1076 {
1077 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1078 struct regulator_config config = { };
1079 struct tps_info *info;
1080 struct regulator_dev *rdev;
1081 struct tps65910_reg *pmic;
1082 struct tps65910_board *pmic_plat_data;
1083 struct of_regulator_match *tps65910_reg_matches = NULL;
1084 int i, err;
1085
1086 pmic_plat_data = dev_get_platdata(tps65910->dev);
1087 if (!pmic_plat_data && tps65910->dev->of_node)
1088 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1089 &tps65910_reg_matches);
1090
1091 if (!pmic_plat_data) {
1092 dev_err(&pdev->dev, "Platform data not found\n");
1093 return -EINVAL;
1094 }
1095
1096 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1097 if (!pmic)
1098 return -ENOMEM;
1099
1100 pmic->mfd = tps65910;
1101 platform_set_drvdata(pdev, pmic);
1102
1103 /* Give control of all register to control port */
1104 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1105 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1106
1107 switch (tps65910_chip_id(tps65910)) {
1108 case TPS65910:
1109 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
1110 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
1111 pmic->ext_sleep_control = tps65910_ext_sleep_control;
1112 info = tps65910_regs;
1113 break;
1114 case TPS65911:
1115 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
1116 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
1117 pmic->ext_sleep_control = tps65911_ext_sleep_control;
1118 info = tps65911_regs;
1119 break;
1120 default:
1121 dev_err(&pdev->dev, "Invalid tps chip version\n");
1122 return -ENODEV;
1123 }
1124
1125 pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1126 sizeof(struct regulator_desc), GFP_KERNEL);
1127 if (!pmic->desc)
1128 return -ENOMEM;
1129
1130 pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1131 sizeof(struct tps_info *), GFP_KERNEL);
1132 if (!pmic->info)
1133 return -ENOMEM;
1134
1135 pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1136 sizeof(struct regulator_dev *), GFP_KERNEL);
1137 if (!pmic->rdev)
1138 return -ENOMEM;
1139
1140 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1141 i++, info++) {
1142 /* Register the regulators */
1143 pmic->info[i] = info;
1144
1145 pmic->desc[i].name = info->name;
1146 pmic->desc[i].supply_name = info->vin_name;
1147 pmic->desc[i].id = i;
1148 pmic->desc[i].n_voltages = info->n_voltages;
1149 pmic->desc[i].enable_time = info->enable_time_us;
1150
1151 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
1152 pmic->desc[i].ops = &tps65910_ops_dcdc;
1153 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1154 VDD1_2_NUM_VOLT_COARSE;
1155 pmic->desc[i].ramp_delay = 12500;
1156 } else if (i == TPS65910_REG_VDD3) {
1157 if (tps65910_chip_id(tps65910) == TPS65910) {
1158 pmic->desc[i].ops = &tps65910_ops_vdd3;
1159 pmic->desc[i].volt_table = info->voltage_table;
1160 } else {
1161 pmic->desc[i].ops = &tps65910_ops_dcdc;
1162 pmic->desc[i].ramp_delay = 5000;
1163 }
1164 } else if (i == TPS65910_REG_VBB &&
1165 tps65910_chip_id(tps65910) == TPS65910) {
1166 pmic->desc[i].ops = &tps65910_ops_vbb;
1167 pmic->desc[i].volt_table = info->voltage_table;
1168 } else {
1169 if (tps65910_chip_id(tps65910) == TPS65910) {
1170 pmic->desc[i].ops = &tps65910_ops;
1171 pmic->desc[i].volt_table = info->voltage_table;
1172 } else {
1173 pmic->desc[i].ops = &tps65911_ops;
1174 }
1175 }
1176
1177 err = tps65910_set_ext_sleep_config(pmic, i,
1178 pmic_plat_data->regulator_ext_sleep_control[i]);
1179 /*
1180 * Failing on regulator for configuring externally control
1181 * is not a serious issue, just throw warning.
1182 */
1183 if (err < 0)
1184 dev_warn(tps65910->dev,
1185 "Failed to initialise ext control config\n");
1186
1187 pmic->desc[i].type = REGULATOR_VOLTAGE;
1188 pmic->desc[i].owner = THIS_MODULE;
1189 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1190 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
1191
1192 config.dev = tps65910->dev;
1193 config.init_data = pmic_plat_data->tps65910_pmic_init_data[i];
1194 config.driver_data = pmic;
1195 config.regmap = tps65910->regmap;
1196
1197 if (tps65910_reg_matches)
1198 config.of_node = tps65910_reg_matches[i].of_node;
1199
1200 rdev = devm_regulator_register(&pdev->dev, &pmic->desc[i],
1201 &config);
1202 if (IS_ERR(rdev)) {
1203 dev_err(tps65910->dev,
1204 "failed to register %s regulator\n",
1205 pdev->name);
1206 return PTR_ERR(rdev);
1207 }
1208
1209 /* Save regulator for cleanup */
1210 pmic->rdev[i] = rdev;
1211 }
1212 return 0;
1213 }
1214
1215 static void tps65910_shutdown(struct platform_device *pdev)
1216 {
1217 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1218 int i;
1219
1220 /*
1221 * Before bootloader jumps to kernel, it makes sure that required
1222 * external control signals are in desired state so that given rails
1223 * can be configure accordingly.
1224 * If rails are configured to be controlled from external control
1225 * then before shutting down/rebooting the system, the external
1226 * control configuration need to be remove from the rails so that
1227 * its output will be available as per register programming even
1228 * if external controls are removed. This is require when the POR
1229 * value of the control signals are not in active state and before
1230 * bootloader initializes it, the system requires the rail output
1231 * to be active for booting.
1232 */
1233 for (i = 0; i < pmic->num_regulators; i++) {
1234 int err;
1235 if (!pmic->rdev[i])
1236 continue;
1237
1238 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1239 if (err < 0)
1240 dev_err(&pdev->dev,
1241 "Error in clearing external control\n");
1242 }
1243 }
1244
1245 static struct platform_driver tps65910_driver = {
1246 .driver = {
1247 .name = "tps65910-pmic",
1248 },
1249 .probe = tps65910_probe,
1250 .shutdown = tps65910_shutdown,
1251 };
1252
1253 static int __init tps65910_init(void)
1254 {
1255 return platform_driver_register(&tps65910_driver);
1256 }
1257 subsys_initcall(tps65910_init);
1258
1259 static void __exit tps65910_cleanup(void)
1260 {
1261 platform_driver_unregister(&tps65910_driver);
1262 }
1263 module_exit(tps65910_cleanup);
1264
1265 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1266 MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
1267 MODULE_LICENSE("GPL v2");
1268 MODULE_ALIAS("platform:tps65910-pmic");
Linux with added FPC-III support