1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C Platform - GPIO core
10 #ifndef __PLAT_SAMSUNG_GPIO_CORE_H
11 #define __PLAT_SAMSUNG_GPIO_CORE_H
13 /* Bring in machine-local definitions, especially S3C_GPIO_END */
14 #include <mach/gpio-samsung.h>
16 #define GPIOCON_OFF (0x00)
17 #define GPIODAT_OFF (0x04)
19 #define con_4bit_shift(__off) ((__off) * 4)
21 /* Define the core gpiolib support functions that the s3c platforms may
22 * need to extend or change depending on the hardware and the s3c chip
23 * selected at build or found at run time.
25 * These definitions are not intended for driver inclusion, there is
26 * nothing here that should not live outside the platform and core
30 struct samsung_gpio_chip
;
33 * struct samsung_gpio_pm - power management (suspend/resume) information
34 * @save: Routine to save the state of the GPIO block
35 * @resume: Routine to resume the GPIO block.
37 struct samsung_gpio_pm
{
38 void (*save
)(struct samsung_gpio_chip
*chip
);
39 void (*resume
)(struct samsung_gpio_chip
*chip
);
42 struct samsung_gpio_cfg
;
45 * struct samsung_gpio_chip - wrapper for specific implementation of gpio
46 * @chip: The chip structure to be exported via gpiolib.
47 * @base: The base pointer to the gpio configuration registers.
48 * @group: The group register number for gpio interrupt support.
49 * @irq_base: The base irq number.
50 * @config: special function and pull-resistor control information.
51 * @lock: Lock for exclusive access to this gpio bank.
52 * @pm_save: Save information for suspend/resume support.
53 * @bitmap_gpio_int: Bitmap for representing GPIO interrupt or not.
55 * This wrapper provides the necessary information for the Samsung
56 * specific gpios being registered with gpiolib.
58 * The lock protects each gpio bank from multiple access of the shared
59 * configuration registers, or from reading of data whilst another thread
60 * is writing to the register set.
62 * Each chip has its own lock to avoid any contention between different
63 * CPU cores trying to get one lock for different GPIO banks, where each
64 * bank of GPIO has its own register space and configuration registers.
66 struct samsung_gpio_chip
{
67 struct gpio_chip chip
;
68 struct samsung_gpio_cfg
*config
;
69 struct samsung_gpio_pm
*pm
;
80 static inline struct samsung_gpio_chip
*to_samsung_gpio(struct gpio_chip
*gpc
)
82 return container_of(gpc
, struct samsung_gpio_chip
, chip
);
86 * samsung_gpiolib_to_irq - convert gpio pin to irq number
87 * @chip: The gpio chip that the pin belongs to.
88 * @offset: The offset of the pin in the chip.
90 * This helper returns the irq number calculated from the chip->irq_base and
91 * the provided offset.
93 extern int samsung_gpiolib_to_irq(struct gpio_chip
*chip
, unsigned int offset
);
95 /* exported for core SoC support to change */
96 extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default
;
98 #ifdef CONFIG_S3C_GPIO_TRACK
99 extern struct samsung_gpio_chip
*s3c_gpios
[S3C_GPIO_END
];
101 static inline struct samsung_gpio_chip
*samsung_gpiolib_getchip(unsigned int chip
)
103 return (chip
< S3C_GPIO_END
) ? s3c_gpios
[chip
] : NULL
;
106 /* machine specific code should provide samsung_gpiolib_getchip */
108 extern struct samsung_gpio_chip s3c24xx_gpios
[];
110 static inline struct samsung_gpio_chip
*samsung_gpiolib_getchip(unsigned int pin
)
112 struct samsung_gpio_chip
*chip
;
114 if (pin
> S3C_GPIO_END
)
117 chip
= &s3c24xx_gpios
[pin
/32];
118 return ((pin
- chip
->chip
.base
) < chip
->chip
.ngpio
) ? chip
: NULL
;
121 static inline void s3c_gpiolib_track(struct samsung_gpio_chip
*chip
) { }
125 extern struct samsung_gpio_pm samsung_gpio_pm_1bit
;
126 extern struct samsung_gpio_pm samsung_gpio_pm_2bit
;
127 extern struct samsung_gpio_pm samsung_gpio_pm_4bit
;
128 #define __gpio_pm(x) x
130 #define samsung_gpio_pm_1bit NULL
131 #define samsung_gpio_pm_2bit NULL
132 #define samsung_gpio_pm_4bit NULL
133 #define __gpio_pm(x) NULL
135 #endif /* CONFIG_PM */
137 /* locking wrappers to deal with multiple access to the same gpio bank */
138 #define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
139 #define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
141 #endif /* __PLAT_SAMSUNG_GPIO_CORE_H */