1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX - Memory map definitions
9 #ifndef __ASM_PLAT_MAP_S3C_H
10 #define __ASM_PLAT_MAP_S3C_H __FILE__
12 #define S3C24XX_VA_IRQ S3C_VA_IRQ
13 #define S3C24XX_VA_MEMCTRL S3C_VA_MEM
14 #define S3C24XX_VA_UART S3C_VA_UART
16 #define S3C24XX_VA_TIMER S3C_VA_TIMER
17 #define S3C24XX_VA_CLKPWR S3C_VA_SYS
18 #define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
20 #define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
21 #define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
23 #define S3C2410_PA_UART (0x50000000)
24 #define S3C24XX_PA_UART S3C2410_PA_UART
29 * the calculation for the VA of this must ensure that
30 * it is the same distance apart from the UART in the
31 * phsyical address space, as the initial mapping for the IO
32 * is done as a 1:1 mapping. This puts it (currently) at
33 * 0xFA800000, which is not in the way of any current mapping
37 #define S3C2410_PA_GPIO (0x56000000)
38 #define S3C24XX_PA_GPIO S3C2410_PA_GPIO
40 #define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
41 #define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
43 #define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
44 #define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
46 #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
49 * ISA style IO, for each machine to sort out mappings for,
50 * if it implements it. We reserve two 16M regions for ISA.
53 #define S3C2410_ADDR(x) S3C_ADDR(x)
55 #define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
56 #define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
58 /* deal with the registers that move under the 2412/2413 */
60 #if defined(CONFIG_CPU_S3C2412)
62 extern void __iomem
*s3c24xx_va_gpio2
;
64 #ifdef CONFIG_CPU_S3C2412_ONLY
65 #define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
67 #define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
70 #define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
71 #define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
74 #include <plat/map-s5p.h>
76 #endif /* __ASM_PLAT_MAP_S3C_H */