Merge 5.0-rc6 into driver-core-next
[linux/fpc-iii.git] / drivers / media / i2c / aptina-pll.h
blob1632f864c44f4aefc9799db9e9ceb03246a211b0
1 /*
2 * Aptina Sensor PLL Configuration
4 * Copyright (C) 2012 Laurent Pinchart <laurent.pinchart@ideasonboard.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
16 #ifndef __APTINA_PLL_H
17 #define __APTINA_PLL_H
19 struct aptina_pll {
20 unsigned int ext_clock;
21 unsigned int pix_clock;
23 unsigned int n;
24 unsigned int m;
25 unsigned int p1;
28 struct aptina_pll_limits {
29 unsigned int ext_clock_min;
30 unsigned int ext_clock_max;
31 unsigned int int_clock_min;
32 unsigned int int_clock_max;
33 unsigned int out_clock_min;
34 unsigned int out_clock_max;
35 unsigned int pix_clock_max;
37 unsigned int n_min;
38 unsigned int n_max;
39 unsigned int m_min;
40 unsigned int m_max;
41 unsigned int p1_min;
42 unsigned int p1_max;
45 struct device;
47 int aptina_pll_calculate(struct device *dev,
48 const struct aptina_pll_limits *limits,
49 struct aptina_pll *pll);
51 #endif /* __APTINA_PLL_H */