Revert "microblaze_mmu_v2: Update signal returning address"
[linux/fpc-iii.git] / sound / soc / codecs / adau1701.c
blob3d50fc8646b672fd87eb82c21abb72b4699ec368
1 /*
2 * Driver for ADAU1701 SigmaDSP processor
4 * Copyright 2011 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 * based on an inital version by Cliff Cai <cliff.cai@analog.com>
8 * Licensed under the GPL-2 or later.
9 */
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/i2c.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <sound/core.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/soc.h>
21 #include "sigmadsp.h"
22 #include "adau1701.h"
24 #define ADAU1701_DSPCTRL 0x1c
25 #define ADAU1701_SEROCTL 0x1e
26 #define ADAU1701_SERICTL 0x1f
28 #define ADAU1701_AUXNPOW 0x22
30 #define ADAU1701_OSCIPOW 0x26
31 #define ADAU1701_DACSET 0x27
33 #define ADAU1701_NUM_REGS 0x28
35 #define ADAU1701_DSPCTRL_CR (1 << 2)
36 #define ADAU1701_DSPCTRL_DAM (1 << 3)
37 #define ADAU1701_DSPCTRL_ADM (1 << 4)
38 #define ADAU1701_DSPCTRL_SR_48 0x00
39 #define ADAU1701_DSPCTRL_SR_96 0x01
40 #define ADAU1701_DSPCTRL_SR_192 0x02
41 #define ADAU1701_DSPCTRL_SR_MASK 0x03
43 #define ADAU1701_SEROCTL_INV_LRCLK 0x2000
44 #define ADAU1701_SEROCTL_INV_BCLK 0x1000
45 #define ADAU1701_SEROCTL_MASTER 0x0800
47 #define ADAU1701_SEROCTL_OBF16 0x0000
48 #define ADAU1701_SEROCTL_OBF8 0x0200
49 #define ADAU1701_SEROCTL_OBF4 0x0400
50 #define ADAU1701_SEROCTL_OBF2 0x0600
51 #define ADAU1701_SEROCTL_OBF_MASK 0x0600
53 #define ADAU1701_SEROCTL_OLF1024 0x0000
54 #define ADAU1701_SEROCTL_OLF512 0x0080
55 #define ADAU1701_SEROCTL_OLF256 0x0100
56 #define ADAU1701_SEROCTL_OLF_MASK 0x0180
58 #define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
59 #define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
60 #define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
61 #define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
62 #define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
63 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
65 #define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
66 #define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
67 #define ADAU1701_SEROCTL_WORD_LEN_16 0x0010
68 #define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
70 #define ADAU1701_AUXNPOW_VBPD 0x40
71 #define ADAU1701_AUXNPOW_VRPD 0x20
73 #define ADAU1701_SERICTL_I2S 0
74 #define ADAU1701_SERICTL_LEFTJ 1
75 #define ADAU1701_SERICTL_TDM 2
76 #define ADAU1701_SERICTL_RIGHTJ_24 3
77 #define ADAU1701_SERICTL_RIGHTJ_20 4
78 #define ADAU1701_SERICTL_RIGHTJ_18 5
79 #define ADAU1701_SERICTL_RIGHTJ_16 6
80 #define ADAU1701_SERICTL_MODE_MASK 7
81 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
82 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
84 #define ADAU1701_OSCIPOW_OPD 0x04
85 #define ADAU1701_DACSET_DACINIT 1
87 #define ADAU1701_FIRMWARE "adau1701.bin"
89 struct adau1701 {
90 unsigned int dai_fmt;
93 static const struct snd_kcontrol_new adau1701_controls[] = {
94 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
97 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
98 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
99 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
100 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
101 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
102 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
104 SND_SOC_DAPM_OUTPUT("OUT0"),
105 SND_SOC_DAPM_OUTPUT("OUT1"),
106 SND_SOC_DAPM_OUTPUT("OUT2"),
107 SND_SOC_DAPM_OUTPUT("OUT3"),
108 SND_SOC_DAPM_INPUT("IN0"),
109 SND_SOC_DAPM_INPUT("IN1"),
112 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
113 { "OUT0", NULL, "DAC0" },
114 { "OUT1", NULL, "DAC1" },
115 { "OUT2", NULL, "DAC2" },
116 { "OUT3", NULL, "DAC3" },
118 { "ADC", NULL, "IN0" },
119 { "ADC", NULL, "IN1" },
122 static unsigned int adau1701_register_size(struct snd_soc_codec *codec,
123 unsigned int reg)
125 switch (reg) {
126 case ADAU1701_DSPCTRL:
127 case ADAU1701_SEROCTL:
128 case ADAU1701_AUXNPOW:
129 case ADAU1701_OSCIPOW:
130 case ADAU1701_DACSET:
131 return 2;
132 case ADAU1701_SERICTL:
133 return 1;
136 dev_err(codec->dev, "Unsupported register address: %d\n", reg);
137 return 0;
140 static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg,
141 unsigned int value)
143 unsigned int i;
144 unsigned int size;
145 uint8_t buf[4];
146 int ret;
148 size = adau1701_register_size(codec, reg);
149 if (size == 0)
150 return -EINVAL;
152 snd_soc_cache_write(codec, reg, value);
154 buf[0] = 0x08;
155 buf[1] = reg;
157 for (i = size + 1; i >= 2; --i) {
158 buf[i] = value;
159 value >>= 8;
162 ret = i2c_master_send(to_i2c_client(codec->dev), buf, size + 2);
163 if (ret == size + 2)
164 return 0;
165 else if (ret < 0)
166 return ret;
167 else
168 return -EIO;
171 static unsigned int adau1701_read(struct snd_soc_codec *codec, unsigned int reg)
173 unsigned int value;
174 unsigned int ret;
176 ret = snd_soc_cache_read(codec, reg, &value);
177 if (ret)
178 return ret;
180 return value;
183 static int adau1701_load_firmware(struct snd_soc_codec *codec)
185 return process_sigma_firmware(codec->control_data, ADAU1701_FIRMWARE);
188 static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec,
189 snd_pcm_format_t format)
191 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
192 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
193 unsigned int val;
195 switch (format) {
196 case SNDRV_PCM_FORMAT_S16_LE:
197 val = ADAU1701_SEROCTL_WORD_LEN_16;
198 break;
199 case SNDRV_PCM_FORMAT_S20_3LE:
200 val = ADAU1701_SEROCTL_WORD_LEN_20;
201 break;
202 case SNDRV_PCM_FORMAT_S24_LE:
203 val = ADAU1701_SEROCTL_WORD_LEN_24;
204 break;
205 default:
206 return -EINVAL;
209 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
210 switch (format) {
211 case SNDRV_PCM_FORMAT_S16_LE:
212 val |= ADAU1701_SEROCTL_MSB_DEALY16;
213 break;
214 case SNDRV_PCM_FORMAT_S20_3LE:
215 val |= ADAU1701_SEROCTL_MSB_DEALY12;
216 break;
217 case SNDRV_PCM_FORMAT_S24_LE:
218 val |= ADAU1701_SEROCTL_MSB_DEALY8;
219 break;
221 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
224 snd_soc_update_bits(codec, ADAU1701_SEROCTL, mask, val);
226 return 0;
229 static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec,
230 snd_pcm_format_t format)
232 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
233 unsigned int val;
235 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
236 return 0;
238 switch (format) {
239 case SNDRV_PCM_FORMAT_S16_LE:
240 val = ADAU1701_SERICTL_RIGHTJ_16;
241 break;
242 case SNDRV_PCM_FORMAT_S20_3LE:
243 val = ADAU1701_SERICTL_RIGHTJ_20;
244 break;
245 case SNDRV_PCM_FORMAT_S24_LE:
246 val = ADAU1701_SERICTL_RIGHTJ_24;
247 break;
248 default:
249 return -EINVAL;
252 snd_soc_update_bits(codec, ADAU1701_SERICTL,
253 ADAU1701_SERICTL_MODE_MASK, val);
255 return 0;
258 static int adau1701_hw_params(struct snd_pcm_substream *substream,
259 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
261 struct snd_soc_codec *codec = dai->codec;
262 snd_pcm_format_t format;
263 unsigned int val;
265 switch (params_rate(params)) {
266 case 192000:
267 val = ADAU1701_DSPCTRL_SR_192;
268 break;
269 case 96000:
270 val = ADAU1701_DSPCTRL_SR_96;
271 break;
272 case 48000:
273 val = ADAU1701_DSPCTRL_SR_48;
274 break;
275 default:
276 return -EINVAL;
279 snd_soc_update_bits(codec, ADAU1701_DSPCTRL,
280 ADAU1701_DSPCTRL_SR_MASK, val);
282 format = params_format(params);
283 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
284 return adau1701_set_playback_pcm_format(codec, format);
285 else
286 return adau1701_set_capture_pcm_format(codec, format);
289 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
290 unsigned int fmt)
292 struct snd_soc_codec *codec = codec_dai->codec;
293 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
294 unsigned int serictl = 0x00, seroctl = 0x00;
295 bool invert_lrclk;
297 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
298 case SND_SOC_DAIFMT_CBM_CFM:
299 /* master, 64-bits per sample, 1 frame per sample */
300 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
301 | ADAU1701_SEROCTL_OLF1024;
302 break;
303 case SND_SOC_DAIFMT_CBS_CFS:
304 break;
305 default:
306 return -EINVAL;
309 /* clock inversion */
310 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
311 case SND_SOC_DAIFMT_NB_NF:
312 invert_lrclk = false;
313 break;
314 case SND_SOC_DAIFMT_NB_IF:
315 invert_lrclk = true;
316 break;
317 case SND_SOC_DAIFMT_IB_NF:
318 invert_lrclk = false;
319 serictl |= ADAU1701_SERICTL_INV_BCLK;
320 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
321 break;
322 case SND_SOC_DAIFMT_IB_IF:
323 invert_lrclk = true;
324 serictl |= ADAU1701_SERICTL_INV_BCLK;
325 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
326 break;
327 default:
328 return -EINVAL;
331 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
332 case SND_SOC_DAIFMT_I2S:
333 break;
334 case SND_SOC_DAIFMT_LEFT_J:
335 serictl |= ADAU1701_SERICTL_LEFTJ;
336 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
337 invert_lrclk = !invert_lrclk;
338 break;
339 case SND_SOC_DAIFMT_RIGHT_J:
340 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
341 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
342 invert_lrclk = !invert_lrclk;
343 break;
344 default:
345 return -EINVAL;
348 if (invert_lrclk) {
349 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
350 serictl |= ADAU1701_SERICTL_INV_LRCLK;
353 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
355 snd_soc_write(codec, ADAU1701_SERICTL, serictl);
356 snd_soc_update_bits(codec, ADAU1701_SEROCTL,
357 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
359 return 0;
362 static int adau1701_set_bias_level(struct snd_soc_codec *codec,
363 enum snd_soc_bias_level level)
365 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
367 switch (level) {
368 case SND_SOC_BIAS_ON:
369 break;
370 case SND_SOC_BIAS_PREPARE:
371 break;
372 case SND_SOC_BIAS_STANDBY:
373 /* Enable VREF and VREF buffer */
374 snd_soc_update_bits(codec, ADAU1701_AUXNPOW, mask, 0x00);
375 break;
376 case SND_SOC_BIAS_OFF:
377 /* Disable VREF and VREF buffer */
378 snd_soc_update_bits(codec, ADAU1701_AUXNPOW, mask, mask);
379 break;
382 codec->dapm.bias_level = level;
383 return 0;
386 static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
388 struct snd_soc_codec *codec = dai->codec;
389 unsigned int mask = ADAU1701_DSPCTRL_DAM;
390 unsigned int val;
392 if (mute)
393 val = 0;
394 else
395 val = mask;
397 snd_soc_update_bits(codec, ADAU1701_DSPCTRL, mask, val);
399 return 0;
402 static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
403 int source, unsigned int freq, int dir)
405 unsigned int val;
407 switch (clk_id) {
408 case ADAU1701_CLK_SRC_OSC:
409 val = 0x0;
410 break;
411 case ADAU1701_CLK_SRC_MCLK:
412 val = ADAU1701_OSCIPOW_OPD;
413 break;
414 default:
415 return -EINVAL;
418 snd_soc_update_bits(codec, ADAU1701_OSCIPOW, ADAU1701_OSCIPOW_OPD, val);
420 return 0;
423 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
424 SNDRV_PCM_RATE_192000)
426 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
427 SNDRV_PCM_FMTBIT_S24_LE)
429 static const struct snd_soc_dai_ops adau1701_dai_ops = {
430 .set_fmt = adau1701_set_dai_fmt,
431 .hw_params = adau1701_hw_params,
432 .digital_mute = adau1701_digital_mute,
435 static struct snd_soc_dai_driver adau1701_dai = {
436 .name = "adau1701",
437 .playback = {
438 .stream_name = "Playback",
439 .channels_min = 2,
440 .channels_max = 8,
441 .rates = ADAU1701_RATES,
442 .formats = ADAU1701_FORMATS,
444 .capture = {
445 .stream_name = "Capture",
446 .channels_min = 2,
447 .channels_max = 8,
448 .rates = ADAU1701_RATES,
449 .formats = ADAU1701_FORMATS,
451 .ops = &adau1701_dai_ops,
452 .symmetric_rates = 1,
455 static int adau1701_probe(struct snd_soc_codec *codec)
457 int ret;
459 codec->control_data = to_i2c_client(codec->dev);
461 ret = adau1701_load_firmware(codec);
462 if (ret)
463 dev_warn(codec->dev, "Failed to load firmware\n");
465 snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
466 snd_soc_write(codec, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
468 return 0;
471 static struct snd_soc_codec_driver adau1701_codec_drv = {
472 .probe = adau1701_probe,
473 .set_bias_level = adau1701_set_bias_level,
474 .idle_bias_off = true,
476 .reg_cache_size = ADAU1701_NUM_REGS,
477 .reg_word_size = sizeof(u16),
479 .controls = adau1701_controls,
480 .num_controls = ARRAY_SIZE(adau1701_controls),
481 .dapm_widgets = adau1701_dapm_widgets,
482 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
483 .dapm_routes = adau1701_dapm_routes,
484 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
486 .write = adau1701_write,
487 .read = adau1701_read,
489 .set_sysclk = adau1701_set_sysclk,
492 static __devinit int adau1701_i2c_probe(struct i2c_client *client,
493 const struct i2c_device_id *id)
495 struct adau1701 *adau1701;
496 int ret;
498 adau1701 = devm_kzalloc(&client->dev, sizeof(*adau1701), GFP_KERNEL);
499 if (!adau1701)
500 return -ENOMEM;
502 i2c_set_clientdata(client, adau1701);
503 ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
504 &adau1701_dai, 1);
505 return ret;
508 static __devexit int adau1701_i2c_remove(struct i2c_client *client)
510 snd_soc_unregister_codec(&client->dev);
511 return 0;
514 static const struct i2c_device_id adau1701_i2c_id[] = {
515 { "adau1701", 0 },
518 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
520 static struct i2c_driver adau1701_i2c_driver = {
521 .driver = {
522 .name = "adau1701",
523 .owner = THIS_MODULE,
525 .probe = adau1701_i2c_probe,
526 .remove = __devexit_p(adau1701_i2c_remove),
527 .id_table = adau1701_i2c_id,
530 static int __init adau1701_init(void)
532 return i2c_add_driver(&adau1701_i2c_driver);
534 module_init(adau1701_init);
536 static void __exit adau1701_exit(void)
538 i2c_del_driver(&adau1701_i2c_driver);
540 module_exit(adau1701_exit);
542 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
543 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
544 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
545 MODULE_LICENSE("GPL");