2 * CS4270 ALSA SoC (ASoC) codec driver
4 * Author: Timur Tabi <timur@freescale.com>
6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
13 * Current features/limitations:
15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
21 * - Power management is supported
24 #include <linux/module.h>
25 #include <linux/slab.h>
26 #include <sound/core.h>
27 #include <sound/soc.h>
28 #include <sound/initval.h>
29 #include <linux/i2c.h>
30 #include <linux/delay.h>
31 #include <linux/regulator/consumer.h>
34 * The codec isn't really big-endian or little-endian, since the I2S
35 * interface requires data to be sent serially with the MSbit first.
36 * However, to support BE and LE I2S devices, we specify both here. That
37 * way, ALSA will always match the bit patterns.
39 #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
40 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
41 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
42 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
43 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
44 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
46 /* CS4270 registers addresses */
47 #define CS4270_CHIPID 0x01 /* Chip ID */
48 #define CS4270_PWRCTL 0x02 /* Power Control */
49 #define CS4270_MODE 0x03 /* Mode Control */
50 #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
51 #define CS4270_TRANS 0x05 /* Transition Control */
52 #define CS4270_MUTE 0x06 /* Mute Control */
53 #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
54 #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
56 #define CS4270_FIRSTREG 0x01
57 #define CS4270_LASTREG 0x08
58 #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
59 #define CS4270_I2C_INCR 0x80
61 /* Bit masks for the CS4270 registers */
62 #define CS4270_CHIPID_ID 0xF0
63 #define CS4270_CHIPID_REV 0x0F
64 #define CS4270_PWRCTL_FREEZE 0x80
65 #define CS4270_PWRCTL_PDN_ADC 0x20
66 #define CS4270_PWRCTL_PDN_DAC 0x02
67 #define CS4270_PWRCTL_PDN 0x01
68 #define CS4270_PWRCTL_PDN_ALL \
69 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
70 #define CS4270_MODE_SPEED_MASK 0x30
71 #define CS4270_MODE_1X 0x00
72 #define CS4270_MODE_2X 0x10
73 #define CS4270_MODE_4X 0x20
74 #define CS4270_MODE_SLAVE 0x30
75 #define CS4270_MODE_DIV_MASK 0x0E
76 #define CS4270_MODE_DIV1 0x00
77 #define CS4270_MODE_DIV15 0x02
78 #define CS4270_MODE_DIV2 0x04
79 #define CS4270_MODE_DIV3 0x06
80 #define CS4270_MODE_DIV4 0x08
81 #define CS4270_MODE_POPGUARD 0x01
82 #define CS4270_FORMAT_FREEZE_A 0x80
83 #define CS4270_FORMAT_FREEZE_B 0x40
84 #define CS4270_FORMAT_LOOPBACK 0x20
85 #define CS4270_FORMAT_DAC_MASK 0x18
86 #define CS4270_FORMAT_DAC_LJ 0x00
87 #define CS4270_FORMAT_DAC_I2S 0x08
88 #define CS4270_FORMAT_DAC_RJ16 0x18
89 #define CS4270_FORMAT_DAC_RJ24 0x10
90 #define CS4270_FORMAT_ADC_MASK 0x01
91 #define CS4270_FORMAT_ADC_LJ 0x00
92 #define CS4270_FORMAT_ADC_I2S 0x01
93 #define CS4270_TRANS_ONE_VOL 0x80
94 #define CS4270_TRANS_SOFT 0x40
95 #define CS4270_TRANS_ZERO 0x20
96 #define CS4270_TRANS_INV_ADC_A 0x08
97 #define CS4270_TRANS_INV_ADC_B 0x10
98 #define CS4270_TRANS_INV_DAC_A 0x02
99 #define CS4270_TRANS_INV_DAC_B 0x04
100 #define CS4270_TRANS_DEEMPH 0x01
101 #define CS4270_MUTE_AUTO 0x20
102 #define CS4270_MUTE_ADC_A 0x08
103 #define CS4270_MUTE_ADC_B 0x10
104 #define CS4270_MUTE_POLARITY 0x04
105 #define CS4270_MUTE_DAC_A 0x01
106 #define CS4270_MUTE_DAC_B 0x02
108 /* Power-on default values for the registers
110 * This array contains the power-on default values of the registers, with the
111 * exception of the "CHIPID" register (01h). The lower four bits of that
112 * register contain the hardware revision, so it is treated as volatile.
114 * Also note that on the CS4270, the first readable register is 1, but ASoC
115 * assumes the first register is 0. Therfore, the array must have an entry for
116 * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
119 static const u8 cs4270_default_reg_cache
[CS4270_LASTREG
+ 1] = {
120 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
123 static const char *supply_names
[] = {
127 /* Private data for the CS4270 */
128 struct cs4270_private
{
129 enum snd_soc_control_type control_type
;
130 unsigned int mclk
; /* Input frequency of the MCLK pin */
131 unsigned int mode
; /* The mode (I2S or left-justified) */
132 unsigned int slave_mode
;
133 unsigned int manual_mute
;
135 /* power domain regulators */
136 struct regulator_bulk_data supplies
[ARRAY_SIZE(supply_names
)];
140 * struct cs4270_mode_ratios - clock ratio tables
141 * @ratio: the ratio of MCLK to the sample rate
142 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
144 * @mclk: the Ratio Select bits to set in the Mode Control register for this
147 * The data for this chart is taken from Table 5 of the CS4270 reference
150 * This table is used to determine how to program the Mode Control register.
151 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
152 * rates the CS4270 currently supports.
154 * @speed_mode is the corresponding bit pattern to be written to the
155 * MODE bits of the Mode Control Register
157 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
158 * the Mode Control Register.
160 * In situations where a single ratio is represented by multiple speed
161 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
162 * double-speed instead of quad-speed. However, the CS4270 errata states
163 * that divide-By-1.5 can cause failures, so we avoid that mode where
166 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
167 * work if Vd is 3.3V. If this effects you, select the
168 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
169 * never select any sample rates that require divide-by-1.5.
171 struct cs4270_mode_ratios
{
177 static struct cs4270_mode_ratios cs4270_mode_ratios
[] = {
178 {64, CS4270_MODE_4X
, CS4270_MODE_DIV1
},
179 #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
180 {96, CS4270_MODE_4X
, CS4270_MODE_DIV15
},
182 {128, CS4270_MODE_2X
, CS4270_MODE_DIV1
},
183 {192, CS4270_MODE_4X
, CS4270_MODE_DIV3
},
184 {256, CS4270_MODE_1X
, CS4270_MODE_DIV1
},
185 {384, CS4270_MODE_2X
, CS4270_MODE_DIV3
},
186 {512, CS4270_MODE_1X
, CS4270_MODE_DIV2
},
187 {768, CS4270_MODE_1X
, CS4270_MODE_DIV3
},
188 {1024, CS4270_MODE_1X
, CS4270_MODE_DIV4
}
191 /* The number of MCLK/LRCK ratios supported by the CS4270 */
192 #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
194 static int cs4270_reg_is_readable(struct snd_soc_codec
*codec
, unsigned int reg
)
196 return (reg
>= CS4270_FIRSTREG
) && (reg
<= CS4270_LASTREG
);
199 static int cs4270_reg_is_volatile(struct snd_soc_codec
*codec
, unsigned int reg
)
201 /* Unreadable registers are considered volatile */
202 if ((reg
< CS4270_FIRSTREG
) || (reg
> CS4270_LASTREG
))
205 return reg
== CS4270_CHIPID
;
209 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
210 * @codec_dai: the codec DAI
211 * @clk_id: the clock ID (ignored)
212 * @freq: the MCLK input frequency
213 * @dir: the clock direction (ignored)
215 * This function is used to tell the codec driver what the input MCLK
218 * The value of MCLK is used to determine which sample rates are supported
219 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
220 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
222 * This function calculates the nine ratios and determines which ones match
223 * a standard sample rate. If there's a match, then it is added to the list
224 * of supported sample rates.
226 * This function must be called by the machine driver's 'startup' function,
227 * otherwise the list of supported sample rates will not be available in
230 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
231 * theoretically possible sample rates to be enabled. Call it again with a
232 * proper value set one the external clock is set (most probably you would do
233 * that from a machine's driver 'hw_param' hook.
235 static int cs4270_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
236 int clk_id
, unsigned int freq
, int dir
)
238 struct snd_soc_codec
*codec
= codec_dai
->codec
;
239 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
246 * cs4270_set_dai_fmt - configure the codec for the selected audio format
247 * @codec_dai: the codec DAI
248 * @format: a SND_SOC_DAIFMT_x value indicating the data format
250 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
253 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
254 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
255 * data for playback only, but ASoC currently does not support different
256 * formats for playback vs. record.
258 static int cs4270_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
261 struct snd_soc_codec
*codec
= codec_dai
->codec
;
262 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
265 switch (format
& SND_SOC_DAIFMT_FORMAT_MASK
) {
266 case SND_SOC_DAIFMT_I2S
:
267 case SND_SOC_DAIFMT_LEFT_J
:
268 cs4270
->mode
= format
& SND_SOC_DAIFMT_FORMAT_MASK
;
271 dev_err(codec
->dev
, "invalid dai format\n");
275 /* set master/slave audio interface */
276 switch (format
& SND_SOC_DAIFMT_MASTER_MASK
) {
277 case SND_SOC_DAIFMT_CBS_CFS
:
278 cs4270
->slave_mode
= 1;
280 case SND_SOC_DAIFMT_CBM_CFM
:
281 cs4270
->slave_mode
= 0;
284 /* all other modes are unsupported by the hardware */
285 dev_err(codec
->dev
, "Unknown master/slave configuration\n");
293 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
294 * @substream: the audio stream
295 * @params: the hardware parameters to set
296 * @dai: the SOC DAI (ignored)
298 * This function programs the hardware with the values provided.
299 * Specifically, the sample rate and the data format.
301 * The .ops functions are used to provide board-specific data, like input
302 * frequencies, to this driver. This function takes that information,
303 * combines it with the hardware parameters provided, and programs the
304 * hardware accordingly.
306 static int cs4270_hw_params(struct snd_pcm_substream
*substream
,
307 struct snd_pcm_hw_params
*params
,
308 struct snd_soc_dai
*dai
)
310 struct snd_soc_codec
*codec
= dai
->codec
;
311 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
318 /* Figure out which MCLK/LRCK ratio to use */
320 rate
= params_rate(params
); /* Sampling rate, in Hz */
321 ratio
= cs4270
->mclk
/ rate
; /* MCLK/LRCK ratio */
323 for (i
= 0; i
< NUM_MCLK_RATIOS
; i
++) {
324 if (cs4270_mode_ratios
[i
].ratio
== ratio
)
328 if (i
== NUM_MCLK_RATIOS
) {
329 /* We did not find a matching ratio */
330 dev_err(codec
->dev
, "could not find matching ratio\n");
334 /* Set the sample rate */
336 reg
= snd_soc_read(codec
, CS4270_MODE
);
337 reg
&= ~(CS4270_MODE_SPEED_MASK
| CS4270_MODE_DIV_MASK
);
338 reg
|= cs4270_mode_ratios
[i
].mclk
;
340 if (cs4270
->slave_mode
)
341 reg
|= CS4270_MODE_SLAVE
;
343 reg
|= cs4270_mode_ratios
[i
].speed_mode
;
345 ret
= snd_soc_write(codec
, CS4270_MODE
, reg
);
347 dev_err(codec
->dev
, "i2c write failed\n");
351 /* Set the DAI format */
353 reg
= snd_soc_read(codec
, CS4270_FORMAT
);
354 reg
&= ~(CS4270_FORMAT_DAC_MASK
| CS4270_FORMAT_ADC_MASK
);
356 switch (cs4270
->mode
) {
357 case SND_SOC_DAIFMT_I2S
:
358 reg
|= CS4270_FORMAT_DAC_I2S
| CS4270_FORMAT_ADC_I2S
;
360 case SND_SOC_DAIFMT_LEFT_J
:
361 reg
|= CS4270_FORMAT_DAC_LJ
| CS4270_FORMAT_ADC_LJ
;
364 dev_err(codec
->dev
, "unknown dai format\n");
368 ret
= snd_soc_write(codec
, CS4270_FORMAT
, reg
);
370 dev_err(codec
->dev
, "i2c write failed\n");
378 * cs4270_dai_mute - enable/disable the CS4270 external mute
380 * @mute: 0 = disable mute, 1 = enable mute
382 * This function toggles the mute bits in the MUTE register. The CS4270's
383 * mute capability is intended for external muting circuitry, so if the
384 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
385 * then this function will do nothing.
387 static int cs4270_dai_mute(struct snd_soc_dai
*dai
, int mute
)
389 struct snd_soc_codec
*codec
= dai
->codec
;
390 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
393 reg6
= snd_soc_read(codec
, CS4270_MUTE
);
396 reg6
|= CS4270_MUTE_DAC_A
| CS4270_MUTE_DAC_B
;
398 reg6
&= ~(CS4270_MUTE_DAC_A
| CS4270_MUTE_DAC_B
);
399 reg6
|= cs4270
->manual_mute
;
402 return snd_soc_write(codec
, CS4270_MUTE
, reg6
);
406 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
408 * @kcontrol: mixer control
409 * @ucontrol: control element information
411 * This function basically passes the arguments on to the generic
412 * snd_soc_put_volsw() function and saves the mute information in
413 * our private data structure. This is because we want to prevent
414 * cs4270_dai_mute() neglecting the user's decision to manually
415 * mute the codec's output.
417 * Returns 0 for success.
419 static int cs4270_soc_put_mute(struct snd_kcontrol
*kcontrol
,
420 struct snd_ctl_elem_value
*ucontrol
)
422 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
423 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
424 int left
= !ucontrol
->value
.integer
.value
[0];
425 int right
= !ucontrol
->value
.integer
.value
[1];
427 cs4270
->manual_mute
= (left
? CS4270_MUTE_DAC_A
: 0) |
428 (right
? CS4270_MUTE_DAC_B
: 0);
430 return snd_soc_put_volsw(kcontrol
, ucontrol
);
433 /* A list of non-DAPM controls that the CS4270 supports */
434 static const struct snd_kcontrol_new cs4270_snd_controls
[] = {
435 SOC_DOUBLE_R("Master Playback Volume",
436 CS4270_VOLA
, CS4270_VOLB
, 0, 0xFF, 1),
437 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT
, 5, 1, 0),
438 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS
, 6, 1, 0),
439 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS
, 5, 1, 0),
440 SOC_SINGLE("De-emphasis filter", CS4270_TRANS
, 0, 1, 0),
441 SOC_SINGLE("Popguard Switch", CS4270_MODE
, 0, 1, 1),
442 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE
, 5, 1, 0),
443 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE
, 3, 4, 1, 1),
444 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE
, 0, 1, 1, 1,
445 snd_soc_get_volsw
, cs4270_soc_put_mute
),
448 static const struct snd_soc_dai_ops cs4270_dai_ops
= {
449 .hw_params
= cs4270_hw_params
,
450 .set_sysclk
= cs4270_set_dai_sysclk
,
451 .set_fmt
= cs4270_set_dai_fmt
,
452 .digital_mute
= cs4270_dai_mute
,
455 static struct snd_soc_dai_driver cs4270_dai
= {
456 .name
= "cs4270-hifi",
458 .stream_name
= "Playback",
461 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
464 .formats
= CS4270_FORMATS
,
467 .stream_name
= "Capture",
470 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
473 .formats
= CS4270_FORMATS
,
475 .ops
= &cs4270_dai_ops
,
479 * cs4270_probe - ASoC probe function
480 * @pdev: platform device
482 * This function is called when ASoC has all the pieces it needs to
483 * instantiate a sound driver.
485 static int cs4270_probe(struct snd_soc_codec
*codec
)
487 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
490 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
491 * then do the I2C transactions itself.
493 ret
= snd_soc_codec_set_cache_io(codec
, 8, 8, cs4270
->control_type
);
495 dev_err(codec
->dev
, "failed to set cache I/O (ret=%i)\n", ret
);
499 /* Disable auto-mute. This feature appears to be buggy. In some
500 * situations, auto-mute will not deactivate when it should, so we want
501 * this feature disabled by default. An application (e.g. alsactl) can
502 * re-enabled it by using the controls.
504 ret
= snd_soc_update_bits(codec
, CS4270_MUTE
, CS4270_MUTE_AUTO
, 0);
506 dev_err(codec
->dev
, "i2c write failed\n");
510 /* Disable automatic volume control. The hardware enables, and it
511 * causes volume change commands to be delayed, sometimes until after
512 * playback has started. An application (e.g. alsactl) can
513 * re-enabled it by using the controls.
515 ret
= snd_soc_update_bits(codec
, CS4270_TRANS
,
516 CS4270_TRANS_SOFT
| CS4270_TRANS_ZERO
, 0);
518 dev_err(codec
->dev
, "i2c write failed\n");
522 /* Add the non-DAPM controls */
523 ret
= snd_soc_add_codec_controls(codec
, cs4270_snd_controls
,
524 ARRAY_SIZE(cs4270_snd_controls
));
526 dev_err(codec
->dev
, "failed to add controls\n");
530 /* get the power supply regulators */
531 for (i
= 0; i
< ARRAY_SIZE(supply_names
); i
++)
532 cs4270
->supplies
[i
].supply
= supply_names
[i
];
534 ret
= regulator_bulk_get(codec
->dev
, ARRAY_SIZE(cs4270
->supplies
),
539 ret
= regulator_bulk_enable(ARRAY_SIZE(cs4270
->supplies
),
542 goto error_free_regulators
;
546 error_free_regulators
:
547 regulator_bulk_free(ARRAY_SIZE(cs4270
->supplies
),
554 * cs4270_remove - ASoC remove function
555 * @pdev: platform device
557 * This function is the counterpart to cs4270_probe().
559 static int cs4270_remove(struct snd_soc_codec
*codec
)
561 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
563 regulator_bulk_disable(ARRAY_SIZE(cs4270
->supplies
), cs4270
->supplies
);
564 regulator_bulk_free(ARRAY_SIZE(cs4270
->supplies
), cs4270
->supplies
);
571 /* This suspend/resume implementation can handle both - a simple standby
572 * where the codec remains powered, and a full suspend, where the voltage
573 * domain the codec is connected to is teared down and/or any other hardware
574 * reset condition is asserted.
576 * The codec's own power saving features are enabled in the suspend callback,
577 * and all registers are written back to the hardware when resuming.
580 static int cs4270_soc_suspend(struct snd_soc_codec
*codec
)
582 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
585 reg
= snd_soc_read(codec
, CS4270_PWRCTL
) | CS4270_PWRCTL_PDN_ALL
;
589 ret
= snd_soc_write(codec
, CS4270_PWRCTL
, reg
);
593 regulator_bulk_disable(ARRAY_SIZE(cs4270
->supplies
),
599 static int cs4270_soc_resume(struct snd_soc_codec
*codec
)
601 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
604 ret
= regulator_bulk_enable(ARRAY_SIZE(cs4270
->supplies
),
609 /* In case the device was put to hard reset during sleep, we need to
610 * wait 500ns here before any I2C communication. */
613 /* first restore the entire register cache ... */
614 snd_soc_cache_sync(codec
);
616 /* ... then disable the power-down bits */
617 reg
= snd_soc_read(codec
, CS4270_PWRCTL
);
618 reg
&= ~CS4270_PWRCTL_PDN_ALL
;
620 return snd_soc_write(codec
, CS4270_PWRCTL
, reg
);
623 #define cs4270_soc_suspend NULL
624 #define cs4270_soc_resume NULL
625 #endif /* CONFIG_PM */
628 * ASoC codec driver structure
630 static const struct snd_soc_codec_driver soc_codec_device_cs4270
= {
631 .probe
= cs4270_probe
,
632 .remove
= cs4270_remove
,
633 .suspend
= cs4270_soc_suspend
,
634 .resume
= cs4270_soc_resume
,
635 .volatile_register
= cs4270_reg_is_volatile
,
636 .readable_register
= cs4270_reg_is_readable
,
637 .reg_cache_size
= CS4270_LASTREG
+ 1,
638 .reg_word_size
= sizeof(u8
),
639 .reg_cache_default
= cs4270_default_reg_cache
,
643 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
644 * @i2c_client: the I2C client object
645 * @id: the I2C device ID (ignored)
647 * This function is called whenever the I2C subsystem finds a device that
648 * matches the device ID given via a prior call to i2c_add_driver().
650 static int cs4270_i2c_probe(struct i2c_client
*i2c_client
,
651 const struct i2c_device_id
*id
)
653 struct cs4270_private
*cs4270
;
656 /* Verify that we have a CS4270 */
658 ret
= i2c_smbus_read_byte_data(i2c_client
, CS4270_CHIPID
);
660 dev_err(&i2c_client
->dev
, "failed to read i2c at addr %X\n",
664 /* The top four bits of the chip ID should be 1100. */
665 if ((ret
& 0xF0) != 0xC0) {
666 dev_err(&i2c_client
->dev
, "device at addr %X is not a CS4270\n",
671 dev_info(&i2c_client
->dev
, "found device at i2c address %X\n",
673 dev_info(&i2c_client
->dev
, "hardware revision %X\n", ret
& 0xF);
675 cs4270
= devm_kzalloc(&i2c_client
->dev
, sizeof(struct cs4270_private
),
678 dev_err(&i2c_client
->dev
, "could not allocate codec\n");
682 i2c_set_clientdata(i2c_client
, cs4270
);
683 cs4270
->control_type
= SND_SOC_I2C
;
685 ret
= snd_soc_register_codec(&i2c_client
->dev
,
686 &soc_codec_device_cs4270
, &cs4270_dai
, 1);
691 * cs4270_i2c_remove - remove an I2C device
692 * @i2c_client: the I2C client object
694 * This function is the counterpart to cs4270_i2c_probe().
696 static int cs4270_i2c_remove(struct i2c_client
*i2c_client
)
698 snd_soc_unregister_codec(&i2c_client
->dev
);
703 * cs4270_id - I2C device IDs supported by this driver
705 static const struct i2c_device_id cs4270_id
[] = {
709 MODULE_DEVICE_TABLE(i2c
, cs4270_id
);
712 * cs4270_i2c_driver - I2C device identification
714 * This structure tells the I2C subsystem how to identify and support a
715 * given I2C device type.
717 static struct i2c_driver cs4270_i2c_driver
= {
720 .owner
= THIS_MODULE
,
722 .id_table
= cs4270_id
,
723 .probe
= cs4270_i2c_probe
,
724 .remove
= cs4270_i2c_remove
,
727 static int __init
cs4270_init(void)
729 return i2c_add_driver(&cs4270_i2c_driver
);
731 module_init(cs4270_init
);
733 static void __exit
cs4270_exit(void)
735 i2c_del_driver(&cs4270_i2c_driver
);
737 module_exit(cs4270_exit
);
739 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
740 MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
741 MODULE_LICENSE("GPL");