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Revert "microblaze_mmu_v2: Update signal returning address"
[linux/fpc-iii.git] / sound / soc / fsl / imx-ssi.c
blob81d7728cf67fb2d6f4ce1b4287319a0384f0d2d8
1 /*
2 * imx-ssi.c -- ALSA Soc Audio Layer
3 *
4 * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
5 *
6 * This code is based on code copyrighted by Freescale,
7 * Liam Girdwood, Javier Martin and probably others.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 *
15 * The i.MX SSI core has some nasty limitations in AC97 mode. While most
16 * sane processor vendors have a FIFO per AC97 slot, the i.MX has only
17 * one FIFO which combines all valid receive slots. We cannot even select
18 * which slots we want to receive. The WM9712 with which this driver
19 * was developed with always sends GPIO status data in slot 12 which
20 * we receive in our (PCM-) data stream. The only chance we have is to
21 * manually skip this data in the FIQ handler. With sampling rates different
22 * from 48000Hz not every frame has valid receive data, so the ratio
23 * between pcm data and GPIO status data changes. Our FIQ handler is not
24 * able to handle this, hence this driver only works with 48000Hz sampling
25 * rate.
26 * Reading and writing AC97 registers is another challenge. The core
27 * provides us status bits when the read register is updated with *another*
28 * value. When we read the same register two times (and the register still
29 * contains the same value) these status bits are not set. We work
30 * around this by not polling these bits but only wait a fixed delay.
31 *
32 */
33
34 #include <linux/clk.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/init.h>
39 #include <linux/interrupt.h>
40 #include <linux/module.h>
41 #include <linux/platform_device.h>
42 #include <linux/slab.h>
43
44 #include <sound/core.h>
45 #include <sound/initval.h>
46 #include <sound/pcm.h>
47 #include <sound/pcm_params.h>
48 #include <sound/soc.h>
49
50 #include <mach/ssi.h>
51 #include <mach/hardware.h>
52
53 #include "imx-ssi.h"
54
55 #define SSI_SACNT_DEFAULT (SSI_SACNT_AC97EN | SSI_SACNT_FV)
56
57 /*
58 * SSI Network Mode or TDM slots configuration.
59 * Should only be called when port is inactive (i.e. SSIEN = 0).
60 */
61 static int imx_ssi_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
62 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
63 {
64 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
65 u32 sccr;
66
67 sccr = readl(ssi->base + SSI_STCCR);
68 sccr &= ~SSI_STCCR_DC_MASK;
69 sccr |= SSI_STCCR_DC(slots - 1);
70 writel(sccr, ssi->base + SSI_STCCR);
71
72 sccr = readl(ssi->base + SSI_SRCCR);
73 sccr &= ~SSI_STCCR_DC_MASK;
74 sccr |= SSI_STCCR_DC(slots - 1);
75 writel(sccr, ssi->base + SSI_SRCCR);
76
77 writel(tx_mask, ssi->base + SSI_STMSK);
78 writel(rx_mask, ssi->base + SSI_SRMSK);
79
80 return 0;
81 }
82
83 /*
84 * SSI DAI format configuration.
85 * Should only be called when port is inactive (i.e. SSIEN = 0).
86 */
87 static int imx_ssi_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
88 {
89 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
90 u32 strcr = 0, scr;
91
92 scr = readl(ssi->base + SSI_SCR) & ~(SSI_SCR_SYN | SSI_SCR_NET);
93
94 /* DAI mode */
95 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
96 case SND_SOC_DAIFMT_I2S:
97 /* data on rising edge of bclk, frame low 1clk before data */
98 strcr |= SSI_STCR_TFSI | SSI_STCR_TEFS | SSI_STCR_TXBIT0;
99 scr |= SSI_SCR_NET;
100 if (ssi->flags & IMX_SSI_USE_I2S_SLAVE) {
101 scr &= ~SSI_I2S_MODE_MASK;
102 scr |= SSI_SCR_I2S_MODE_SLAVE;
103 }
104 break;
105 case SND_SOC_DAIFMT_LEFT_J:
106 /* data on rising edge of bclk, frame high with data */
107 strcr |= SSI_STCR_TXBIT0;
108 break;
109 case SND_SOC_DAIFMT_DSP_B:
110 /* data on rising edge of bclk, frame high with data */
111 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0;
112 break;
113 case SND_SOC_DAIFMT_DSP_A:
114 /* data on rising edge of bclk, frame high 1clk before data */
115 strcr |= SSI_STCR_TFSL | SSI_STCR_TXBIT0 | SSI_STCR_TEFS;
116 break;
117 }
118
119 /* DAI clock inversion */
120 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
121 case SND_SOC_DAIFMT_IB_IF:
122 strcr |= SSI_STCR_TFSI;
123 strcr &= ~SSI_STCR_TSCKP;
124 break;
125 case SND_SOC_DAIFMT_IB_NF:
126 strcr &= ~(SSI_STCR_TSCKP | SSI_STCR_TFSI);
127 break;
128 case SND_SOC_DAIFMT_NB_IF:
129 strcr |= SSI_STCR_TFSI | SSI_STCR_TSCKP;
130 break;
131 case SND_SOC_DAIFMT_NB_NF:
132 strcr &= ~SSI_STCR_TFSI;
133 strcr |= SSI_STCR_TSCKP;
134 break;
135 }
136
137 /* DAI clock master masks */
138 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
139 case SND_SOC_DAIFMT_CBM_CFM:
140 break;
141 default:
142 /* Master mode not implemented, needs handling of clocks. */
143 return -EINVAL;
144 }
145
146 strcr |= SSI_STCR_TFEN0;
147
148 if (ssi->flags & IMX_SSI_NET)
149 scr |= SSI_SCR_NET;
150 if (ssi->flags & IMX_SSI_SYN)
151 scr |= SSI_SCR_SYN;
152
153 writel(strcr, ssi->base + SSI_STCR);
154 writel(strcr, ssi->base + SSI_SRCR);
155 writel(scr, ssi->base + SSI_SCR);
156
157 return 0;
158 }
159
160 /*
161 * SSI system clock configuration.
162 * Should only be called when port is inactive (i.e. SSIEN = 0).
163 */
164 static int imx_ssi_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
165 int clk_id, unsigned int freq, int dir)
166 {
167 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
168 u32 scr;
169
170 scr = readl(ssi->base + SSI_SCR);
171
172 switch (clk_id) {
173 case IMX_SSP_SYS_CLK:
174 if (dir == SND_SOC_CLOCK_OUT)
175 scr |= SSI_SCR_SYS_CLK_EN;
176 else
177 scr &= ~SSI_SCR_SYS_CLK_EN;
178 break;
179 default:
180 return -EINVAL;
181 }
182
183 writel(scr, ssi->base + SSI_SCR);
184
185 return 0;
186 }
187
188 /*
189 * SSI Clock dividers
190 * Should only be called when port is inactive (i.e. SSIEN = 0).
191 */
192 static int imx_ssi_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
193 int div_id, int div)
194 {
195 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
196 u32 stccr, srccr;
197
198 stccr = readl(ssi->base + SSI_STCCR);
199 srccr = readl(ssi->base + SSI_SRCCR);
200
201 switch (div_id) {
202 case IMX_SSI_TX_DIV_2:
203 stccr &= ~SSI_STCCR_DIV2;
204 stccr |= div;
205 break;
206 case IMX_SSI_TX_DIV_PSR:
207 stccr &= ~SSI_STCCR_PSR;
208 stccr |= div;
209 break;
210 case IMX_SSI_TX_DIV_PM:
211 stccr &= ~0xff;
212 stccr |= SSI_STCCR_PM(div);
213 break;
214 case IMX_SSI_RX_DIV_2:
215 stccr &= ~SSI_STCCR_DIV2;
216 stccr |= div;
217 break;
218 case IMX_SSI_RX_DIV_PSR:
219 stccr &= ~SSI_STCCR_PSR;
220 stccr |= div;
221 break;
222 case IMX_SSI_RX_DIV_PM:
223 stccr &= ~0xff;
224 stccr |= SSI_STCCR_PM(div);
225 break;
226 default:
227 return -EINVAL;
228 }
229
230 writel(stccr, ssi->base + SSI_STCCR);
231 writel(srccr, ssi->base + SSI_SRCCR);
232
233 return 0;
234 }
235
236 static int imx_ssi_startup(struct snd_pcm_substream *substream,
237 struct snd_soc_dai *cpu_dai)
238 {
239 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
240 struct imx_pcm_dma_params *dma_data;
241
242 /* Tx/Rx config */
243 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
244 dma_data = &ssi->dma_params_tx;
245 else
246 dma_data = &ssi->dma_params_rx;
247
248 snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
249
250 return 0;
251 }
252
253 /*
254 * Should only be called when port is inactive (i.e. SSIEN = 0),
255 * although can be called multiple times by upper layers.
256 */
257 static int imx_ssi_hw_params(struct snd_pcm_substream *substream,
258 struct snd_pcm_hw_params *params,
259 struct snd_soc_dai *cpu_dai)
260 {
261 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(cpu_dai);
262 u32 reg, sccr;
263
264 /* Tx/Rx config */
265 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
266 reg = SSI_STCCR;
267 else
268 reg = SSI_SRCCR;
269
270 if (ssi->flags & IMX_SSI_SYN)
271 reg = SSI_STCCR;
272
273 sccr = readl(ssi->base + reg) & ~SSI_STCCR_WL_MASK;
274
275 /* DAI data (word) size */
276 switch (params_format(params)) {
277 case SNDRV_PCM_FORMAT_S16_LE:
278 sccr |= SSI_SRCCR_WL(16);
279 break;
280 case SNDRV_PCM_FORMAT_S20_3LE:
281 sccr |= SSI_SRCCR_WL(20);
282 break;
283 case SNDRV_PCM_FORMAT_S24_LE:
284 sccr |= SSI_SRCCR_WL(24);
285 break;
286 }
287
288 writel(sccr, ssi->base + reg);
289
290 return 0;
291 }
292
293 static int imx_ssi_trigger(struct snd_pcm_substream *substream, int cmd,
294 struct snd_soc_dai *dai)
295 {
296 struct imx_ssi *ssi = snd_soc_dai_get_drvdata(dai);
297 unsigned int sier_bits, sier;
298 unsigned int scr;
299
300 scr = readl(ssi->base + SSI_SCR);
301 sier = readl(ssi->base + SSI_SIER);
302
303 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
304 if (ssi->flags & IMX_SSI_DMA)
305 sier_bits = SSI_SIER_TDMAE;
306 else
307 sier_bits = SSI_SIER_TIE | SSI_SIER_TFE0_EN;
308 } else {
309 if (ssi->flags & IMX_SSI_DMA)
310 sier_bits = SSI_SIER_RDMAE;
311 else
312 sier_bits = SSI_SIER_RIE | SSI_SIER_RFF0_EN;
313 }
314
315 switch (cmd) {
316 case SNDRV_PCM_TRIGGER_START:
317 case SNDRV_PCM_TRIGGER_RESUME:
318 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
319 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
320 scr |= SSI_SCR_TE;
321 else
322 scr |= SSI_SCR_RE;
323 sier |= sier_bits;
324
325 if (++ssi->enabled == 1)
326 scr |= SSI_SCR_SSIEN;
327
328 break;
329
330 case SNDRV_PCM_TRIGGER_STOP:
331 case SNDRV_PCM_TRIGGER_SUSPEND:
332 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
333 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
334 scr &= ~SSI_SCR_TE;
335 else
336 scr &= ~SSI_SCR_RE;
337 sier &= ~sier_bits;
338
339 if (--ssi->enabled == 0)
340 scr &= ~SSI_SCR_SSIEN;
341
342 break;
343 default:
344 return -EINVAL;
345 }
346
347 if (!(ssi->flags & IMX_SSI_USE_AC97))
348 /* rx/tx are always enabled to access ac97 registers */
349 writel(scr, ssi->base + SSI_SCR);
350
351 writel(sier, ssi->base + SSI_SIER);
352
353 return 0;
354 }
355
356 static const struct snd_soc_dai_ops imx_ssi_pcm_dai_ops = {
357 .startup = imx_ssi_startup,
358 .hw_params = imx_ssi_hw_params,
359 .set_fmt = imx_ssi_set_dai_fmt,
360 .set_clkdiv = imx_ssi_set_dai_clkdiv,
361 .set_sysclk = imx_ssi_set_dai_sysclk,
362 .set_tdm_slot = imx_ssi_set_dai_tdm_slot,
363 .trigger = imx_ssi_trigger,
364 };
365
366 static int imx_ssi_dai_probe(struct snd_soc_dai *dai)
367 {
368 struct imx_ssi *ssi = dev_get_drvdata(dai->dev);
369 uint32_t val;
370
371 snd_soc_dai_set_drvdata(dai, ssi);
372
373 val = SSI_SFCSR_TFWM0(ssi->dma_params_tx.burstsize) |
374 SSI_SFCSR_RFWM0(ssi->dma_params_rx.burstsize);
375 writel(val, ssi->base + SSI_SFCSR);
376
377 return 0;
378 }
379
380 static struct snd_soc_dai_driver imx_ssi_dai = {
381 .probe = imx_ssi_dai_probe,
382 .playback = {
383 /* The SSI does not support monaural audio. */
384 .channels_min = 2,
385 .channels_max = 2,
386 .rates = SNDRV_PCM_RATE_8000_96000,
387 .formats = SNDRV_PCM_FMTBIT_S16_LE,
388 },
389 .capture = {
390 .channels_min = 2,
391 .channels_max = 2,
392 .rates = SNDRV_PCM_RATE_8000_96000,
393 .formats = SNDRV_PCM_FMTBIT_S16_LE,
394 },
395 .ops = &imx_ssi_pcm_dai_ops,
396 };
397
398 static struct snd_soc_dai_driver imx_ac97_dai = {
399 .probe = imx_ssi_dai_probe,
400 .ac97_control = 1,
401 .playback = {
402 .stream_name = "AC97 Playback",
403 .channels_min = 2,
404 .channels_max = 2,
405 .rates = SNDRV_PCM_RATE_48000,
406 .formats = SNDRV_PCM_FMTBIT_S16_LE,
407 },
408 .capture = {
409 .stream_name = "AC97 Capture",
410 .channels_min = 2,
411 .channels_max = 2,
412 .rates = SNDRV_PCM_RATE_48000,
413 .formats = SNDRV_PCM_FMTBIT_S16_LE,
414 },
415 .ops = &imx_ssi_pcm_dai_ops,
416 };
417
418 static void setup_channel_to_ac97(struct imx_ssi *imx_ssi)
419 {
420 void __iomem *base = imx_ssi->base;
421
422 writel(0x0, base + SSI_SCR);
423 writel(0x0, base + SSI_STCR);
424 writel(0x0, base + SSI_SRCR);
425
426 writel(SSI_SCR_SYN | SSI_SCR_NET, base + SSI_SCR);
427
428 writel(SSI_SFCSR_RFWM0(8) |
429 SSI_SFCSR_TFWM0(8) |
430 SSI_SFCSR_RFWM1(8) |
431 SSI_SFCSR_TFWM1(8), base + SSI_SFCSR);
432
433 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_STCCR);
434 writel(SSI_STCCR_WL(16) | SSI_STCCR_DC(12), base + SSI_SRCCR);
435
436 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN, base + SSI_SCR);
437 writel(SSI_SOR_WAIT(3), base + SSI_SOR);
438
439 writel(SSI_SCR_SYN | SSI_SCR_NET | SSI_SCR_SSIEN |
440 SSI_SCR_TE | SSI_SCR_RE,
441 base + SSI_SCR);
442
443 writel(SSI_SACNT_DEFAULT, base + SSI_SACNT);
444 writel(0xff, base + SSI_SACCDIS);
445 writel(0x300, base + SSI_SACCEN);
446 }
447
448 static struct imx_ssi *ac97_ssi;
449
450 static void imx_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
451 unsigned short val)
452 {
453 struct imx_ssi *imx_ssi = ac97_ssi;
454 void __iomem *base = imx_ssi->base;
455 unsigned int lreg;
456 unsigned int lval;
457
458 if (reg > 0x7f)
459 return;
460
461 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
462
463 lreg = reg << 12;
464 writel(lreg, base + SSI_SACADD);
465
466 lval = val << 4;
467 writel(lval , base + SSI_SACDAT);
468
469 writel(SSI_SACNT_DEFAULT | SSI_SACNT_WR, base + SSI_SACNT);
470 udelay(100);
471 }
472
473 static unsigned short imx_ssi_ac97_read(struct snd_ac97 *ac97,
474 unsigned short reg)
475 {
476 struct imx_ssi *imx_ssi = ac97_ssi;
477 void __iomem *base = imx_ssi->base;
478
479 unsigned short val = -1;
480 unsigned int lreg;
481
482 lreg = (reg & 0x7f) << 12 ;
483 writel(lreg, base + SSI_SACADD);
484 writel(SSI_SACNT_DEFAULT | SSI_SACNT_RD, base + SSI_SACNT);
485
486 udelay(100);
487
488 val = (readl(base + SSI_SACDAT) >> 4) & 0xffff;
489
490 pr_debug("%s: 0x%02x 0x%04x\n", __func__, reg, val);
491
492 return val;
493 }
494
495 static void imx_ssi_ac97_reset(struct snd_ac97 *ac97)
496 {
497 struct imx_ssi *imx_ssi = ac97_ssi;
498
499 if (imx_ssi->ac97_reset)
500 imx_ssi->ac97_reset(ac97);
501 }
502
503 static void imx_ssi_ac97_warm_reset(struct snd_ac97 *ac97)
504 {
505 struct imx_ssi *imx_ssi = ac97_ssi;
506
507 if (imx_ssi->ac97_warm_reset)
508 imx_ssi->ac97_warm_reset(ac97);
509 }
510
511 struct snd_ac97_bus_ops soc_ac97_ops = {
512 .read = imx_ssi_ac97_read,
513 .write = imx_ssi_ac97_write,
514 .reset = imx_ssi_ac97_reset,
515 .warm_reset = imx_ssi_ac97_warm_reset
516 };
517 EXPORT_SYMBOL_GPL(soc_ac97_ops);
518
519 static int imx_ssi_probe(struct platform_device *pdev)
520 {
521 struct resource *res;
522 struct imx_ssi *ssi;
523 struct imx_ssi_platform_data *pdata = pdev->dev.platform_data;
524 int ret = 0;
525 struct snd_soc_dai_driver *dai;
526
527 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
528 if (!ssi)
529 return -ENOMEM;
530 dev_set_drvdata(&pdev->dev, ssi);
531
532 if (pdata) {
533 ssi->ac97_reset = pdata->ac97_reset;
534 ssi->ac97_warm_reset = pdata->ac97_warm_reset;
535 ssi->flags = pdata->flags;
536 }
537
538 ssi->irq = platform_get_irq(pdev, 0);
539
540 ssi->clk = clk_get(&pdev->dev, NULL);
541 if (IS_ERR(ssi->clk)) {
542 ret = PTR_ERR(ssi->clk);
543 dev_err(&pdev->dev, "Cannot get the clock: %d\n",
544 ret);
545 goto failed_clk;
546 }
547 clk_prepare_enable(ssi->clk);
548
549 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
550 if (!res) {
551 ret = -ENODEV;
552 goto failed_get_resource;
553 }
554
555 if (!request_mem_region(res->start, resource_size(res), DRV_NAME)) {
556 dev_err(&pdev->dev, "request_mem_region failed\n");
557 ret = -EBUSY;
558 goto failed_get_resource;
559 }
560
561 ssi->base = ioremap(res->start, resource_size(res));
562 if (!ssi->base) {
563 dev_err(&pdev->dev, "ioremap failed\n");
564 ret = -ENODEV;
565 goto failed_ioremap;
566 }
567
568 if (ssi->flags & IMX_SSI_USE_AC97) {
569 if (ac97_ssi) {
570 ret = -EBUSY;
571 goto failed_ac97;
572 }
573 ac97_ssi = ssi;
574 setup_channel_to_ac97(ssi);
575 dai = &imx_ac97_dai;
576 } else
577 dai = &imx_ssi_dai;
578
579 writel(0x0, ssi->base + SSI_SIER);
580
581 ssi->dma_params_rx.dma_addr = res->start + SSI_SRX0;
582 ssi->dma_params_tx.dma_addr = res->start + SSI_STX0;
583
584 ssi->dma_params_tx.burstsize = 6;
585 ssi->dma_params_rx.burstsize = 4;
586
587 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx0");
588 if (res)
589 ssi->dma_params_tx.dma = res->start;
590
591 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx0");
592 if (res)
593 ssi->dma_params_rx.dma = res->start;
594
595 platform_set_drvdata(pdev, ssi);
596
597 ret = snd_soc_register_dai(&pdev->dev, dai);
598 if (ret) {
599 dev_err(&pdev->dev, "register DAI failed\n");
600 goto failed_register;
601 }
602
603 ssi->soc_platform_pdev_fiq = platform_device_alloc("imx-fiq-pcm-audio", pdev->id);
604 if (!ssi->soc_platform_pdev_fiq) {
605 ret = -ENOMEM;
606 goto failed_pdev_fiq_alloc;
607 }
608
609 platform_set_drvdata(ssi->soc_platform_pdev_fiq, ssi);
610 ret = platform_device_add(ssi->soc_platform_pdev_fiq);
611 if (ret) {
612 dev_err(&pdev->dev, "failed to add platform device\n");
613 goto failed_pdev_fiq_add;
614 }
615
616 ssi->soc_platform_pdev = platform_device_alloc("imx-pcm-audio", pdev->id);
617 if (!ssi->soc_platform_pdev) {
618 ret = -ENOMEM;
619 goto failed_pdev_alloc;
620 }
621
622 platform_set_drvdata(ssi->soc_platform_pdev, ssi);
623 ret = platform_device_add(ssi->soc_platform_pdev);
624 if (ret) {
625 dev_err(&pdev->dev, "failed to add platform device\n");
626 goto failed_pdev_add;
627 }
628
629 return 0;
630
631 failed_pdev_add:
632 platform_device_put(ssi->soc_platform_pdev);
633 failed_pdev_alloc:
634 platform_device_del(ssi->soc_platform_pdev_fiq);
635 failed_pdev_fiq_add:
636 platform_device_put(ssi->soc_platform_pdev_fiq);
637 failed_pdev_fiq_alloc:
638 snd_soc_unregister_dai(&pdev->dev);
639 failed_register:
640 failed_ac97:
641 iounmap(ssi->base);
642 failed_ioremap:
643 release_mem_region(res->start, resource_size(res));
644 failed_get_resource:
645 clk_disable_unprepare(ssi->clk);
646 clk_put(ssi->clk);
647 failed_clk:
648 kfree(ssi);
649
650 return ret;
651 }
652
653 static int __devexit imx_ssi_remove(struct platform_device *pdev)
654 {
655 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
656 struct imx_ssi *ssi = platform_get_drvdata(pdev);
657
658 platform_device_unregister(ssi->soc_platform_pdev);
659 platform_device_unregister(ssi->soc_platform_pdev_fiq);
660
661 snd_soc_unregister_dai(&pdev->dev);
662
663 if (ssi->flags & IMX_SSI_USE_AC97)
664 ac97_ssi = NULL;
665
666 iounmap(ssi->base);
667 release_mem_region(res->start, resource_size(res));
668 clk_disable_unprepare(ssi->clk);
669 clk_put(ssi->clk);
670 kfree(ssi);
671
672 return 0;
673 }
674
675 static struct platform_driver imx_ssi_driver = {
676 .probe = imx_ssi_probe,
677 .remove = __devexit_p(imx_ssi_remove),
678
679 .driver = {
680 .name = "imx-ssi",
681 .owner = THIS_MODULE,
682 },
683 };
684
685 module_platform_driver(imx_ssi_driver);
686
687 /* Module information */
688 MODULE_AUTHOR("Sascha Hauer, <s.hauer@pengutronix.de>");
689 MODULE_DESCRIPTION("i.MX I2S/ac97 SoC Interface");
690 MODULE_LICENSE("GPL");
691 MODULE_ALIAS("platform:imx-ssi");
Linux with added FPC-III support