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docbook: fix fatal rapidio yet again (and more to come)
[linux/fpc-iii.git] / arch / arm / plat-omap / usb.c
bloba619475c4b769ab613c516920d61b5d853807d99
1 /*
2 * arch/arm/plat-omap/usb.c -- platform level USB initialization
3 *
4 * Copyright (C) 2004 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #undef DEBUG
22
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/errno.h>
27 #include <linux/init.h>
28 #include <linux/platform_device.h>
29 #include <linux/usb/otg.h>
30
31 #include <asm/io.h>
32 #include <asm/irq.h>
33 #include <asm/system.h>
34 #include <asm/hardware.h>
35
36 #include <asm/arch/control.h>
37 #include <asm/arch/mux.h>
38 #include <asm/arch/usb.h>
39 #include <asm/arch/board.h>
40
41 #ifdef CONFIG_ARCH_OMAP1
42
43 #define INT_USB_IRQ_GEN IH2_BASE + 20
44 #define INT_USB_IRQ_NISO IH2_BASE + 30
45 #define INT_USB_IRQ_ISO IH2_BASE + 29
46 #define INT_USB_IRQ_HGEN INT_USB_HHC_1
47 #define INT_USB_IRQ_OTG IH2_BASE + 8
48
49 #else
50
51 #define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
52 #define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
53 #define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
54 #define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
55 #define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
56
57 #endif
58
59
60 /* These routines should handle the standard chip-specific modes
61 * for usb0/1/2 ports, covering basic mux and transceiver setup.
62 *
63 * Some board-*.c files will need to set up additional mux options,
64 * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
65 */
66
67 /* TESTED ON:
68 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
69 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
70 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
71 * - 1510 Innovator UDC with bundled usb0 cable
72 * - 1510 Innovator OHCI with bundled usb1/usb2 cable
73 * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
74 * - 1710 custom development board using alternate pin group
75 * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
76 */
77
78 /*-------------------------------------------------------------------------*/
79
80 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_USB_MUSB_OTG)
81
82 static struct otg_transceiver *xceiv;
83
84 /**
85 * otg_get_transceiver - find the (single) OTG transceiver driver
86 *
87 * Returns the transceiver driver, after getting a refcount to it; or
88 * null if there is no such transceiver. The caller is responsible for
89 * releasing that count.
90 */
91 struct otg_transceiver *otg_get_transceiver(void)
92 {
93 if (xceiv)
94 get_device(xceiv->dev);
95 return xceiv;
96 }
97 EXPORT_SYMBOL(otg_get_transceiver);
98
99 int otg_set_transceiver(struct otg_transceiver *x)
100 {
101 if (xceiv && x)
102 return -EBUSY;
103 xceiv = x;
104 return 0;
105 }
106 EXPORT_SYMBOL(otg_set_transceiver);
107
108 #endif
109
110 /*-------------------------------------------------------------------------*/
111
112 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
113
114 static void omap2_usb_devconf_clear(u8 port, u32 mask)
115 {
116 u32 r;
117
118 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
119 r &= ~USBTXWRMODEI(port, mask);
120 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
121 }
122
123 static void omap2_usb_devconf_set(u8 port, u32 mask)
124 {
125 u32 r;
126
127 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
128 r |= USBTXWRMODEI(port, mask);
129 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
130 }
131
132 static void omap2_usb2_disable_5pinbitll(void)
133 {
134 u32 r;
135
136 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
137 r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
138 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
139 }
140
141 static void omap2_usb2_enable_5pinunitll(void)
142 {
143 u32 r;
144
145 r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
146 r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
147 omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
148 }
149
150 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
151 {
152 u32 syscon1 = 0;
153
154 if (cpu_is_omap24xx())
155 omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
156
157 if (nwires == 0) {
158 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
159 /* pulldown D+/D- */
160 USB_TRANSCEIVER_CTRL_REG &= ~(3 << 1);
161 }
162 return 0;
163 }
164
165 if (is_device) {
166 if (cpu_is_omap24xx())
167 omap_cfg_reg(J20_24XX_USB0_PUEN);
168 else
169 omap_cfg_reg(W4_USB_PUEN);
170 }
171
172 /* internal transceiver (unavailable on 17xx, 24xx) */
173 if (!cpu_class_is_omap2() && nwires == 2) {
174 // omap_cfg_reg(P9_USB_DP);
175 // omap_cfg_reg(R8_USB_DM);
176
177 if (cpu_is_omap15xx()) {
178 /* This works on 1510-Innovator */
179 return 0;
180 }
181
182 /* NOTES:
183 * - peripheral should configure VBUS detection!
184 * - only peripherals may use the internal D+/D- pulldowns
185 * - OTG support on this port not yet written
186 */
187
188 USB_TRANSCEIVER_CTRL_REG &= ~(7 << 4);
189 if (!is_device)
190 USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
191
192 return 3 << 16;
193 }
194
195 /* alternate pin config, external transceiver */
196 if (cpu_is_omap15xx()) {
197 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
198 return 0;
199 }
200
201 if (cpu_is_omap24xx()) {
202 omap_cfg_reg(K18_24XX_USB0_DAT);
203 omap_cfg_reg(K19_24XX_USB0_TXEN);
204 omap_cfg_reg(J14_24XX_USB0_SE0);
205 if (nwires != 3)
206 omap_cfg_reg(J18_24XX_USB0_RCV);
207 } else {
208 omap_cfg_reg(V6_USB0_TXD);
209 omap_cfg_reg(W9_USB0_TXEN);
210 omap_cfg_reg(W5_USB0_SE0);
211 if (nwires != 3)
212 omap_cfg_reg(Y5_USB0_RCV);
213 }
214
215 /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
216 * may be able to use I2C requests to set those bits along
217 * with VBUS switching and overcurrent detection.
218 */
219
220 if (cpu_class_is_omap1() && nwires != 6)
221 USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
222
223 switch (nwires) {
224 case 3:
225 syscon1 = 2;
226 if (cpu_is_omap24xx())
227 omap2_usb_devconf_set(0, USB_BIDIR);
228 break;
229 case 4:
230 syscon1 = 1;
231 if (cpu_is_omap24xx())
232 omap2_usb_devconf_set(0, USB_BIDIR);
233 break;
234 case 6:
235 syscon1 = 3;
236 if (cpu_is_omap24xx()) {
237 omap_cfg_reg(J19_24XX_USB0_VP);
238 omap_cfg_reg(K20_24XX_USB0_VM);
239 omap2_usb_devconf_set(0, USB_UNIDIR);
240 } else {
241 omap_cfg_reg(AA9_USB0_VP);
242 omap_cfg_reg(R9_USB0_VM);
243 USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
244 }
245 break;
246 default:
247 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
248 0, nwires);
249 }
250 return syscon1 << 16;
251 }
252
253 static u32 __init omap_usb1_init(unsigned nwires)
254 {
255 u32 syscon1 = 0;
256
257 if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
258 USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R;
259 if (cpu_is_omap24xx())
260 omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
261
262 if (nwires == 0)
263 return 0;
264
265 /* external transceiver */
266 if (cpu_class_is_omap1()) {
267 omap_cfg_reg(USB1_TXD);
268 omap_cfg_reg(USB1_TXEN);
269 if (nwires != 3)
270 omap_cfg_reg(USB1_RCV);
271 }
272
273 if (cpu_is_omap15xx()) {
274 omap_cfg_reg(USB1_SEO);
275 omap_cfg_reg(USB1_SPEED);
276 // SUSP
277 } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
278 omap_cfg_reg(W13_1610_USB1_SE0);
279 omap_cfg_reg(R13_1610_USB1_SPEED);
280 // SUSP
281 } else if (cpu_is_omap1710()) {
282 omap_cfg_reg(R13_1710_USB1_SE0);
283 // SUSP
284 } else if (cpu_is_omap24xx()) {
285 /* NOTE: board-specific code must set up pin muxing for usb1,
286 * since each signal could come out on either of two balls.
287 */
288 } else {
289 pr_debug("usb%d cpu unrecognized\n", 1);
290 return 0;
291 }
292
293 switch (nwires) {
294 case 2:
295 if (!cpu_is_omap24xx())
296 goto bad;
297 /* NOTE: board-specific code must override this setting if
298 * this TLL link is not using DP/DM
299 */
300 syscon1 = 1;
301 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
302 break;
303 case 3:
304 syscon1 = 2;
305 if (cpu_is_omap24xx())
306 omap2_usb_devconf_set(1, USB_BIDIR);
307 break;
308 case 4:
309 syscon1 = 1;
310 if (cpu_is_omap24xx())
311 omap2_usb_devconf_set(1, USB_BIDIR);
312 break;
313 case 6:
314 if (cpu_is_omap24xx())
315 goto bad;
316 syscon1 = 3;
317 omap_cfg_reg(USB1_VP);
318 omap_cfg_reg(USB1_VM);
319 if (!cpu_is_omap15xx())
320 USB_TRANSCEIVER_CTRL_REG |= CONF_USB1_UNI_R;
321 break;
322 default:
323 bad:
324 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
325 1, nwires);
326 }
327 return syscon1 << 20;
328 }
329
330 static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
331 {
332 u32 syscon1 = 0;
333
334 if (cpu_is_omap24xx()) {
335 omap2_usb2_disable_5pinbitll();
336 alt_pingroup = 0;
337 }
338
339 /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
340 if (alt_pingroup || nwires == 0)
341 return 0;
342
343 if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
344 USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
345
346 /* external transceiver */
347 if (cpu_is_omap15xx()) {
348 omap_cfg_reg(USB2_TXD);
349 omap_cfg_reg(USB2_TXEN);
350 omap_cfg_reg(USB2_SEO);
351 if (nwires != 3)
352 omap_cfg_reg(USB2_RCV);
353 /* there is no USB2_SPEED */
354 } else if (cpu_is_omap16xx()) {
355 omap_cfg_reg(V6_USB2_TXD);
356 omap_cfg_reg(W9_USB2_TXEN);
357 omap_cfg_reg(W5_USB2_SE0);
358 if (nwires != 3)
359 omap_cfg_reg(Y5_USB2_RCV);
360 // FIXME omap_cfg_reg(USB2_SPEED);
361 } else if (cpu_is_omap24xx()) {
362 omap_cfg_reg(Y11_24XX_USB2_DAT);
363 omap_cfg_reg(AA10_24XX_USB2_SE0);
364 if (nwires > 2)
365 omap_cfg_reg(AA12_24XX_USB2_TXEN);
366 if (nwires > 3)
367 omap_cfg_reg(AA6_24XX_USB2_RCV);
368 } else {
369 pr_debug("usb%d cpu unrecognized\n", 1);
370 return 0;
371 }
372 // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
373
374 switch (nwires) {
375 case 2:
376 if (!cpu_is_omap24xx())
377 goto bad;
378 /* NOTE: board-specific code must override this setting if
379 * this TLL link is not using DP/DM
380 */
381 syscon1 = 1;
382 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
383 break;
384 case 3:
385 syscon1 = 2;
386 if (cpu_is_omap24xx())
387 omap2_usb_devconf_set(2, USB_BIDIR);
388 break;
389 case 4:
390 syscon1 = 1;
391 if (cpu_is_omap24xx())
392 omap2_usb_devconf_set(2, USB_BIDIR);
393 break;
394 case 5:
395 if (!cpu_is_omap24xx())
396 goto bad;
397 omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
398 /* NOTE: board-specific code must override this setting if
399 * this TLL link is not using DP/DM. Something must also
400 * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
401 */
402 syscon1 = 3;
403 omap2_usb2_enable_5pinunitll();
404 break;
405 case 6:
406 if (cpu_is_omap24xx())
407 goto bad;
408 syscon1 = 3;
409 if (cpu_is_omap15xx()) {
410 omap_cfg_reg(USB2_VP);
411 omap_cfg_reg(USB2_VM);
412 } else {
413 omap_cfg_reg(AA9_USB2_VP);
414 omap_cfg_reg(R9_USB2_VM);
415 USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
416 }
417 break;
418 default:
419 bad:
420 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
421 2, nwires);
422 }
423 return syscon1 << 24;
424 }
425
426 #endif
427
428 /*-------------------------------------------------------------------------*/
429
430 #if defined(CONFIG_USB_GADGET_OMAP) || \
431 defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
432 (defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
433 static void usb_release(struct device *dev)
434 {
435 /* normally not freed */
436 }
437 #endif
438
439 #ifdef CONFIG_USB_GADGET_OMAP
440
441 static struct resource udc_resources[] = {
442 /* order is significant! */
443 { /* registers */
444 .start = UDC_BASE,
445 .end = UDC_BASE + 0xff,
446 .flags = IORESOURCE_MEM,
447 }, { /* general IRQ */
448 .start = INT_USB_IRQ_GEN,
449 .flags = IORESOURCE_IRQ,
450 }, { /* PIO IRQ */
451 .start = INT_USB_IRQ_NISO,
452 .flags = IORESOURCE_IRQ,
453 }, { /* SOF IRQ */
454 .start = INT_USB_IRQ_ISO,
455 .flags = IORESOURCE_IRQ,
456 },
457 };
458
459 static u64 udc_dmamask = ~(u32)0;
460
461 static struct platform_device udc_device = {
462 .name = "omap_udc",
463 .id = -1,
464 .dev = {
465 .release = usb_release,
466 .dma_mask = &udc_dmamask,
467 .coherent_dma_mask = 0xffffffff,
468 },
469 .num_resources = ARRAY_SIZE(udc_resources),
470 .resource = udc_resources,
471 };
472
473 #endif
474
475 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
476
477 /* The dmamask must be set for OHCI to work */
478 static u64 ohci_dmamask = ~(u32)0;
479
480 static struct resource ohci_resources[] = {
481 {
482 .start = OMAP_OHCI_BASE,
483 .end = OMAP_OHCI_BASE + 0xff,
484 .flags = IORESOURCE_MEM,
485 },
486 {
487 .start = INT_USB_IRQ_HGEN,
488 .flags = IORESOURCE_IRQ,
489 },
490 };
491
492 static struct platform_device ohci_device = {
493 .name = "ohci",
494 .id = -1,
495 .dev = {
496 .release = usb_release,
497 .dma_mask = &ohci_dmamask,
498 .coherent_dma_mask = 0xffffffff,
499 },
500 .num_resources = ARRAY_SIZE(ohci_resources),
501 .resource = ohci_resources,
502 };
503
504 #endif
505
506 #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
507
508 static struct resource otg_resources[] = {
509 /* order is significant! */
510 {
511 .start = OTG_BASE,
512 .end = OTG_BASE + 0xff,
513 .flags = IORESOURCE_MEM,
514 }, {
515 .start = INT_USB_IRQ_OTG,
516 .flags = IORESOURCE_IRQ,
517 },
518 };
519
520 static struct platform_device otg_device = {
521 .name = "omap_otg",
522 .id = -1,
523 .dev = {
524 .release = usb_release,
525 },
526 .num_resources = ARRAY_SIZE(otg_resources),
527 .resource = otg_resources,
528 };
529
530 #endif
531
532 /*-------------------------------------------------------------------------*/
533
534 #define ULPD_CLOCK_CTRL_REG __REG16(ULPD_CLOCK_CTRL)
535 #define ULPD_SOFT_REQ_REG __REG16(ULPD_SOFT_REQ)
536
537
538 // FIXME correct answer depends on hmc_mode,
539 // as does (on omap1) any nonzero value for config->otg port number
540 #ifdef CONFIG_USB_GADGET_OMAP
541 #define is_usb0_device(config) 1
542 #else
543 #define is_usb0_device(config) 0
544 #endif
545
546 /*-------------------------------------------------------------------------*/
547
548 #ifdef CONFIG_ARCH_OMAP_OTG
549
550 void __init
551 omap_otg_init(struct omap_usb_config *config)
552 {
553 u32 syscon = OTG_SYSCON_1_REG & 0xffff;
554 int status;
555 int alt_pingroup = 0;
556
557 /* NOTE: no bus or clock setup (yet?) */
558
559 syscon = OTG_SYSCON_1_REG & 0xffff;
560 if (!(syscon & OTG_RESET_DONE))
561 pr_debug("USB resets not complete?\n");
562
563 // OTG_IRQ_EN_REG = 0;
564
565 /* pin muxing and transceiver pinouts */
566 if (config->pins[0] > 2) /* alt pingroup 2 */
567 alt_pingroup = 1;
568 syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
569 syscon |= omap_usb1_init(config->pins[1]);
570 syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
571 pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
572 OTG_SYSCON_1_REG = syscon;
573
574 syscon = config->hmc_mode;
575 syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
576 #ifdef CONFIG_USB_OTG
577 if (config->otg)
578 syscon |= OTG_EN;
579 #endif
580 if (cpu_class_is_omap1())
581 pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG);
582 pr_debug("OTG_SYSCON_2_REG = %08x\n", syscon);
583 OTG_SYSCON_2_REG = syscon;
584
585 printk("USB: hmc %d", config->hmc_mode);
586 if (!alt_pingroup)
587 printk(", usb2 alt %d wires", config->pins[2]);
588 else if (config->pins[0])
589 printk(", usb0 %d wires%s", config->pins[0],
590 is_usb0_device(config) ? " (dev)" : "");
591 if (config->pins[1])
592 printk(", usb1 %d wires", config->pins[1]);
593 if (!alt_pingroup && config->pins[2])
594 printk(", usb2 %d wires", config->pins[2]);
595 if (config->otg)
596 printk(", Mini-AB on usb%d", config->otg - 1);
597 printk("\n");
598
599 if (cpu_class_is_omap1()) {
600 /* leave USB clocks/controllers off until needed */
601 ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ;
602 ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN;
603 ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK;
604 }
605 syscon = OTG_SYSCON_1_REG;
606 syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
607
608 #ifdef CONFIG_USB_GADGET_OMAP
609 if (config->otg || config->register_dev) {
610 syscon &= ~DEV_IDLE_EN;
611 udc_device.dev.platform_data = config;
612 /* FIXME patch IRQ numbers for omap730 */
613 status = platform_device_register(&udc_device);
614 if (status)
615 pr_debug("can't register UDC device, %d\n", status);
616 }
617 #endif
618
619 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
620 if (config->otg || config->register_host) {
621 syscon &= ~HST_IDLE_EN;
622 ohci_device.dev.platform_data = config;
623 if (cpu_is_omap730())
624 ohci_resources[1].start = INT_730_USB_HHC_1;
625 status = platform_device_register(&ohci_device);
626 if (status)
627 pr_debug("can't register OHCI device, %d\n", status);
628 }
629 #endif
630
631 #ifdef CONFIG_USB_OTG
632 if (config->otg) {
633 syscon &= ~OTG_IDLE_EN;
634 otg_device.dev.platform_data = config;
635 if (cpu_is_omap730())
636 otg_resources[1].start = INT_730_USB_OTG;
637 status = platform_device_register(&otg_device);
638 if (status)
639 pr_debug("can't register OTG device, %d\n", status);
640 }
641 #endif
642 pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
643 OTG_SYSCON_1_REG = syscon;
644
645 status = 0;
646 }
647
648 #else
649 static inline void omap_otg_init(struct omap_usb_config *config) {}
650 #endif
651
652 /*-------------------------------------------------------------------------*/
653
654 #ifdef CONFIG_ARCH_OMAP15XX
655
656 #define ULPD_DPLL_CTRL_REG __REG16(ULPD_DPLL_CTRL)
657 #define DPLL_IOB (1 << 13)
658 #define DPLL_PLL_ENABLE (1 << 4)
659 #define DPLL_LOCK (1 << 0)
660
661 #define ULPD_APLL_CTRL_REG __REG16(ULPD_APLL_CTRL)
662 #define APLL_NDPLL_SWITCH (1 << 0)
663
664
665 static void __init omap_1510_usb_init(struct omap_usb_config *config)
666 {
667 unsigned int val;
668
669 omap_usb0_init(config->pins[0], is_usb0_device(config));
670 omap_usb1_init(config->pins[1]);
671 omap_usb2_init(config->pins[2], 0);
672
673 val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
674 val |= (config->hmc_mode << 1);
675 omap_writel(val, MOD_CONF_CTRL_0);
676
677 printk("USB: hmc %d", config->hmc_mode);
678 if (config->pins[0])
679 printk(", usb0 %d wires%s", config->pins[0],
680 is_usb0_device(config) ? " (dev)" : "");
681 if (config->pins[1])
682 printk(", usb1 %d wires", config->pins[1]);
683 if (config->pins[2])
684 printk(", usb2 %d wires", config->pins[2]);
685 printk("\n");
686
687 /* use DPLL for 48 MHz function clock */
688 pr_debug("APLL %04x DPLL %04x REQ %04x\n", ULPD_APLL_CTRL_REG,
689 ULPD_DPLL_CTRL_REG, ULPD_SOFT_REQ_REG);
690 ULPD_APLL_CTRL_REG &= ~APLL_NDPLL_SWITCH;
691 ULPD_DPLL_CTRL_REG |= DPLL_IOB | DPLL_PLL_ENABLE;
692 ULPD_SOFT_REQ_REG |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
693 while (!(ULPD_DPLL_CTRL_REG & DPLL_LOCK))
694 cpu_relax();
695
696 #ifdef CONFIG_USB_GADGET_OMAP
697 if (config->register_dev) {
698 int status;
699
700 udc_device.dev.platform_data = config;
701 status = platform_device_register(&udc_device);
702 if (status)
703 pr_debug("can't register UDC device, %d\n", status);
704 /* udc driver gates 48MHz by D+ pullup */
705 }
706 #endif
707
708 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
709 if (config->register_host) {
710 int status;
711
712 ohci_device.dev.platform_data = config;
713 status = platform_device_register(&ohci_device);
714 if (status)
715 pr_debug("can't register OHCI device, %d\n", status);
716 /* hcd explicitly gates 48MHz */
717 }
718 #endif
719 }
720
721 #else
722 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
723 #endif
724
725 /*-------------------------------------------------------------------------*/
726
727 static struct omap_usb_config platform_data;
728
729 static int __init
730 omap_usb_init(void)
731 {
732 const struct omap_usb_config *config;
733
734 config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
735 if (config == NULL) {
736 printk(KERN_ERR "USB: No board-specific "
737 "platform config found\n");
738 return -ENODEV;
739 }
740 platform_data = *config;
741
742 if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
743 omap_otg_init(&platform_data);
744 else if (cpu_is_omap15xx())
745 omap_1510_usb_init(&platform_data);
746 else {
747 printk(KERN_ERR "USB: No init for your chip yet\n");
748 return -ENODEV;
749 }
750 return 0;
751 }
752
753 subsys_initcall(omap_usb_init);
Linux with added FPC-III support