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mac80211: small rate control changes
[linux/fpc-iii.git] / drivers / s390 / net / qeth_core_main.c
blobc7ab1b864516694e97eb3438a70b26f7a20fb952
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #include <linux/module.h>
12 #include <linux/moduleparam.h>
13 #include <linux/string.h>
14 #include <linux/errno.h>
15 #include <linux/kernel.h>
16 #include <linux/ip.h>
17 #include <linux/ipv6.h>
18 #include <linux/tcp.h>
19 #include <linux/mii.h>
20 #include <linux/kthread.h>
21
22 #include <asm/ebcdic.h>
23 #include <asm/io.h>
24 #include <asm/s390_rdev.h>
25
26 #include "qeth_core.h"
27 #include "qeth_core_offl.h"
28
29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
31 /* N P A M L V H */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
46 };
47 EXPORT_SYMBOL_GPL(qeth_dbf);
48
49 struct qeth_card_list_struct qeth_core_card_list;
50 EXPORT_SYMBOL_GPL(qeth_core_card_list);
51 struct kmem_cache *qeth_core_header_cache;
52 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
53
54 static struct device *qeth_core_root_dev;
55 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
56 static struct lock_class_key qdio_out_skb_queue_key;
57
58 static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
60 static int qeth_issue_next_read(struct qeth_card *);
61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63 static void qeth_free_buffer_pool(struct qeth_card *);
64 static int qeth_qdio_establish(struct qeth_card *);
65
66
67 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
68 struct qdio_buffer *buffer, int is_tso,
69 int *next_element_to_fill)
70 {
71 struct skb_frag_struct *frag;
72 int fragno;
73 unsigned long addr;
74 int element, cnt, dlen;
75
76 fragno = skb_shinfo(skb)->nr_frags;
77 element = *next_element_to_fill;
78 dlen = 0;
79
80 if (is_tso)
81 buffer->element[element].flags =
82 SBAL_FLAGS_MIDDLE_FRAG;
83 else
84 buffer->element[element].flags =
85 SBAL_FLAGS_FIRST_FRAG;
86 dlen = skb->len - skb->data_len;
87 if (dlen) {
88 buffer->element[element].addr = skb->data;
89 buffer->element[element].length = dlen;
90 element++;
91 }
92 for (cnt = 0; cnt < fragno; cnt++) {
93 frag = &skb_shinfo(skb)->frags[cnt];
94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
95 frag->page_offset;
96 buffer->element[element].addr = (char *)addr;
97 buffer->element[element].length = frag->size;
98 if (cnt < (fragno - 1))
99 buffer->element[element].flags =
100 SBAL_FLAGS_MIDDLE_FRAG;
101 else
102 buffer->element[element].flags =
103 SBAL_FLAGS_LAST_FRAG;
104 element++;
105 }
106 *next_element_to_fill = element;
107 }
108
109 static inline const char *qeth_get_cardname(struct qeth_card *card)
110 {
111 if (card->info.guestlan) {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSAE:
114 return " Guest LAN QDIO";
115 case QETH_CARD_TYPE_IQD:
116 return " Guest LAN Hiper";
117 default:
118 return " unknown";
119 }
120 } else {
121 switch (card->info.type) {
122 case QETH_CARD_TYPE_OSAE:
123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
127 return " OSN QDIO";
128 default:
129 return " unknown";
130 }
131 }
132 return " n/a";
133 }
134
135 /* max length to be returned: 14 */
136 const char *qeth_get_cardname_short(struct qeth_card *card)
137 {
138 if (card->info.guestlan) {
139 switch (card->info.type) {
140 case QETH_CARD_TYPE_OSAE:
141 return "GuestLAN QDIO";
142 case QETH_CARD_TYPE_IQD:
143 return "GuestLAN Hiper";
144 default:
145 return "unknown";
146 }
147 } else {
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSAE:
150 switch (card->info.link_type) {
151 case QETH_LINK_TYPE_FAST_ETH:
152 return "OSD_100";
153 case QETH_LINK_TYPE_HSTR:
154 return "HSTR";
155 case QETH_LINK_TYPE_GBIT_ETH:
156 return "OSD_1000";
157 case QETH_LINK_TYPE_10GBIT_ETH:
158 return "OSD_10GIG";
159 case QETH_LINK_TYPE_LANE_ETH100:
160 return "OSD_FE_LANE";
161 case QETH_LINK_TYPE_LANE_TR:
162 return "OSD_TR_LANE";
163 case QETH_LINK_TYPE_LANE_ETH1000:
164 return "OSD_GbE_LANE";
165 case QETH_LINK_TYPE_LANE:
166 return "OSD_ATM_LANE";
167 default:
168 return "OSD_Express";
169 }
170 case QETH_CARD_TYPE_IQD:
171 return "HiperSockets";
172 case QETH_CARD_TYPE_OSN:
173 return "OSN";
174 default:
175 return "unknown";
176 }
177 }
178 return "n/a";
179 }
180
181 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
182 int clear_start_mask)
183 {
184 unsigned long flags;
185
186 spin_lock_irqsave(&card->thread_mask_lock, flags);
187 card->thread_allowed_mask = threads;
188 if (clear_start_mask)
189 card->thread_start_mask &= threads;
190 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
191 wake_up(&card->wait_q);
192 }
193 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
194
195 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
196 {
197 unsigned long flags;
198 int rc = 0;
199
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 rc = (card->thread_running_mask & threads);
202 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
203 return rc;
204 }
205 EXPORT_SYMBOL_GPL(qeth_threads_running);
206
207 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
208 {
209 return wait_event_interruptible(card->wait_q,
210 qeth_threads_running(card, threads) == 0);
211 }
212 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
213
214 void qeth_clear_working_pool_list(struct qeth_card *card)
215 {
216 struct qeth_buffer_pool_entry *pool_entry, *tmp;
217
218 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
219 list_for_each_entry_safe(pool_entry, tmp,
220 &card->qdio.in_buf_pool.entry_list, list){
221 list_del(&pool_entry->list);
222 }
223 }
224 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
225
226 static int qeth_alloc_buffer_pool(struct qeth_card *card)
227 {
228 struct qeth_buffer_pool_entry *pool_entry;
229 void *ptr;
230 int i, j;
231
232 QETH_DBF_TEXT(TRACE, 5, "alocpool");
233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
235 if (!pool_entry) {
236 qeth_free_buffer_pool(card);
237 return -ENOMEM;
238 }
239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
240 ptr = (void *) __get_free_page(GFP_KERNEL);
241 if (!ptr) {
242 while (j > 0)
243 free_page((unsigned long)
244 pool_entry->elements[--j]);
245 kfree(pool_entry);
246 qeth_free_buffer_pool(card);
247 return -ENOMEM;
248 }
249 pool_entry->elements[j] = ptr;
250 }
251 list_add(&pool_entry->init_list,
252 &card->qdio.init_pool.entry_list);
253 }
254 return 0;
255 }
256
257 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
258 {
259 QETH_DBF_TEXT(TRACE, 2, "realcbp");
260
261 if ((card->state != CARD_STATE_DOWN) &&
262 (card->state != CARD_STATE_RECOVER))
263 return -EPERM;
264
265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
266 qeth_clear_working_pool_list(card);
267 qeth_free_buffer_pool(card);
268 card->qdio.in_buf_pool.buf_count = bufcnt;
269 card->qdio.init_pool.buf_count = bufcnt;
270 return qeth_alloc_buffer_pool(card);
271 }
272
273 int qeth_set_large_send(struct qeth_card *card,
274 enum qeth_large_send_types type)
275 {
276 int rc = 0;
277
278 if (card->dev == NULL) {
279 card->options.large_send = type;
280 return 0;
281 }
282 if (card->state == CARD_STATE_UP)
283 netif_tx_disable(card->dev);
284 card->options.large_send = type;
285 switch (card->options.large_send) {
286 case QETH_LARGE_SEND_EDDP:
287 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
288 NETIF_F_HW_CSUM;
289 break;
290 case QETH_LARGE_SEND_TSO:
291 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
292 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
293 NETIF_F_HW_CSUM;
294 } else {
295 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
296 NETIF_F_HW_CSUM);
297 card->options.large_send = QETH_LARGE_SEND_NO;
298 rc = -EOPNOTSUPP;
299 }
300 break;
301 default: /* includes QETH_LARGE_SEND_NO */
302 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
303 NETIF_F_HW_CSUM);
304 break;
305 }
306 if (card->state == CARD_STATE_UP)
307 netif_wake_queue(card->dev);
308 return rc;
309 }
310 EXPORT_SYMBOL_GPL(qeth_set_large_send);
311
312 static int qeth_issue_next_read(struct qeth_card *card)
313 {
314 int rc;
315 struct qeth_cmd_buffer *iob;
316
317 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
318 if (card->read.state != CH_STATE_UP)
319 return -EIO;
320 iob = qeth_get_buffer(&card->read);
321 if (!iob) {
322 PRINT_WARN("issue_next_read failed: no iob available!\n");
323 return -ENOMEM;
324 }
325 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
326 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
327 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
328 (addr_t) iob, 0, 0);
329 if (rc) {
330 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
331 atomic_set(&card->read.irq_pending, 0);
332 qeth_schedule_recovery(card);
333 wake_up(&card->wait_q);
334 }
335 return rc;
336 }
337
338 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
339 {
340 struct qeth_reply *reply;
341
342 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
343 if (reply) {
344 atomic_set(&reply->refcnt, 1);
345 atomic_set(&reply->received, 0);
346 reply->card = card;
347 };
348 return reply;
349 }
350
351 static void qeth_get_reply(struct qeth_reply *reply)
352 {
353 WARN_ON(atomic_read(&reply->refcnt) <= 0);
354 atomic_inc(&reply->refcnt);
355 }
356
357 static void qeth_put_reply(struct qeth_reply *reply)
358 {
359 WARN_ON(atomic_read(&reply->refcnt) <= 0);
360 if (atomic_dec_and_test(&reply->refcnt))
361 kfree(reply);
362 }
363
364 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
365 struct qeth_card *card)
366 {
367 char *ipa_name;
368 int com = cmd->hdr.command;
369 ipa_name = qeth_get_ipa_cmd_name(com);
370 if (rc)
371 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
372 ipa_name, com, QETH_CARD_IFNAME(card),
373 rc, qeth_get_ipa_msg(rc));
374 else
375 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
376 ipa_name, com, QETH_CARD_IFNAME(card));
377 }
378
379 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
380 struct qeth_cmd_buffer *iob)
381 {
382 struct qeth_ipa_cmd *cmd = NULL;
383
384 QETH_DBF_TEXT(TRACE, 5, "chkipad");
385 if (IS_IPA(iob->data)) {
386 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
387 if (IS_IPA_REPLY(cmd)) {
388 if (cmd->hdr.command < IPA_CMD_SETCCID ||
389 cmd->hdr.command > IPA_CMD_MODCCID)
390 qeth_issue_ipa_msg(cmd,
391 cmd->hdr.return_code, card);
392 return cmd;
393 } else {
394 switch (cmd->hdr.command) {
395 case IPA_CMD_STOPLAN:
396 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
397 "there is a network problem or "
398 "someone pulled the cable or "
399 "disabled the port.\n",
400 QETH_CARD_IFNAME(card),
401 card->info.chpid);
402 card->lan_online = 0;
403 if (card->dev && netif_carrier_ok(card->dev))
404 netif_carrier_off(card->dev);
405 return NULL;
406 case IPA_CMD_STARTLAN:
407 PRINT_INFO("Link reestablished on %s "
408 "(CHPID 0x%X). Scheduling "
409 "IP address reset.\n",
410 QETH_CARD_IFNAME(card),
411 card->info.chpid);
412 netif_carrier_on(card->dev);
413 card->lan_online = 1;
414 qeth_schedule_recovery(card);
415 return NULL;
416 case IPA_CMD_MODCCID:
417 return cmd;
418 case IPA_CMD_REGISTER_LOCAL_ADDR:
419 QETH_DBF_TEXT(TRACE, 3, "irla");
420 break;
421 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
422 QETH_DBF_TEXT(TRACE, 3, "urla");
423 break;
424 default:
425 QETH_DBF_MESSAGE(2, "Received data is IPA "
426 "but not a reply!\n");
427 break;
428 }
429 }
430 }
431 return cmd;
432 }
433
434 void qeth_clear_ipacmd_list(struct qeth_card *card)
435 {
436 struct qeth_reply *reply, *r;
437 unsigned long flags;
438
439 QETH_DBF_TEXT(TRACE, 4, "clipalst");
440
441 spin_lock_irqsave(&card->lock, flags);
442 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
443 qeth_get_reply(reply);
444 reply->rc = -EIO;
445 atomic_inc(&reply->received);
446 list_del_init(&reply->list);
447 wake_up(&reply->wait_q);
448 qeth_put_reply(reply);
449 }
450 spin_unlock_irqrestore(&card->lock, flags);
451 }
452 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
453
454 static int qeth_check_idx_response(unsigned char *buffer)
455 {
456 if (!buffer)
457 return 0;
458
459 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
460 if ((buffer[2] & 0xc0) == 0xc0) {
461 PRINT_WARN("received an IDX TERMINATE "
462 "with cause code 0x%02x%s\n",
463 buffer[4],
464 ((buffer[4] == 0x22) ?
465 " -- try another portname" : ""));
466 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
467 QETH_DBF_TEXT(TRACE, 2, " idxterm");
468 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
469 return -EIO;
470 }
471 return 0;
472 }
473
474 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
475 __u32 len)
476 {
477 struct qeth_card *card;
478
479 QETH_DBF_TEXT(TRACE, 4, "setupccw");
480 card = CARD_FROM_CDEV(channel->ccwdev);
481 if (channel == &card->read)
482 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
483 else
484 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
485 channel->ccw.count = len;
486 channel->ccw.cda = (__u32) __pa(iob);
487 }
488
489 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
490 {
491 __u8 index;
492
493 QETH_DBF_TEXT(TRACE, 6, "getbuff");
494 index = channel->io_buf_no;
495 do {
496 if (channel->iob[index].state == BUF_STATE_FREE) {
497 channel->iob[index].state = BUF_STATE_LOCKED;
498 channel->io_buf_no = (channel->io_buf_no + 1) %
499 QETH_CMD_BUFFER_NO;
500 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
501 return channel->iob + index;
502 }
503 index = (index + 1) % QETH_CMD_BUFFER_NO;
504 } while (index != channel->io_buf_no);
505
506 return NULL;
507 }
508
509 void qeth_release_buffer(struct qeth_channel *channel,
510 struct qeth_cmd_buffer *iob)
511 {
512 unsigned long flags;
513
514 QETH_DBF_TEXT(TRACE, 6, "relbuff");
515 spin_lock_irqsave(&channel->iob_lock, flags);
516 memset(iob->data, 0, QETH_BUFSIZE);
517 iob->state = BUF_STATE_FREE;
518 iob->callback = qeth_send_control_data_cb;
519 iob->rc = 0;
520 spin_unlock_irqrestore(&channel->iob_lock, flags);
521 }
522 EXPORT_SYMBOL_GPL(qeth_release_buffer);
523
524 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
525 {
526 struct qeth_cmd_buffer *buffer = NULL;
527 unsigned long flags;
528
529 spin_lock_irqsave(&channel->iob_lock, flags);
530 buffer = __qeth_get_buffer(channel);
531 spin_unlock_irqrestore(&channel->iob_lock, flags);
532 return buffer;
533 }
534
535 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
536 {
537 struct qeth_cmd_buffer *buffer;
538 wait_event(channel->wait_q,
539 ((buffer = qeth_get_buffer(channel)) != NULL));
540 return buffer;
541 }
542 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
543
544 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
545 {
546 int cnt;
547
548 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
549 qeth_release_buffer(channel, &channel->iob[cnt]);
550 channel->buf_no = 0;
551 channel->io_buf_no = 0;
552 }
553 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
554
555 static void qeth_send_control_data_cb(struct qeth_channel *channel,
556 struct qeth_cmd_buffer *iob)
557 {
558 struct qeth_card *card;
559 struct qeth_reply *reply, *r;
560 struct qeth_ipa_cmd *cmd;
561 unsigned long flags;
562 int keep_reply;
563
564 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
565
566 card = CARD_FROM_CDEV(channel->ccwdev);
567 if (qeth_check_idx_response(iob->data)) {
568 qeth_clear_ipacmd_list(card);
569 qeth_schedule_recovery(card);
570 goto out;
571 }
572
573 cmd = qeth_check_ipa_data(card, iob);
574 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
575 goto out;
576 /*in case of OSN : check if cmd is set */
577 if (card->info.type == QETH_CARD_TYPE_OSN &&
578 cmd &&
579 cmd->hdr.command != IPA_CMD_STARTLAN &&
580 card->osn_info.assist_cb != NULL) {
581 card->osn_info.assist_cb(card->dev, cmd);
582 goto out;
583 }
584
585 spin_lock_irqsave(&card->lock, flags);
586 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
587 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
588 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
589 qeth_get_reply(reply);
590 list_del_init(&reply->list);
591 spin_unlock_irqrestore(&card->lock, flags);
592 keep_reply = 0;
593 if (reply->callback != NULL) {
594 if (cmd) {
595 reply->offset = (__u16)((char *)cmd -
596 (char *)iob->data);
597 keep_reply = reply->callback(card,
598 reply,
599 (unsigned long)cmd);
600 } else
601 keep_reply = reply->callback(card,
602 reply,
603 (unsigned long)iob);
604 }
605 if (cmd)
606 reply->rc = (u16) cmd->hdr.return_code;
607 else if (iob->rc)
608 reply->rc = iob->rc;
609 if (keep_reply) {
610 spin_lock_irqsave(&card->lock, flags);
611 list_add_tail(&reply->list,
612 &card->cmd_waiter_list);
613 spin_unlock_irqrestore(&card->lock, flags);
614 } else {
615 atomic_inc(&reply->received);
616 wake_up(&reply->wait_q);
617 }
618 qeth_put_reply(reply);
619 goto out;
620 }
621 }
622 spin_unlock_irqrestore(&card->lock, flags);
623 out:
624 memcpy(&card->seqno.pdu_hdr_ack,
625 QETH_PDU_HEADER_SEQ_NO(iob->data),
626 QETH_SEQ_NO_LENGTH);
627 qeth_release_buffer(channel, iob);
628 }
629
630 static int qeth_setup_channel(struct qeth_channel *channel)
631 {
632 int cnt;
633
634 QETH_DBF_TEXT(SETUP, 2, "setupch");
635 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
636 channel->iob[cnt].data = (char *)
637 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
638 if (channel->iob[cnt].data == NULL)
639 break;
640 channel->iob[cnt].state = BUF_STATE_FREE;
641 channel->iob[cnt].channel = channel;
642 channel->iob[cnt].callback = qeth_send_control_data_cb;
643 channel->iob[cnt].rc = 0;
644 }
645 if (cnt < QETH_CMD_BUFFER_NO) {
646 while (cnt-- > 0)
647 kfree(channel->iob[cnt].data);
648 return -ENOMEM;
649 }
650 channel->buf_no = 0;
651 channel->io_buf_no = 0;
652 atomic_set(&channel->irq_pending, 0);
653 spin_lock_init(&channel->iob_lock);
654
655 init_waitqueue_head(&channel->wait_q);
656 return 0;
657 }
658
659 static int qeth_set_thread_start_bit(struct qeth_card *card,
660 unsigned long thread)
661 {
662 unsigned long flags;
663
664 spin_lock_irqsave(&card->thread_mask_lock, flags);
665 if (!(card->thread_allowed_mask & thread) ||
666 (card->thread_start_mask & thread)) {
667 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
668 return -EPERM;
669 }
670 card->thread_start_mask |= thread;
671 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
672 return 0;
673 }
674
675 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
676 {
677 unsigned long flags;
678
679 spin_lock_irqsave(&card->thread_mask_lock, flags);
680 card->thread_start_mask &= ~thread;
681 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
682 wake_up(&card->wait_q);
683 }
684 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
685
686 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
687 {
688 unsigned long flags;
689
690 spin_lock_irqsave(&card->thread_mask_lock, flags);
691 card->thread_running_mask &= ~thread;
692 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
693 wake_up(&card->wait_q);
694 }
695 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
696
697 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
698 {
699 unsigned long flags;
700 int rc = 0;
701
702 spin_lock_irqsave(&card->thread_mask_lock, flags);
703 if (card->thread_start_mask & thread) {
704 if ((card->thread_allowed_mask & thread) &&
705 !(card->thread_running_mask & thread)) {
706 rc = 1;
707 card->thread_start_mask &= ~thread;
708 card->thread_running_mask |= thread;
709 } else
710 rc = -EPERM;
711 }
712 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
713 return rc;
714 }
715
716 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
717 {
718 int rc = 0;
719
720 wait_event(card->wait_q,
721 (rc = __qeth_do_run_thread(card, thread)) >= 0);
722 return rc;
723 }
724 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
725
726 void qeth_schedule_recovery(struct qeth_card *card)
727 {
728 QETH_DBF_TEXT(TRACE, 2, "startrec");
729 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
730 schedule_work(&card->kernel_thread_starter);
731 }
732 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
733
734 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
735 {
736 int dstat, cstat;
737 char *sense;
738
739 sense = (char *) irb->ecw;
740 cstat = irb->scsw.cmd.cstat;
741 dstat = irb->scsw.cmd.dstat;
742
743 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
744 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
745 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
746 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
747 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
748 cdev->dev.bus_id, dstat, cstat);
749 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
750 16, 1, irb, 64, 1);
751 return 1;
752 }
753
754 if (dstat & DEV_STAT_UNIT_CHECK) {
755 if (sense[SENSE_RESETTING_EVENT_BYTE] &
756 SENSE_RESETTING_EVENT_FLAG) {
757 QETH_DBF_TEXT(TRACE, 2, "REVIND");
758 return 1;
759 }
760 if (sense[SENSE_COMMAND_REJECT_BYTE] &
761 SENSE_COMMAND_REJECT_FLAG) {
762 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
763 return 0;
764 }
765 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
766 QETH_DBF_TEXT(TRACE, 2, "AFFE");
767 return 1;
768 }
769 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
770 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
771 return 0;
772 }
773 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
774 return 1;
775 }
776 return 0;
777 }
778
779 static long __qeth_check_irb_error(struct ccw_device *cdev,
780 unsigned long intparm, struct irb *irb)
781 {
782 if (!IS_ERR(irb))
783 return 0;
784
785 switch (PTR_ERR(irb)) {
786 case -EIO:
787 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
788 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
789 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
790 break;
791 case -ETIMEDOUT:
792 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
793 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
794 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
795 if (intparm == QETH_RCD_PARM) {
796 struct qeth_card *card = CARD_FROM_CDEV(cdev);
797
798 if (card && (card->data.ccwdev == cdev)) {
799 card->data.state = CH_STATE_DOWN;
800 wake_up(&card->wait_q);
801 }
802 }
803 break;
804 default:
805 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
806 cdev->dev.bus_id);
807 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
808 QETH_DBF_TEXT(TRACE, 2, " rc???");
809 }
810 return PTR_ERR(irb);
811 }
812
813 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
814 struct irb *irb)
815 {
816 int rc;
817 int cstat, dstat;
818 struct qeth_cmd_buffer *buffer;
819 struct qeth_channel *channel;
820 struct qeth_card *card;
821 struct qeth_cmd_buffer *iob;
822 __u8 index;
823
824 QETH_DBF_TEXT(TRACE, 5, "irq");
825
826 if (__qeth_check_irb_error(cdev, intparm, irb))
827 return;
828 cstat = irb->scsw.cmd.cstat;
829 dstat = irb->scsw.cmd.dstat;
830
831 card = CARD_FROM_CDEV(cdev);
832 if (!card)
833 return;
834
835 if (card->read.ccwdev == cdev) {
836 channel = &card->read;
837 QETH_DBF_TEXT(TRACE, 5, "read");
838 } else if (card->write.ccwdev == cdev) {
839 channel = &card->write;
840 QETH_DBF_TEXT(TRACE, 5, "write");
841 } else {
842 channel = &card->data;
843 QETH_DBF_TEXT(TRACE, 5, "data");
844 }
845 atomic_set(&channel->irq_pending, 0);
846
847 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
848 channel->state = CH_STATE_STOPPED;
849
850 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
851 channel->state = CH_STATE_HALTED;
852
853 /*let's wake up immediately on data channel*/
854 if ((channel == &card->data) && (intparm != 0) &&
855 (intparm != QETH_RCD_PARM))
856 goto out;
857
858 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
859 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
860 /* we don't have to handle this further */
861 intparm = 0;
862 }
863 if (intparm == QETH_HALT_CHANNEL_PARM) {
864 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
865 /* we don't have to handle this further */
866 intparm = 0;
867 }
868 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
869 (dstat & DEV_STAT_UNIT_CHECK) ||
870 (cstat)) {
871 if (irb->esw.esw0.erw.cons) {
872 /* TODO: we should make this s390dbf */
873 PRINT_WARN("sense data available on channel %s.\n",
874 CHANNEL_ID(channel));
875 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
876 print_hex_dump(KERN_WARNING, "qeth: irb ",
877 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
878 print_hex_dump(KERN_WARNING, "qeth: sense data ",
879 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
880 }
881 if (intparm == QETH_RCD_PARM) {
882 channel->state = CH_STATE_DOWN;
883 goto out;
884 }
885 rc = qeth_get_problem(cdev, irb);
886 if (rc) {
887 qeth_schedule_recovery(card);
888 goto out;
889 }
890 }
891
892 if (intparm == QETH_RCD_PARM) {
893 channel->state = CH_STATE_RCD_DONE;
894 goto out;
895 }
896 if (intparm) {
897 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
898 buffer->state = BUF_STATE_PROCESSED;
899 }
900 if (channel == &card->data)
901 return;
902 if (channel == &card->read &&
903 channel->state == CH_STATE_UP)
904 qeth_issue_next_read(card);
905
906 iob = channel->iob;
907 index = channel->buf_no;
908 while (iob[index].state == BUF_STATE_PROCESSED) {
909 if (iob[index].callback != NULL)
910 iob[index].callback(channel, iob + index);
911
912 index = (index + 1) % QETH_CMD_BUFFER_NO;
913 }
914 channel->buf_no = index;
915 out:
916 wake_up(&card->wait_q);
917 return;
918 }
919
920 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
921 struct qeth_qdio_out_buffer *buf)
922 {
923 int i;
924 struct sk_buff *skb;
925
926 /* is PCI flag set on buffer? */
927 if (buf->buffer->element[0].flags & 0x40)
928 atomic_dec(&queue->set_pci_flags_count);
929
930 skb = skb_dequeue(&buf->skb_list);
931 while (skb) {
932 atomic_dec(&skb->users);
933 dev_kfree_skb_any(skb);
934 skb = skb_dequeue(&buf->skb_list);
935 }
936 qeth_eddp_buf_release_contexts(buf);
937 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
938 if (buf->buffer->element[i].addr && buf->is_header[i])
939 kmem_cache_free(qeth_core_header_cache,
940 buf->buffer->element[i].addr);
941 buf->is_header[i] = 0;
942 buf->buffer->element[i].length = 0;
943 buf->buffer->element[i].addr = NULL;
944 buf->buffer->element[i].flags = 0;
945 }
946 buf->next_element_to_fill = 0;
947 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
948 }
949
950 void qeth_clear_qdio_buffers(struct qeth_card *card)
951 {
952 int i, j;
953
954 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
955 /* clear outbound buffers to free skbs */
956 for (i = 0; i < card->qdio.no_out_queues; ++i)
957 if (card->qdio.out_qs[i]) {
958 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
959 qeth_clear_output_buffer(card->qdio.out_qs[i],
960 &card->qdio.out_qs[i]->bufs[j]);
961 }
962 }
963 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
964
965 static void qeth_free_buffer_pool(struct qeth_card *card)
966 {
967 struct qeth_buffer_pool_entry *pool_entry, *tmp;
968 int i = 0;
969 QETH_DBF_TEXT(TRACE, 5, "freepool");
970 list_for_each_entry_safe(pool_entry, tmp,
971 &card->qdio.init_pool.entry_list, init_list){
972 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
973 free_page((unsigned long)pool_entry->elements[i]);
974 list_del(&pool_entry->init_list);
975 kfree(pool_entry);
976 }
977 }
978
979 static void qeth_free_qdio_buffers(struct qeth_card *card)
980 {
981 int i, j;
982
983 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
984 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
985 QETH_QDIO_UNINITIALIZED)
986 return;
987 kfree(card->qdio.in_q);
988 card->qdio.in_q = NULL;
989 /* inbound buffer pool */
990 qeth_free_buffer_pool(card);
991 /* free outbound qdio_qs */
992 if (card->qdio.out_qs) {
993 for (i = 0; i < card->qdio.no_out_queues; ++i) {
994 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
995 qeth_clear_output_buffer(card->qdio.out_qs[i],
996 &card->qdio.out_qs[i]->bufs[j]);
997 kfree(card->qdio.out_qs[i]);
998 }
999 kfree(card->qdio.out_qs);
1000 card->qdio.out_qs = NULL;
1001 }
1002 }
1003
1004 static void qeth_clean_channel(struct qeth_channel *channel)
1005 {
1006 int cnt;
1007
1008 QETH_DBF_TEXT(SETUP, 2, "freech");
1009 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1010 kfree(channel->iob[cnt].data);
1011 }
1012
1013 static int qeth_is_1920_device(struct qeth_card *card)
1014 {
1015 int single_queue = 0;
1016 struct ccw_device *ccwdev;
1017 struct channelPath_dsc {
1018 u8 flags;
1019 u8 lsn;
1020 u8 desc;
1021 u8 chpid;
1022 u8 swla;
1023 u8 zeroes;
1024 u8 chla;
1025 u8 chpp;
1026 } *chp_dsc;
1027
1028 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1029
1030 ccwdev = card->data.ccwdev;
1031 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1032 if (chp_dsc != NULL) {
1033 /* CHPP field bit 6 == 1 -> single queue */
1034 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1035 kfree(chp_dsc);
1036 }
1037 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1038 return single_queue;
1039 }
1040
1041 static void qeth_init_qdio_info(struct qeth_card *card)
1042 {
1043 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1044 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1045 /* inbound */
1046 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1047 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1048 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1049 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1050 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1051 }
1052
1053 static void qeth_set_intial_options(struct qeth_card *card)
1054 {
1055 card->options.route4.type = NO_ROUTER;
1056 card->options.route6.type = NO_ROUTER;
1057 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1058 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1059 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1060 card->options.fake_broadcast = 0;
1061 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1062 card->options.fake_ll = 0;
1063 card->options.performance_stats = 0;
1064 card->options.rx_sg_cb = QETH_RX_SG_CB;
1065 }
1066
1067 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1068 {
1069 unsigned long flags;
1070 int rc = 0;
1071
1072 spin_lock_irqsave(&card->thread_mask_lock, flags);
1073 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1074 (u8) card->thread_start_mask,
1075 (u8) card->thread_allowed_mask,
1076 (u8) card->thread_running_mask);
1077 rc = (card->thread_start_mask & thread);
1078 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1079 return rc;
1080 }
1081
1082 static void qeth_start_kernel_thread(struct work_struct *work)
1083 {
1084 struct qeth_card *card = container_of(work, struct qeth_card,
1085 kernel_thread_starter);
1086 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1087
1088 if (card->read.state != CH_STATE_UP &&
1089 card->write.state != CH_STATE_UP)
1090 return;
1091 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1092 kthread_run(card->discipline.recover, (void *) card,
1093 "qeth_recover");
1094 }
1095
1096 static int qeth_setup_card(struct qeth_card *card)
1097 {
1098
1099 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1100 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1101
1102 card->read.state = CH_STATE_DOWN;
1103 card->write.state = CH_STATE_DOWN;
1104 card->data.state = CH_STATE_DOWN;
1105 card->state = CARD_STATE_DOWN;
1106 card->lan_online = 0;
1107 card->use_hard_stop = 0;
1108 card->dev = NULL;
1109 spin_lock_init(&card->vlanlock);
1110 spin_lock_init(&card->mclock);
1111 card->vlangrp = NULL;
1112 spin_lock_init(&card->lock);
1113 spin_lock_init(&card->ip_lock);
1114 spin_lock_init(&card->thread_mask_lock);
1115 card->thread_start_mask = 0;
1116 card->thread_allowed_mask = 0;
1117 card->thread_running_mask = 0;
1118 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1119 INIT_LIST_HEAD(&card->ip_list);
1120 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1121 if (!card->ip_tbd_list) {
1122 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1123 return -ENOMEM;
1124 }
1125 INIT_LIST_HEAD(card->ip_tbd_list);
1126 INIT_LIST_HEAD(&card->cmd_waiter_list);
1127 init_waitqueue_head(&card->wait_q);
1128 /* intial options */
1129 qeth_set_intial_options(card);
1130 /* IP address takeover */
1131 INIT_LIST_HEAD(&card->ipato.entries);
1132 card->ipato.enabled = 0;
1133 card->ipato.invert4 = 0;
1134 card->ipato.invert6 = 0;
1135 /* init QDIO stuff */
1136 qeth_init_qdio_info(card);
1137 return 0;
1138 }
1139
1140 static struct qeth_card *qeth_alloc_card(void)
1141 {
1142 struct qeth_card *card;
1143
1144 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1145 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1146 if (!card)
1147 return NULL;
1148 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1149 if (qeth_setup_channel(&card->read)) {
1150 kfree(card);
1151 return NULL;
1152 }
1153 if (qeth_setup_channel(&card->write)) {
1154 qeth_clean_channel(&card->read);
1155 kfree(card);
1156 return NULL;
1157 }
1158 card->options.layer2 = -1;
1159 return card;
1160 }
1161
1162 static int qeth_determine_card_type(struct qeth_card *card)
1163 {
1164 int i = 0;
1165
1166 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1167
1168 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1169 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1170 while (known_devices[i][4]) {
1171 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1172 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1173 card->info.type = known_devices[i][4];
1174 card->qdio.no_out_queues = known_devices[i][8];
1175 card->info.is_multicast_different = known_devices[i][9];
1176 if (qeth_is_1920_device(card)) {
1177 PRINT_INFO("Priority Queueing not able "
1178 "due to hardware limitations!\n");
1179 card->qdio.no_out_queues = 1;
1180 card->qdio.default_out_queue = 0;
1181 }
1182 return 0;
1183 }
1184 i++;
1185 }
1186 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1187 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1188 return -ENOENT;
1189 }
1190
1191 static int qeth_clear_channel(struct qeth_channel *channel)
1192 {
1193 unsigned long flags;
1194 struct qeth_card *card;
1195 int rc;
1196
1197 QETH_DBF_TEXT(TRACE, 3, "clearch");
1198 card = CARD_FROM_CDEV(channel->ccwdev);
1199 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1200 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1201 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1202
1203 if (rc)
1204 return rc;
1205 rc = wait_event_interruptible_timeout(card->wait_q,
1206 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1207 if (rc == -ERESTARTSYS)
1208 return rc;
1209 if (channel->state != CH_STATE_STOPPED)
1210 return -ETIME;
1211 channel->state = CH_STATE_DOWN;
1212 return 0;
1213 }
1214
1215 static int qeth_halt_channel(struct qeth_channel *channel)
1216 {
1217 unsigned long flags;
1218 struct qeth_card *card;
1219 int rc;
1220
1221 QETH_DBF_TEXT(TRACE, 3, "haltch");
1222 card = CARD_FROM_CDEV(channel->ccwdev);
1223 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1224 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1225 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1226
1227 if (rc)
1228 return rc;
1229 rc = wait_event_interruptible_timeout(card->wait_q,
1230 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1231 if (rc == -ERESTARTSYS)
1232 return rc;
1233 if (channel->state != CH_STATE_HALTED)
1234 return -ETIME;
1235 return 0;
1236 }
1237
1238 static int qeth_halt_channels(struct qeth_card *card)
1239 {
1240 int rc1 = 0, rc2 = 0, rc3 = 0;
1241
1242 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1243 rc1 = qeth_halt_channel(&card->read);
1244 rc2 = qeth_halt_channel(&card->write);
1245 rc3 = qeth_halt_channel(&card->data);
1246 if (rc1)
1247 return rc1;
1248 if (rc2)
1249 return rc2;
1250 return rc3;
1251 }
1252
1253 static int qeth_clear_channels(struct qeth_card *card)
1254 {
1255 int rc1 = 0, rc2 = 0, rc3 = 0;
1256
1257 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1258 rc1 = qeth_clear_channel(&card->read);
1259 rc2 = qeth_clear_channel(&card->write);
1260 rc3 = qeth_clear_channel(&card->data);
1261 if (rc1)
1262 return rc1;
1263 if (rc2)
1264 return rc2;
1265 return rc3;
1266 }
1267
1268 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1269 {
1270 int rc = 0;
1271
1272 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1273 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1274
1275 if (halt)
1276 rc = qeth_halt_channels(card);
1277 if (rc)
1278 return rc;
1279 return qeth_clear_channels(card);
1280 }
1281
1282 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1283 {
1284 int rc = 0;
1285
1286 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1287 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1288 QETH_QDIO_CLEANING)) {
1289 case QETH_QDIO_ESTABLISHED:
1290 if (card->info.type == QETH_CARD_TYPE_IQD)
1291 rc = qdio_cleanup(CARD_DDEV(card),
1292 QDIO_FLAG_CLEANUP_USING_HALT);
1293 else
1294 rc = qdio_cleanup(CARD_DDEV(card),
1295 QDIO_FLAG_CLEANUP_USING_CLEAR);
1296 if (rc)
1297 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1298 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1299 break;
1300 case QETH_QDIO_CLEANING:
1301 return rc;
1302 default:
1303 break;
1304 }
1305 rc = qeth_clear_halt_card(card, use_halt);
1306 if (rc)
1307 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1308 card->state = CARD_STATE_DOWN;
1309 return rc;
1310 }
1311 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1312
1313 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1314 int *length)
1315 {
1316 struct ciw *ciw;
1317 char *rcd_buf;
1318 int ret;
1319 struct qeth_channel *channel = &card->data;
1320 unsigned long flags;
1321
1322 /*
1323 * scan for RCD command in extended SenseID data
1324 */
1325 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1326 if (!ciw || ciw->cmd == 0)
1327 return -EOPNOTSUPP;
1328 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1329 if (!rcd_buf)
1330 return -ENOMEM;
1331
1332 channel->ccw.cmd_code = ciw->cmd;
1333 channel->ccw.cda = (__u32) __pa(rcd_buf);
1334 channel->ccw.count = ciw->count;
1335 channel->ccw.flags = CCW_FLAG_SLI;
1336 channel->state = CH_STATE_RCD;
1337 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1338 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1339 QETH_RCD_PARM, LPM_ANYPATH, 0,
1340 QETH_RCD_TIMEOUT);
1341 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1342 if (!ret)
1343 wait_event(card->wait_q,
1344 (channel->state == CH_STATE_RCD_DONE ||
1345 channel->state == CH_STATE_DOWN));
1346 if (channel->state == CH_STATE_DOWN)
1347 ret = -EIO;
1348 else
1349 channel->state = CH_STATE_DOWN;
1350 if (ret) {
1351 kfree(rcd_buf);
1352 *buffer = NULL;
1353 *length = 0;
1354 } else {
1355 *length = ciw->count;
1356 *buffer = rcd_buf;
1357 }
1358 return ret;
1359 }
1360
1361 static int qeth_get_unitaddr(struct qeth_card *card)
1362 {
1363 int length;
1364 char *prcd;
1365 int rc;
1366
1367 QETH_DBF_TEXT(SETUP, 2, "getunit");
1368 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1369 if (rc) {
1370 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1371 CARD_DDEV_ID(card), rc);
1372 return rc;
1373 }
1374 card->info.chpid = prcd[30];
1375 card->info.unit_addr2 = prcd[31];
1376 card->info.cula = prcd[63];
1377 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1378 (prcd[0x11] == _ascebc['M']));
1379 kfree(prcd);
1380 return 0;
1381 }
1382
1383 static void qeth_init_tokens(struct qeth_card *card)
1384 {
1385 card->token.issuer_rm_w = 0x00010103UL;
1386 card->token.cm_filter_w = 0x00010108UL;
1387 card->token.cm_connection_w = 0x0001010aUL;
1388 card->token.ulp_filter_w = 0x0001010bUL;
1389 card->token.ulp_connection_w = 0x0001010dUL;
1390 }
1391
1392 static void qeth_init_func_level(struct qeth_card *card)
1393 {
1394 if (card->ipato.enabled) {
1395 if (card->info.type == QETH_CARD_TYPE_IQD)
1396 card->info.func_level =
1397 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1398 else
1399 card->info.func_level =
1400 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1401 } else {
1402 if (card->info.type == QETH_CARD_TYPE_IQD)
1403 /*FIXME:why do we have same values for dis and ena for
1404 osae??? */
1405 card->info.func_level =
1406 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1407 else
1408 card->info.func_level =
1409 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1410 }
1411 }
1412
1413 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1414 void (*idx_reply_cb)(struct qeth_channel *,
1415 struct qeth_cmd_buffer *))
1416 {
1417 struct qeth_cmd_buffer *iob;
1418 unsigned long flags;
1419 int rc;
1420 struct qeth_card *card;
1421
1422 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1423 card = CARD_FROM_CDEV(channel->ccwdev);
1424 iob = qeth_get_buffer(channel);
1425 iob->callback = idx_reply_cb;
1426 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1427 channel->ccw.count = QETH_BUFSIZE;
1428 channel->ccw.cda = (__u32) __pa(iob->data);
1429
1430 wait_event(card->wait_q,
1431 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1432 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1433 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1434 rc = ccw_device_start(channel->ccwdev,
1435 &channel->ccw, (addr_t) iob, 0, 0);
1436 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1437
1438 if (rc) {
1439 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1440 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1441 atomic_set(&channel->irq_pending, 0);
1442 wake_up(&card->wait_q);
1443 return rc;
1444 }
1445 rc = wait_event_interruptible_timeout(card->wait_q,
1446 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1447 if (rc == -ERESTARTSYS)
1448 return rc;
1449 if (channel->state != CH_STATE_UP) {
1450 rc = -ETIME;
1451 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1452 qeth_clear_cmd_buffers(channel);
1453 } else
1454 rc = 0;
1455 return rc;
1456 }
1457
1458 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1459 void (*idx_reply_cb)(struct qeth_channel *,
1460 struct qeth_cmd_buffer *))
1461 {
1462 struct qeth_card *card;
1463 struct qeth_cmd_buffer *iob;
1464 unsigned long flags;
1465 __u16 temp;
1466 __u8 tmp;
1467 int rc;
1468 struct ccw_dev_id temp_devid;
1469
1470 card = CARD_FROM_CDEV(channel->ccwdev);
1471
1472 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1473
1474 iob = qeth_get_buffer(channel);
1475 iob->callback = idx_reply_cb;
1476 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1477 channel->ccw.count = IDX_ACTIVATE_SIZE;
1478 channel->ccw.cda = (__u32) __pa(iob->data);
1479 if (channel == &card->write) {
1480 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1481 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1482 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1483 card->seqno.trans_hdr++;
1484 } else {
1485 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1486 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1487 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1488 }
1489 tmp = ((__u8)card->info.portno) | 0x80;
1490 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1491 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1492 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1493 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1494 &card->info.func_level, sizeof(__u16));
1495 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1496 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1497 temp = (card->info.cula << 8) + card->info.unit_addr2;
1498 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1499
1500 wait_event(card->wait_q,
1501 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1502 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1503 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1504 rc = ccw_device_start(channel->ccwdev,
1505 &channel->ccw, (addr_t) iob, 0, 0);
1506 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1507
1508 if (rc) {
1509 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1510 rc);
1511 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1512 atomic_set(&channel->irq_pending, 0);
1513 wake_up(&card->wait_q);
1514 return rc;
1515 }
1516 rc = wait_event_interruptible_timeout(card->wait_q,
1517 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1518 if (rc == -ERESTARTSYS)
1519 return rc;
1520 if (channel->state != CH_STATE_ACTIVATING) {
1521 PRINT_WARN("IDX activate timed out!\n");
1522 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1523 qeth_clear_cmd_buffers(channel);
1524 return -ETIME;
1525 }
1526 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1527 }
1528
1529 static int qeth_peer_func_level(int level)
1530 {
1531 if ((level & 0xff) == 8)
1532 return (level & 0xff) + 0x400;
1533 if (((level >> 8) & 3) == 1)
1534 return (level & 0xff) + 0x200;
1535 return level;
1536 }
1537
1538 static void qeth_idx_write_cb(struct qeth_channel *channel,
1539 struct qeth_cmd_buffer *iob)
1540 {
1541 struct qeth_card *card;
1542 __u16 temp;
1543
1544 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1545
1546 if (channel->state == CH_STATE_DOWN) {
1547 channel->state = CH_STATE_ACTIVATING;
1548 goto out;
1549 }
1550 card = CARD_FROM_CDEV(channel->ccwdev);
1551
1552 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1553 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1554 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1555 "adapter exclusively used by another host\n",
1556 CARD_WDEV_ID(card));
1557 else
1558 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1559 "negative reply\n", CARD_WDEV_ID(card));
1560 goto out;
1561 }
1562 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1563 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1564 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1565 "function level mismatch "
1566 "(sent: 0x%x, received: 0x%x)\n",
1567 CARD_WDEV_ID(card), card->info.func_level, temp);
1568 goto out;
1569 }
1570 channel->state = CH_STATE_UP;
1571 out:
1572 qeth_release_buffer(channel, iob);
1573 }
1574
1575 static void qeth_idx_read_cb(struct qeth_channel *channel,
1576 struct qeth_cmd_buffer *iob)
1577 {
1578 struct qeth_card *card;
1579 __u16 temp;
1580
1581 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1582 if (channel->state == CH_STATE_DOWN) {
1583 channel->state = CH_STATE_ACTIVATING;
1584 goto out;
1585 }
1586
1587 card = CARD_FROM_CDEV(channel->ccwdev);
1588 if (qeth_check_idx_response(iob->data))
1589 goto out;
1590
1591 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1592 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1593 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1594 "adapter exclusively used by another host\n",
1595 CARD_RDEV_ID(card));
1596 else
1597 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1598 "negative reply\n", CARD_RDEV_ID(card));
1599 goto out;
1600 }
1601
1602 /**
1603 * temporary fix for microcode bug
1604 * to revert it,replace OR by AND
1605 */
1606 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1607 (card->info.type == QETH_CARD_TYPE_OSAE))
1608 card->info.portname_required = 1;
1609
1610 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1611 if (temp != qeth_peer_func_level(card->info.func_level)) {
1612 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1613 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1614 CARD_RDEV_ID(card), card->info.func_level, temp);
1615 goto out;
1616 }
1617 memcpy(&card->token.issuer_rm_r,
1618 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1619 QETH_MPC_TOKEN_LENGTH);
1620 memcpy(&card->info.mcl_level[0],
1621 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1622 channel->state = CH_STATE_UP;
1623 out:
1624 qeth_release_buffer(channel, iob);
1625 }
1626
1627 void qeth_prepare_control_data(struct qeth_card *card, int len,
1628 struct qeth_cmd_buffer *iob)
1629 {
1630 qeth_setup_ccw(&card->write, iob->data, len);
1631 iob->callback = qeth_release_buffer;
1632
1633 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1634 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1635 card->seqno.trans_hdr++;
1636 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1637 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1638 card->seqno.pdu_hdr++;
1639 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1640 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1641 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1642 }
1643 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1644
1645 int qeth_send_control_data(struct qeth_card *card, int len,
1646 struct qeth_cmd_buffer *iob,
1647 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1648 unsigned long),
1649 void *reply_param)
1650 {
1651 int rc;
1652 unsigned long flags;
1653 struct qeth_reply *reply = NULL;
1654 unsigned long timeout;
1655
1656 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1657
1658 reply = qeth_alloc_reply(card);
1659 if (!reply) {
1660 return -ENOMEM;
1661 }
1662 reply->callback = reply_cb;
1663 reply->param = reply_param;
1664 if (card->state == CARD_STATE_DOWN)
1665 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1666 else
1667 reply->seqno = card->seqno.ipa++;
1668 init_waitqueue_head(&reply->wait_q);
1669 spin_lock_irqsave(&card->lock, flags);
1670 list_add_tail(&reply->list, &card->cmd_waiter_list);
1671 spin_unlock_irqrestore(&card->lock, flags);
1672 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1673
1674 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1675 qeth_prepare_control_data(card, len, iob);
1676
1677 if (IS_IPA(iob->data))
1678 timeout = jiffies + QETH_IPA_TIMEOUT;
1679 else
1680 timeout = jiffies + QETH_TIMEOUT;
1681
1682 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1683 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1684 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1685 (addr_t) iob, 0, 0);
1686 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1687 if (rc) {
1688 PRINT_WARN("qeth_send_control_data: "
1689 "ccw_device_start rc = %i\n", rc);
1690 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1691 spin_lock_irqsave(&card->lock, flags);
1692 list_del_init(&reply->list);
1693 qeth_put_reply(reply);
1694 spin_unlock_irqrestore(&card->lock, flags);
1695 qeth_release_buffer(iob->channel, iob);
1696 atomic_set(&card->write.irq_pending, 0);
1697 wake_up(&card->wait_q);
1698 return rc;
1699 }
1700 while (!atomic_read(&reply->received)) {
1701 if (time_after(jiffies, timeout)) {
1702 spin_lock_irqsave(&reply->card->lock, flags);
1703 list_del_init(&reply->list);
1704 spin_unlock_irqrestore(&reply->card->lock, flags);
1705 reply->rc = -ETIME;
1706 atomic_inc(&reply->received);
1707 wake_up(&reply->wait_q);
1708 }
1709 cpu_relax();
1710 };
1711 rc = reply->rc;
1712 qeth_put_reply(reply);
1713 return rc;
1714 }
1715 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1716
1717 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1718 unsigned long data)
1719 {
1720 struct qeth_cmd_buffer *iob;
1721
1722 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1723
1724 iob = (struct qeth_cmd_buffer *) data;
1725 memcpy(&card->token.cm_filter_r,
1726 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1727 QETH_MPC_TOKEN_LENGTH);
1728 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1729 return 0;
1730 }
1731
1732 static int qeth_cm_enable(struct qeth_card *card)
1733 {
1734 int rc;
1735 struct qeth_cmd_buffer *iob;
1736
1737 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1738
1739 iob = qeth_wait_for_buffer(&card->write);
1740 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1741 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1742 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1743 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1744 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1745
1746 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1747 qeth_cm_enable_cb, NULL);
1748 return rc;
1749 }
1750
1751 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1752 unsigned long data)
1753 {
1754
1755 struct qeth_cmd_buffer *iob;
1756
1757 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1758
1759 iob = (struct qeth_cmd_buffer *) data;
1760 memcpy(&card->token.cm_connection_r,
1761 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1762 QETH_MPC_TOKEN_LENGTH);
1763 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1764 return 0;
1765 }
1766
1767 static int qeth_cm_setup(struct qeth_card *card)
1768 {
1769 int rc;
1770 struct qeth_cmd_buffer *iob;
1771
1772 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1773
1774 iob = qeth_wait_for_buffer(&card->write);
1775 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1776 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1777 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1778 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1779 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1780 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1781 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1782 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1783 qeth_cm_setup_cb, NULL);
1784 return rc;
1785
1786 }
1787
1788 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1789 {
1790 switch (card->info.type) {
1791 case QETH_CARD_TYPE_UNKNOWN:
1792 return 1500;
1793 case QETH_CARD_TYPE_IQD:
1794 return card->info.max_mtu;
1795 case QETH_CARD_TYPE_OSAE:
1796 switch (card->info.link_type) {
1797 case QETH_LINK_TYPE_HSTR:
1798 case QETH_LINK_TYPE_LANE_TR:
1799 return 2000;
1800 default:
1801 return 1492;
1802 }
1803 default:
1804 return 1500;
1805 }
1806 }
1807
1808 static inline int qeth_get_max_mtu_for_card(int cardtype)
1809 {
1810 switch (cardtype) {
1811
1812 case QETH_CARD_TYPE_UNKNOWN:
1813 case QETH_CARD_TYPE_OSAE:
1814 case QETH_CARD_TYPE_OSN:
1815 return 61440;
1816 case QETH_CARD_TYPE_IQD:
1817 return 57344;
1818 default:
1819 return 1500;
1820 }
1821 }
1822
1823 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1824 {
1825 switch (cardtype) {
1826 case QETH_CARD_TYPE_IQD:
1827 return 1;
1828 default:
1829 return 0;
1830 }
1831 }
1832
1833 static inline int qeth_get_mtu_outof_framesize(int framesize)
1834 {
1835 switch (framesize) {
1836 case 0x4000:
1837 return 8192;
1838 case 0x6000:
1839 return 16384;
1840 case 0xa000:
1841 return 32768;
1842 case 0xffff:
1843 return 57344;
1844 default:
1845 return 0;
1846 }
1847 }
1848
1849 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1850 {
1851 switch (card->info.type) {
1852 case QETH_CARD_TYPE_OSAE:
1853 return ((mtu >= 576) && (mtu <= 61440));
1854 case QETH_CARD_TYPE_IQD:
1855 return ((mtu >= 576) &&
1856 (mtu <= card->info.max_mtu + 4096 - 32));
1857 case QETH_CARD_TYPE_OSN:
1858 case QETH_CARD_TYPE_UNKNOWN:
1859 default:
1860 return 1;
1861 }
1862 }
1863
1864 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1865 unsigned long data)
1866 {
1867
1868 __u16 mtu, framesize;
1869 __u16 len;
1870 __u8 link_type;
1871 struct qeth_cmd_buffer *iob;
1872
1873 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1874
1875 iob = (struct qeth_cmd_buffer *) data;
1876 memcpy(&card->token.ulp_filter_r,
1877 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1878 QETH_MPC_TOKEN_LENGTH);
1879 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1880 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1881 mtu = qeth_get_mtu_outof_framesize(framesize);
1882 if (!mtu) {
1883 iob->rc = -EINVAL;
1884 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1885 return 0;
1886 }
1887 card->info.max_mtu = mtu;
1888 card->info.initial_mtu = mtu;
1889 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1890 } else {
1891 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1892 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1893 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1894 }
1895
1896 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1897 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1898 memcpy(&link_type,
1899 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1900 card->info.link_type = link_type;
1901 } else
1902 card->info.link_type = 0;
1903 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1904 return 0;
1905 }
1906
1907 static int qeth_ulp_enable(struct qeth_card *card)
1908 {
1909 int rc;
1910 char prot_type;
1911 struct qeth_cmd_buffer *iob;
1912
1913 /*FIXME: trace view callbacks*/
1914 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1915
1916 iob = qeth_wait_for_buffer(&card->write);
1917 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1918
1919 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1920 (__u8) card->info.portno;
1921 if (card->options.layer2)
1922 if (card->info.type == QETH_CARD_TYPE_OSN)
1923 prot_type = QETH_PROT_OSN2;
1924 else
1925 prot_type = QETH_PROT_LAYER2;
1926 else
1927 prot_type = QETH_PROT_TCPIP;
1928
1929 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1930 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1931 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1932 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1933 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1934 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1935 card->info.portname, 9);
1936 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1937 qeth_ulp_enable_cb, NULL);
1938 return rc;
1939
1940 }
1941
1942 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1943 unsigned long data)
1944 {
1945 struct qeth_cmd_buffer *iob;
1946
1947 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1948
1949 iob = (struct qeth_cmd_buffer *) data;
1950 memcpy(&card->token.ulp_connection_r,
1951 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1952 QETH_MPC_TOKEN_LENGTH);
1953 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1954 return 0;
1955 }
1956
1957 static int qeth_ulp_setup(struct qeth_card *card)
1958 {
1959 int rc;
1960 __u16 temp;
1961 struct qeth_cmd_buffer *iob;
1962 struct ccw_dev_id dev_id;
1963
1964 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1965
1966 iob = qeth_wait_for_buffer(&card->write);
1967 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1968
1969 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1970 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1971 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1972 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1973 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1974 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1975
1976 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1977 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1978 temp = (card->info.cula << 8) + card->info.unit_addr2;
1979 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1980 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1981 qeth_ulp_setup_cb, NULL);
1982 return rc;
1983 }
1984
1985 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1986 {
1987 int i, j;
1988
1989 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
1990
1991 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
1992 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
1993 return 0;
1994
1995 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
1996 GFP_KERNEL);
1997 if (!card->qdio.in_q)
1998 goto out_nomem;
1999 QETH_DBF_TEXT(SETUP, 2, "inq");
2000 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2001 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2002 /* give inbound qeth_qdio_buffers their qdio_buffers */
2003 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2004 card->qdio.in_q->bufs[i].buffer =
2005 &card->qdio.in_q->qdio_bufs[i];
2006 /* inbound buffer pool */
2007 if (qeth_alloc_buffer_pool(card))
2008 goto out_freeinq;
2009 /* outbound */
2010 card->qdio.out_qs =
2011 kmalloc(card->qdio.no_out_queues *
2012 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2013 if (!card->qdio.out_qs)
2014 goto out_freepool;
2015 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2016 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2017 GFP_KERNEL);
2018 if (!card->qdio.out_qs[i])
2019 goto out_freeoutq;
2020 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2021 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2022 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2023 card->qdio.out_qs[i]->queue_no = i;
2024 /* give outbound qeth_qdio_buffers their qdio_buffers */
2025 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2026 card->qdio.out_qs[i]->bufs[j].buffer =
2027 &card->qdio.out_qs[i]->qdio_bufs[j];
2028 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2029 skb_list);
2030 lockdep_set_class(
2031 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2032 &qdio_out_skb_queue_key);
2033 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2034 }
2035 }
2036 return 0;
2037
2038 out_freeoutq:
2039 while (i > 0)
2040 kfree(card->qdio.out_qs[--i]);
2041 kfree(card->qdio.out_qs);
2042 card->qdio.out_qs = NULL;
2043 out_freepool:
2044 qeth_free_buffer_pool(card);
2045 out_freeinq:
2046 kfree(card->qdio.in_q);
2047 card->qdio.in_q = NULL;
2048 out_nomem:
2049 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2050 return -ENOMEM;
2051 }
2052
2053 static void qeth_create_qib_param_field(struct qeth_card *card,
2054 char *param_field)
2055 {
2056
2057 param_field[0] = _ascebc['P'];
2058 param_field[1] = _ascebc['C'];
2059 param_field[2] = _ascebc['I'];
2060 param_field[3] = _ascebc['T'];
2061 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2062 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2063 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2064 }
2065
2066 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2067 char *param_field)
2068 {
2069 param_field[16] = _ascebc['B'];
2070 param_field[17] = _ascebc['L'];
2071 param_field[18] = _ascebc['K'];
2072 param_field[19] = _ascebc['T'];
2073 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2074 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2075 *((unsigned int *) (&param_field[28])) =
2076 card->info.blkt.inter_packet_jumbo;
2077 }
2078
2079 static int qeth_qdio_activate(struct qeth_card *card)
2080 {
2081 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2082 return qdio_activate(CARD_DDEV(card));
2083 }
2084
2085 static int qeth_dm_act(struct qeth_card *card)
2086 {
2087 int rc;
2088 struct qeth_cmd_buffer *iob;
2089
2090 QETH_DBF_TEXT(SETUP, 2, "dmact");
2091
2092 iob = qeth_wait_for_buffer(&card->write);
2093 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2094
2095 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2096 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2097 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2098 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2099 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2100 return rc;
2101 }
2102
2103 static int qeth_mpc_initialize(struct qeth_card *card)
2104 {
2105 int rc;
2106
2107 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2108
2109 rc = qeth_issue_next_read(card);
2110 if (rc) {
2111 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2112 return rc;
2113 }
2114 rc = qeth_cm_enable(card);
2115 if (rc) {
2116 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2117 goto out_qdio;
2118 }
2119 rc = qeth_cm_setup(card);
2120 if (rc) {
2121 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2122 goto out_qdio;
2123 }
2124 rc = qeth_ulp_enable(card);
2125 if (rc) {
2126 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2127 goto out_qdio;
2128 }
2129 rc = qeth_ulp_setup(card);
2130 if (rc) {
2131 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2132 goto out_qdio;
2133 }
2134 rc = qeth_alloc_qdio_buffers(card);
2135 if (rc) {
2136 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2137 goto out_qdio;
2138 }
2139 rc = qeth_qdio_establish(card);
2140 if (rc) {
2141 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2142 qeth_free_qdio_buffers(card);
2143 goto out_qdio;
2144 }
2145 rc = qeth_qdio_activate(card);
2146 if (rc) {
2147 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2148 goto out_qdio;
2149 }
2150 rc = qeth_dm_act(card);
2151 if (rc) {
2152 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2153 goto out_qdio;
2154 }
2155
2156 return 0;
2157 out_qdio:
2158 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2159 return rc;
2160 }
2161
2162 static void qeth_print_status_with_portname(struct qeth_card *card)
2163 {
2164 char dbf_text[15];
2165 int i;
2166
2167 sprintf(dbf_text, "%s", card->info.portname + 1);
2168 for (i = 0; i < 8; i++)
2169 dbf_text[i] =
2170 (char) _ebcasc[(__u8) dbf_text[i]];
2171 dbf_text[8] = 0;
2172 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2173 "with link type %s (portname: %s)\n",
2174 CARD_RDEV_ID(card),
2175 CARD_WDEV_ID(card),
2176 CARD_DDEV_ID(card),
2177 qeth_get_cardname(card),
2178 (card->info.mcl_level[0]) ? " (level: " : "",
2179 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2180 (card->info.mcl_level[0]) ? ")" : "",
2181 qeth_get_cardname_short(card),
2182 dbf_text);
2183
2184 }
2185
2186 static void qeth_print_status_no_portname(struct qeth_card *card)
2187 {
2188 if (card->info.portname[0])
2189 PRINT_INFO("Device %s/%s/%s is a%s "
2190 "card%s%s%s\nwith link type %s "
2191 "(no portname needed by interface).\n",
2192 CARD_RDEV_ID(card),
2193 CARD_WDEV_ID(card),
2194 CARD_DDEV_ID(card),
2195 qeth_get_cardname(card),
2196 (card->info.mcl_level[0]) ? " (level: " : "",
2197 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2198 (card->info.mcl_level[0]) ? ")" : "",
2199 qeth_get_cardname_short(card));
2200 else
2201 PRINT_INFO("Device %s/%s/%s is a%s "
2202 "card%s%s%s\nwith link type %s.\n",
2203 CARD_RDEV_ID(card),
2204 CARD_WDEV_ID(card),
2205 CARD_DDEV_ID(card),
2206 qeth_get_cardname(card),
2207 (card->info.mcl_level[0]) ? " (level: " : "",
2208 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2209 (card->info.mcl_level[0]) ? ")" : "",
2210 qeth_get_cardname_short(card));
2211 }
2212
2213 void qeth_print_status_message(struct qeth_card *card)
2214 {
2215 switch (card->info.type) {
2216 case QETH_CARD_TYPE_OSAE:
2217 /* VM will use a non-zero first character
2218 * to indicate a HiperSockets like reporting
2219 * of the level OSA sets the first character to zero
2220 * */
2221 if (!card->info.mcl_level[0]) {
2222 sprintf(card->info.mcl_level, "%02x%02x",
2223 card->info.mcl_level[2],
2224 card->info.mcl_level[3]);
2225
2226 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2227 break;
2228 }
2229 /* fallthrough */
2230 case QETH_CARD_TYPE_IQD:
2231 if (card->info.guestlan) {
2232 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2233 card->info.mcl_level[0]];
2234 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2235 card->info.mcl_level[1]];
2236 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2237 card->info.mcl_level[2]];
2238 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2239 card->info.mcl_level[3]];
2240 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2241 }
2242 break;
2243 default:
2244 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2245 }
2246 if (card->info.portname_required)
2247 qeth_print_status_with_portname(card);
2248 else
2249 qeth_print_status_no_portname(card);
2250 }
2251 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2252
2253 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2254 {
2255 struct qeth_buffer_pool_entry *entry;
2256
2257 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2258
2259 list_for_each_entry(entry,
2260 &card->qdio.init_pool.entry_list, init_list) {
2261 qeth_put_buffer_pool_entry(card, entry);
2262 }
2263 }
2264
2265 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2266 struct qeth_card *card)
2267 {
2268 struct list_head *plh;
2269 struct qeth_buffer_pool_entry *entry;
2270 int i, free;
2271 struct page *page;
2272
2273 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2274 return NULL;
2275
2276 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2277 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2278 free = 1;
2279 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2280 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2281 free = 0;
2282 break;
2283 }
2284 }
2285 if (free) {
2286 list_del_init(&entry->list);
2287 return entry;
2288 }
2289 }
2290
2291 /* no free buffer in pool so take first one and swap pages */
2292 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2293 struct qeth_buffer_pool_entry, list);
2294 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2295 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2296 page = alloc_page(GFP_ATOMIC);
2297 if (!page) {
2298 return NULL;
2299 } else {
2300 free_page((unsigned long)entry->elements[i]);
2301 entry->elements[i] = page_address(page);
2302 if (card->options.performance_stats)
2303 card->perf_stats.sg_alloc_page_rx++;
2304 }
2305 }
2306 }
2307 list_del_init(&entry->list);
2308 return entry;
2309 }
2310
2311 static int qeth_init_input_buffer(struct qeth_card *card,
2312 struct qeth_qdio_buffer *buf)
2313 {
2314 struct qeth_buffer_pool_entry *pool_entry;
2315 int i;
2316
2317 pool_entry = qeth_find_free_buffer_pool_entry(card);
2318 if (!pool_entry)
2319 return 1;
2320
2321 /*
2322 * since the buffer is accessed only from the input_tasklet
2323 * there shouldn't be a need to synchronize; also, since we use
2324 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2325 * buffers
2326 */
2327 BUG_ON(!pool_entry);
2328
2329 buf->pool_entry = pool_entry;
2330 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2331 buf->buffer->element[i].length = PAGE_SIZE;
2332 buf->buffer->element[i].addr = pool_entry->elements[i];
2333 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2334 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2335 else
2336 buf->buffer->element[i].flags = 0;
2337 }
2338 return 0;
2339 }
2340
2341 int qeth_init_qdio_queues(struct qeth_card *card)
2342 {
2343 int i, j;
2344 int rc;
2345
2346 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2347
2348 /* inbound queue */
2349 memset(card->qdio.in_q->qdio_bufs, 0,
2350 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2351 qeth_initialize_working_pool_list(card);
2352 /*give only as many buffers to hardware as we have buffer pool entries*/
2353 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2354 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2355 card->qdio.in_q->next_buf_to_init =
2356 card->qdio.in_buf_pool.buf_count - 1;
2357 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2358 card->qdio.in_buf_pool.buf_count - 1);
2359 if (rc) {
2360 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2361 return rc;
2362 }
2363 /* outbound queue */
2364 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2365 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2366 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2367 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2368 qeth_clear_output_buffer(card->qdio.out_qs[i],
2369 &card->qdio.out_qs[i]->bufs[j]);
2370 }
2371 card->qdio.out_qs[i]->card = card;
2372 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2373 card->qdio.out_qs[i]->do_pack = 0;
2374 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2375 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2376 atomic_set(&card->qdio.out_qs[i]->state,
2377 QETH_OUT_Q_UNLOCKED);
2378 }
2379 return 0;
2380 }
2381 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2382
2383 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2384 {
2385 switch (link_type) {
2386 case QETH_LINK_TYPE_HSTR:
2387 return 2;
2388 default:
2389 return 1;
2390 }
2391 }
2392
2393 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2394 struct qeth_ipa_cmd *cmd, __u8 command,
2395 enum qeth_prot_versions prot)
2396 {
2397 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2398 cmd->hdr.command = command;
2399 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2400 cmd->hdr.seqno = card->seqno.ipa;
2401 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2402 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2403 if (card->options.layer2)
2404 cmd->hdr.prim_version_no = 2;
2405 else
2406 cmd->hdr.prim_version_no = 1;
2407 cmd->hdr.param_count = 1;
2408 cmd->hdr.prot_version = prot;
2409 cmd->hdr.ipa_supported = 0;
2410 cmd->hdr.ipa_enabled = 0;
2411 }
2412
2413 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2414 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2415 {
2416 struct qeth_cmd_buffer *iob;
2417 struct qeth_ipa_cmd *cmd;
2418
2419 iob = qeth_wait_for_buffer(&card->write);
2420 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2421 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2422
2423 return iob;
2424 }
2425 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2426
2427 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2428 char prot_type)
2429 {
2430 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2431 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2432 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2433 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2434 }
2435 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2436
2437 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2438 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2439 unsigned long),
2440 void *reply_param)
2441 {
2442 int rc;
2443 char prot_type;
2444
2445 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2446
2447 if (card->options.layer2)
2448 if (card->info.type == QETH_CARD_TYPE_OSN)
2449 prot_type = QETH_PROT_OSN2;
2450 else
2451 prot_type = QETH_PROT_LAYER2;
2452 else
2453 prot_type = QETH_PROT_TCPIP;
2454 qeth_prepare_ipa_cmd(card, iob, prot_type);
2455 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2456 iob, reply_cb, reply_param);
2457 return rc;
2458 }
2459 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2460
2461 static int qeth_send_startstoplan(struct qeth_card *card,
2462 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2463 {
2464 int rc;
2465 struct qeth_cmd_buffer *iob;
2466
2467 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2468 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2469
2470 return rc;
2471 }
2472
2473 int qeth_send_startlan(struct qeth_card *card)
2474 {
2475 int rc;
2476
2477 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2478
2479 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2480 return rc;
2481 }
2482 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2483
2484 int qeth_send_stoplan(struct qeth_card *card)
2485 {
2486 int rc = 0;
2487
2488 /*
2489 * TODO: according to the IPA format document page 14,
2490 * TCP/IP (we!) never issue a STOPLAN
2491 * is this right ?!?
2492 */
2493 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2494
2495 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2496 return rc;
2497 }
2498 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2499
2500 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2501 struct qeth_reply *reply, unsigned long data)
2502 {
2503 struct qeth_ipa_cmd *cmd;
2504
2505 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2506
2507 cmd = (struct qeth_ipa_cmd *) data;
2508 if (cmd->hdr.return_code == 0)
2509 cmd->hdr.return_code =
2510 cmd->data.setadapterparms.hdr.return_code;
2511 return 0;
2512 }
2513 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2514
2515 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2516 struct qeth_reply *reply, unsigned long data)
2517 {
2518 struct qeth_ipa_cmd *cmd;
2519
2520 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2521
2522 cmd = (struct qeth_ipa_cmd *) data;
2523 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2524 card->info.link_type =
2525 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2526 card->options.adp.supported_funcs =
2527 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2528 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2529 }
2530
2531 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2532 __u32 command, __u32 cmdlen)
2533 {
2534 struct qeth_cmd_buffer *iob;
2535 struct qeth_ipa_cmd *cmd;
2536
2537 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2538 QETH_PROT_IPV4);
2539 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2540 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2541 cmd->data.setadapterparms.hdr.command_code = command;
2542 cmd->data.setadapterparms.hdr.used_total = 1;
2543 cmd->data.setadapterparms.hdr.seq_no = 1;
2544
2545 return iob;
2546 }
2547 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2548
2549 int qeth_query_setadapterparms(struct qeth_card *card)
2550 {
2551 int rc;
2552 struct qeth_cmd_buffer *iob;
2553
2554 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2555 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2556 sizeof(struct qeth_ipacmd_setadpparms));
2557 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2558 return rc;
2559 }
2560 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2561
2562 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2563 const char *dbftext)
2564 {
2565 if (qdio_error) {
2566 QETH_DBF_TEXT(TRACE, 2, dbftext);
2567 QETH_DBF_TEXT(QERR, 2, dbftext);
2568 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2569 buf->element[15].flags & 0xff);
2570 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2571 buf->element[14].flags & 0xff);
2572 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2573 return 1;
2574 }
2575 return 0;
2576 }
2577 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2578
2579 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2580 {
2581 struct qeth_qdio_q *queue = card->qdio.in_q;
2582 int count;
2583 int i;
2584 int rc;
2585 int newcount = 0;
2586
2587 count = (index < queue->next_buf_to_init)?
2588 card->qdio.in_buf_pool.buf_count -
2589 (queue->next_buf_to_init - index) :
2590 card->qdio.in_buf_pool.buf_count -
2591 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2592 /* only requeue at a certain threshold to avoid SIGAs */
2593 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2594 for (i = queue->next_buf_to_init;
2595 i < queue->next_buf_to_init + count; ++i) {
2596 if (qeth_init_input_buffer(card,
2597 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2598 break;
2599 } else {
2600 newcount++;
2601 }
2602 }
2603
2604 if (newcount < count) {
2605 /* we are in memory shortage so we switch back to
2606 traditional skb allocation and drop packages */
2607 atomic_set(&card->force_alloc_skb, 3);
2608 count = newcount;
2609 } else {
2610 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2611 }
2612
2613 /*
2614 * according to old code it should be avoided to requeue all
2615 * 128 buffers in order to benefit from PCI avoidance.
2616 * this function keeps at least one buffer (the buffer at
2617 * 'index') un-requeued -> this buffer is the first buffer that
2618 * will be requeued the next time
2619 */
2620 if (card->options.performance_stats) {
2621 card->perf_stats.inbound_do_qdio_cnt++;
2622 card->perf_stats.inbound_do_qdio_start_time =
2623 qeth_get_micros();
2624 }
2625 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2626 queue->next_buf_to_init, count);
2627 if (card->options.performance_stats)
2628 card->perf_stats.inbound_do_qdio_time +=
2629 qeth_get_micros() -
2630 card->perf_stats.inbound_do_qdio_start_time;
2631 if (rc) {
2632 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2633 "return %i (device %s).\n",
2634 rc, CARD_DDEV_ID(card));
2635 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2636 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2637 }
2638 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2639 QDIO_MAX_BUFFERS_PER_Q;
2640 }
2641 }
2642 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2643
2644 static int qeth_handle_send_error(struct qeth_card *card,
2645 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2646 {
2647 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2648 int cc = qdio_err & 3;
2649
2650 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2651 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
2652 switch (cc) {
2653 case 0:
2654 if (qdio_err) {
2655 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2656 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2657 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2658 (u16)qdio_err, (u8)sbalf15);
2659 return QETH_SEND_ERROR_LINK_FAILURE;
2660 }
2661 return QETH_SEND_ERROR_NONE;
2662 case 2:
2663 if (qdio_err & QDIO_ERROR_SIGA_BUSY) {
2664 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2665 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2666 return QETH_SEND_ERROR_KICK_IT;
2667 }
2668 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2669 return QETH_SEND_ERROR_RETRY;
2670 return QETH_SEND_ERROR_LINK_FAILURE;
2671 /* look at qdio_error and sbalf 15 */
2672 case 1:
2673 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2674 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2675 return QETH_SEND_ERROR_LINK_FAILURE;
2676 case 3:
2677 default:
2678 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2679 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2680 return QETH_SEND_ERROR_KICK_IT;
2681 }
2682 }
2683
2684 /*
2685 * Switched to packing state if the number of used buffers on a queue
2686 * reaches a certain limit.
2687 */
2688 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2689 {
2690 if (!queue->do_pack) {
2691 if (atomic_read(&queue->used_buffers)
2692 >= QETH_HIGH_WATERMARK_PACK){
2693 /* switch non-PACKING -> PACKING */
2694 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2695 if (queue->card->options.performance_stats)
2696 queue->card->perf_stats.sc_dp_p++;
2697 queue->do_pack = 1;
2698 }
2699 }
2700 }
2701
2702 /*
2703 * Switches from packing to non-packing mode. If there is a packing
2704 * buffer on the queue this buffer will be prepared to be flushed.
2705 * In that case 1 is returned to inform the caller. If no buffer
2706 * has to be flushed, zero is returned.
2707 */
2708 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2709 {
2710 struct qeth_qdio_out_buffer *buffer;
2711 int flush_count = 0;
2712
2713 if (queue->do_pack) {
2714 if (atomic_read(&queue->used_buffers)
2715 <= QETH_LOW_WATERMARK_PACK) {
2716 /* switch PACKING -> non-PACKING */
2717 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2718 if (queue->card->options.performance_stats)
2719 queue->card->perf_stats.sc_p_dp++;
2720 queue->do_pack = 0;
2721 /* flush packing buffers */
2722 buffer = &queue->bufs[queue->next_buf_to_fill];
2723 if ((atomic_read(&buffer->state) ==
2724 QETH_QDIO_BUF_EMPTY) &&
2725 (buffer->next_element_to_fill > 0)) {
2726 atomic_set(&buffer->state,
2727 QETH_QDIO_BUF_PRIMED);
2728 flush_count++;
2729 queue->next_buf_to_fill =
2730 (queue->next_buf_to_fill + 1) %
2731 QDIO_MAX_BUFFERS_PER_Q;
2732 }
2733 }
2734 }
2735 return flush_count;
2736 }
2737
2738 /*
2739 * Called to flush a packing buffer if no more pci flags are on the queue.
2740 * Checks if there is a packing buffer and prepares it to be flushed.
2741 * In that case returns 1, otherwise zero.
2742 */
2743 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2744 {
2745 struct qeth_qdio_out_buffer *buffer;
2746
2747 buffer = &queue->bufs[queue->next_buf_to_fill];
2748 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2749 (buffer->next_element_to_fill > 0)) {
2750 /* it's a packing buffer */
2751 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2752 queue->next_buf_to_fill =
2753 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2754 return 1;
2755 }
2756 return 0;
2757 }
2758
2759 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2760 int count)
2761 {
2762 struct qeth_qdio_out_buffer *buf;
2763 int rc;
2764 int i;
2765 unsigned int qdio_flags;
2766
2767 for (i = index; i < index + count; ++i) {
2768 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2769 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2770 SBAL_FLAGS_LAST_ENTRY;
2771
2772 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2773 continue;
2774
2775 if (!queue->do_pack) {
2776 if ((atomic_read(&queue->used_buffers) >=
2777 (QETH_HIGH_WATERMARK_PACK -
2778 QETH_WATERMARK_PACK_FUZZ)) &&
2779 !atomic_read(&queue->set_pci_flags_count)) {
2780 /* it's likely that we'll go to packing
2781 * mode soon */
2782 atomic_inc(&queue->set_pci_flags_count);
2783 buf->buffer->element[0].flags |= 0x40;
2784 }
2785 } else {
2786 if (!atomic_read(&queue->set_pci_flags_count)) {
2787 /*
2788 * there's no outstanding PCI any more, so we
2789 * have to request a PCI to be sure the the PCI
2790 * will wake at some time in the future then we
2791 * can flush packed buffers that might still be
2792 * hanging around, which can happen if no
2793 * further send was requested by the stack
2794 */
2795 atomic_inc(&queue->set_pci_flags_count);
2796 buf->buffer->element[0].flags |= 0x40;
2797 }
2798 }
2799 }
2800
2801 queue->card->dev->trans_start = jiffies;
2802 if (queue->card->options.performance_stats) {
2803 queue->card->perf_stats.outbound_do_qdio_cnt++;
2804 queue->card->perf_stats.outbound_do_qdio_start_time =
2805 qeth_get_micros();
2806 }
2807 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2808 if (atomic_read(&queue->set_pci_flags_count))
2809 qdio_flags |= QDIO_FLAG_PCI_OUT;
2810 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2811 queue->queue_no, index, count);
2812 if (queue->card->options.performance_stats)
2813 queue->card->perf_stats.outbound_do_qdio_time +=
2814 qeth_get_micros() -
2815 queue->card->perf_stats.outbound_do_qdio_start_time;
2816 if (rc) {
2817 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2818 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2819 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2820 queue->card->stats.tx_errors += count;
2821 /* this must not happen under normal circumstances. if it
2822 * happens something is really wrong -> recover */
2823 qeth_schedule_recovery(queue->card);
2824 return;
2825 }
2826 atomic_add(count, &queue->used_buffers);
2827 if (queue->card->options.performance_stats)
2828 queue->card->perf_stats.bufs_sent += count;
2829 }
2830
2831 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2832 {
2833 int index;
2834 int flush_cnt = 0;
2835 int q_was_packing = 0;
2836
2837 /*
2838 * check if weed have to switch to non-packing mode or if
2839 * we have to get a pci flag out on the queue
2840 */
2841 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2842 !atomic_read(&queue->set_pci_flags_count)) {
2843 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2844 QETH_OUT_Q_UNLOCKED) {
2845 /*
2846 * If we get in here, there was no action in
2847 * do_send_packet. So, we check if there is a
2848 * packing buffer to be flushed here.
2849 */
2850 netif_stop_queue(queue->card->dev);
2851 index = queue->next_buf_to_fill;
2852 q_was_packing = queue->do_pack;
2853 /* queue->do_pack may change */
2854 barrier();
2855 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2856 if (!flush_cnt &&
2857 !atomic_read(&queue->set_pci_flags_count))
2858 flush_cnt +=
2859 qeth_flush_buffers_on_no_pci(queue);
2860 if (queue->card->options.performance_stats &&
2861 q_was_packing)
2862 queue->card->perf_stats.bufs_sent_pack +=
2863 flush_cnt;
2864 if (flush_cnt)
2865 qeth_flush_buffers(queue, index, flush_cnt);
2866 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2867 }
2868 }
2869 }
2870
2871 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2872 unsigned int qdio_error, int __queue, int first_element,
2873 int count, unsigned long card_ptr)
2874 {
2875 struct qeth_card *card = (struct qeth_card *) card_ptr;
2876 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2877 struct qeth_qdio_out_buffer *buffer;
2878 int i;
2879
2880 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2881 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2882 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2883 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2884 netif_stop_queue(card->dev);
2885 qeth_schedule_recovery(card);
2886 return;
2887 }
2888 if (card->options.performance_stats) {
2889 card->perf_stats.outbound_handler_cnt++;
2890 card->perf_stats.outbound_handler_start_time =
2891 qeth_get_micros();
2892 }
2893 for (i = first_element; i < (first_element + count); ++i) {
2894 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2895 /*we only handle the KICK_IT error by doing a recovery */
2896 if (qeth_handle_send_error(card, buffer, qdio_error)
2897 == QETH_SEND_ERROR_KICK_IT){
2898 netif_stop_queue(card->dev);
2899 qeth_schedule_recovery(card);
2900 return;
2901 }
2902 qeth_clear_output_buffer(queue, buffer);
2903 }
2904 atomic_sub(count, &queue->used_buffers);
2905 /* check if we need to do something on this outbound queue */
2906 if (card->info.type != QETH_CARD_TYPE_IQD)
2907 qeth_check_outbound_queue(queue);
2908
2909 netif_wake_queue(queue->card->dev);
2910 if (card->options.performance_stats)
2911 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2912 card->perf_stats.outbound_handler_start_time;
2913 }
2914 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2915
2916 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2917 {
2918 int cast_type = RTN_UNSPEC;
2919
2920 if (card->info.type == QETH_CARD_TYPE_OSN)
2921 return cast_type;
2922
2923 if (skb->dst && skb->dst->neighbour) {
2924 cast_type = skb->dst->neighbour->type;
2925 if ((cast_type == RTN_BROADCAST) ||
2926 (cast_type == RTN_MULTICAST) ||
2927 (cast_type == RTN_ANYCAST))
2928 return cast_type;
2929 else
2930 return RTN_UNSPEC;
2931 }
2932 /* try something else */
2933 if (skb->protocol == ETH_P_IPV6)
2934 return (skb_network_header(skb)[24] == 0xff) ?
2935 RTN_MULTICAST : 0;
2936 else if (skb->protocol == ETH_P_IP)
2937 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2938 RTN_MULTICAST : 0;
2939 /* ... */
2940 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2941 return RTN_BROADCAST;
2942 else {
2943 u16 hdr_mac;
2944
2945 hdr_mac = *((u16 *)skb->data);
2946 /* tr multicast? */
2947 switch (card->info.link_type) {
2948 case QETH_LINK_TYPE_HSTR:
2949 case QETH_LINK_TYPE_LANE_TR:
2950 if ((hdr_mac == QETH_TR_MAC_NC) ||
2951 (hdr_mac == QETH_TR_MAC_C))
2952 return RTN_MULTICAST;
2953 break;
2954 /* eth or so multicast? */
2955 default:
2956 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2957 (hdr_mac == QETH_ETH_MAC_V6))
2958 return RTN_MULTICAST;
2959 }
2960 }
2961 return cast_type;
2962 }
2963 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2964
2965 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2966 int ipv, int cast_type)
2967 {
2968 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2969 return card->qdio.default_out_queue;
2970 switch (card->qdio.no_out_queues) {
2971 case 4:
2972 if (cast_type && card->info.is_multicast_different)
2973 return card->info.is_multicast_different &
2974 (card->qdio.no_out_queues - 1);
2975 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2976 const u8 tos = ip_hdr(skb)->tos;
2977
2978 if (card->qdio.do_prio_queueing ==
2979 QETH_PRIO_Q_ING_TOS) {
2980 if (tos & IP_TOS_NOTIMPORTANT)
2981 return 3;
2982 if (tos & IP_TOS_HIGHRELIABILITY)
2983 return 2;
2984 if (tos & IP_TOS_HIGHTHROUGHPUT)
2985 return 1;
2986 if (tos & IP_TOS_LOWDELAY)
2987 return 0;
2988 }
2989 if (card->qdio.do_prio_queueing ==
2990 QETH_PRIO_Q_ING_PREC)
2991 return 3 - (tos >> 6);
2992 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2993 /* TODO: IPv6!!! */
2994 }
2995 return card->qdio.default_out_queue;
2996 case 1: /* fallthrough for single-out-queue 1920-device */
2997 default:
2998 return card->qdio.default_out_queue;
2999 }
3000 }
3001 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3002
3003 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3004 struct sk_buff *skb, int elems)
3005 {
3006 int elements_needed = 0;
3007
3008 if (skb_shinfo(skb)->nr_frags > 0)
3009 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3010 if (elements_needed == 0)
3011 elements_needed = 1 + (((((unsigned long) skb->data) %
3012 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
3013 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3014 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3015 "(Number=%d / Length=%d). Discarded.\n",
3016 (elements_needed+elems), skb->len);
3017 return 0;
3018 }
3019 return elements_needed;
3020 }
3021 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3022
3023 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3024 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3025 int offset)
3026 {
3027 int length = skb->len - offset;
3028 int length_here;
3029 int element;
3030 char *data;
3031 int first_lap ;
3032
3033 element = *next_element_to_fill;
3034 data = skb->data;
3035 first_lap = (is_tso == 0 ? 1 : 0);
3036
3037 if (offset >= 0) {
3038 data = skb->data + offset;
3039 first_lap = 0;
3040 }
3041
3042 while (length > 0) {
3043 /* length_here is the remaining amount of data in this page */
3044 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3045 if (length < length_here)
3046 length_here = length;
3047
3048 buffer->element[element].addr = data;
3049 buffer->element[element].length = length_here;
3050 length -= length_here;
3051 if (!length) {
3052 if (first_lap)
3053 buffer->element[element].flags = 0;
3054 else
3055 buffer->element[element].flags =
3056 SBAL_FLAGS_LAST_FRAG;
3057 } else {
3058 if (first_lap)
3059 buffer->element[element].flags =
3060 SBAL_FLAGS_FIRST_FRAG;
3061 else
3062 buffer->element[element].flags =
3063 SBAL_FLAGS_MIDDLE_FRAG;
3064 }
3065 data += length_here;
3066 element++;
3067 first_lap = 0;
3068 }
3069 *next_element_to_fill = element;
3070 }
3071
3072 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3073 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3074 struct qeth_hdr *hdr, int offset, int hd_len)
3075 {
3076 struct qdio_buffer *buffer;
3077 int flush_cnt = 0, hdr_len, large_send = 0;
3078
3079 buffer = buf->buffer;
3080 atomic_inc(&skb->users);
3081 skb_queue_tail(&buf->skb_list, skb);
3082
3083 /*check first on TSO ....*/
3084 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3085 int element = buf->next_element_to_fill;
3086
3087 hdr_len = sizeof(struct qeth_hdr_tso) +
3088 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3089 /*fill first buffer entry only with header information */
3090 buffer->element[element].addr = skb->data;
3091 buffer->element[element].length = hdr_len;
3092 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3093 buf->next_element_to_fill++;
3094 skb->data += hdr_len;
3095 skb->len -= hdr_len;
3096 large_send = 1;
3097 }
3098
3099 if (offset >= 0) {
3100 int element = buf->next_element_to_fill;
3101 buffer->element[element].addr = hdr;
3102 buffer->element[element].length = sizeof(struct qeth_hdr) +
3103 hd_len;
3104 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3105 buf->is_header[element] = 1;
3106 buf->next_element_to_fill++;
3107 }
3108
3109 if (skb_shinfo(skb)->nr_frags == 0)
3110 __qeth_fill_buffer(skb, buffer, large_send,
3111 (int *)&buf->next_element_to_fill, offset);
3112 else
3113 __qeth_fill_buffer_frag(skb, buffer, large_send,
3114 (int *)&buf->next_element_to_fill);
3115
3116 if (!queue->do_pack) {
3117 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3118 /* set state to PRIMED -> will be flushed */
3119 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3120 flush_cnt = 1;
3121 } else {
3122 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3123 if (queue->card->options.performance_stats)
3124 queue->card->perf_stats.skbs_sent_pack++;
3125 if (buf->next_element_to_fill >=
3126 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3127 /*
3128 * packed buffer if full -> set state PRIMED
3129 * -> will be flushed
3130 */
3131 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3132 flush_cnt = 1;
3133 }
3134 }
3135 return flush_cnt;
3136 }
3137
3138 int qeth_do_send_packet_fast(struct qeth_card *card,
3139 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3140 struct qeth_hdr *hdr, int elements_needed,
3141 struct qeth_eddp_context *ctx, int offset, int hd_len)
3142 {
3143 struct qeth_qdio_out_buffer *buffer;
3144 int buffers_needed = 0;
3145 int flush_cnt = 0;
3146 int index;
3147
3148 /* spin until we get the queue ... */
3149 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3150 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3151 /* ... now we've got the queue */
3152 index = queue->next_buf_to_fill;
3153 buffer = &queue->bufs[queue->next_buf_to_fill];
3154 /*
3155 * check if buffer is empty to make sure that we do not 'overtake'
3156 * ourselves and try to fill a buffer that is already primed
3157 */
3158 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3159 goto out;
3160 if (ctx == NULL)
3161 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3162 QDIO_MAX_BUFFERS_PER_Q;
3163 else {
3164 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3165 ctx);
3166 if (buffers_needed < 0)
3167 goto out;
3168 queue->next_buf_to_fill =
3169 (queue->next_buf_to_fill + buffers_needed) %
3170 QDIO_MAX_BUFFERS_PER_Q;
3171 }
3172 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3173 if (ctx == NULL) {
3174 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3175 qeth_flush_buffers(queue, index, 1);
3176 } else {
3177 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3178 WARN_ON(buffers_needed != flush_cnt);
3179 qeth_flush_buffers(queue, index, flush_cnt);
3180 }
3181 return 0;
3182 out:
3183 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3184 return -EBUSY;
3185 }
3186 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3187
3188 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3189 struct sk_buff *skb, struct qeth_hdr *hdr,
3190 int elements_needed, struct qeth_eddp_context *ctx)
3191 {
3192 struct qeth_qdio_out_buffer *buffer;
3193 int start_index;
3194 int flush_count = 0;
3195 int do_pack = 0;
3196 int tmp;
3197 int rc = 0;
3198
3199 /* spin until we get the queue ... */
3200 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3201 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3202 start_index = queue->next_buf_to_fill;
3203 buffer = &queue->bufs[queue->next_buf_to_fill];
3204 /*
3205 * check if buffer is empty to make sure that we do not 'overtake'
3206 * ourselves and try to fill a buffer that is already primed
3207 */
3208 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3209 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3210 return -EBUSY;
3211 }
3212 /* check if we need to switch packing state of this queue */
3213 qeth_switch_to_packing_if_needed(queue);
3214 if (queue->do_pack) {
3215 do_pack = 1;
3216 if (ctx == NULL) {
3217 /* does packet fit in current buffer? */
3218 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3219 buffer->next_element_to_fill) < elements_needed) {
3220 /* ... no -> set state PRIMED */
3221 atomic_set(&buffer->state,
3222 QETH_QDIO_BUF_PRIMED);
3223 flush_count++;
3224 queue->next_buf_to_fill =
3225 (queue->next_buf_to_fill + 1) %
3226 QDIO_MAX_BUFFERS_PER_Q;
3227 buffer = &queue->bufs[queue->next_buf_to_fill];
3228 /* we did a step forward, so check buffer state
3229 * again */
3230 if (atomic_read(&buffer->state) !=
3231 QETH_QDIO_BUF_EMPTY){
3232 qeth_flush_buffers(queue, start_index,
3233 flush_count);
3234 atomic_set(&queue->state,
3235 QETH_OUT_Q_UNLOCKED);
3236 return -EBUSY;
3237 }
3238 }
3239 } else {
3240 /* check if we have enough elements (including following
3241 * free buffers) to handle eddp context */
3242 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3243 < 0) {
3244 rc = -EBUSY;
3245 goto out;
3246 }
3247 }
3248 }
3249 if (ctx == NULL)
3250 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3251 else {
3252 tmp = qeth_eddp_fill_buffer(queue, ctx,
3253 queue->next_buf_to_fill);
3254 if (tmp < 0) {
3255 rc = -EBUSY;
3256 goto out;
3257 }
3258 }
3259 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3260 QDIO_MAX_BUFFERS_PER_Q;
3261 flush_count += tmp;
3262 out:
3263 if (flush_count)
3264 qeth_flush_buffers(queue, start_index, flush_count);
3265 else if (!atomic_read(&queue->set_pci_flags_count))
3266 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3267 /*
3268 * queue->state will go from LOCKED -> UNLOCKED or from
3269 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3270 * (switch packing state or flush buffer to get another pci flag out).
3271 * In that case we will enter this loop
3272 */
3273 while (atomic_dec_return(&queue->state)) {
3274 flush_count = 0;
3275 start_index = queue->next_buf_to_fill;
3276 /* check if we can go back to non-packing state */
3277 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3278 /*
3279 * check if we need to flush a packing buffer to get a pci
3280 * flag out on the queue
3281 */
3282 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3283 flush_count += qeth_flush_buffers_on_no_pci(queue);
3284 if (flush_count)
3285 qeth_flush_buffers(queue, start_index, flush_count);
3286 }
3287 /* at this point the queue is UNLOCKED again */
3288 if (queue->card->options.performance_stats && do_pack)
3289 queue->card->perf_stats.bufs_sent_pack += flush_count;
3290
3291 return rc;
3292 }
3293 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3294
3295 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3296 struct qeth_reply *reply, unsigned long data)
3297 {
3298 struct qeth_ipa_cmd *cmd;
3299 struct qeth_ipacmd_setadpparms *setparms;
3300
3301 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3302
3303 cmd = (struct qeth_ipa_cmd *) data;
3304 setparms = &(cmd->data.setadapterparms);
3305
3306 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3307 if (cmd->hdr.return_code) {
3308 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3309 setparms->data.mode = SET_PROMISC_MODE_OFF;
3310 }
3311 card->info.promisc_mode = setparms->data.mode;
3312 return 0;
3313 }
3314
3315 void qeth_setadp_promisc_mode(struct qeth_card *card)
3316 {
3317 enum qeth_ipa_promisc_modes mode;
3318 struct net_device *dev = card->dev;
3319 struct qeth_cmd_buffer *iob;
3320 struct qeth_ipa_cmd *cmd;
3321
3322 QETH_DBF_TEXT(TRACE, 4, "setprom");
3323
3324 if (((dev->flags & IFF_PROMISC) &&
3325 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3326 (!(dev->flags & IFF_PROMISC) &&
3327 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3328 return;
3329 mode = SET_PROMISC_MODE_OFF;
3330 if (dev->flags & IFF_PROMISC)
3331 mode = SET_PROMISC_MODE_ON;
3332 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3333
3334 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3335 sizeof(struct qeth_ipacmd_setadpparms));
3336 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3337 cmd->data.setadapterparms.data.mode = mode;
3338 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3339 }
3340 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3341
3342 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3343 {
3344 struct qeth_card *card;
3345 char dbf_text[15];
3346
3347 card = dev->ml_priv;
3348
3349 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3350 sprintf(dbf_text, "%8x", new_mtu);
3351 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3352
3353 if (new_mtu < 64)
3354 return -EINVAL;
3355 if (new_mtu > 65535)
3356 return -EINVAL;
3357 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3358 (!qeth_mtu_is_valid(card, new_mtu)))
3359 return -EINVAL;
3360 dev->mtu = new_mtu;
3361 return 0;
3362 }
3363 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3364
3365 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3366 {
3367 struct qeth_card *card;
3368
3369 card = dev->ml_priv;
3370
3371 QETH_DBF_TEXT(TRACE, 5, "getstat");
3372
3373 return &card->stats;
3374 }
3375 EXPORT_SYMBOL_GPL(qeth_get_stats);
3376
3377 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3378 struct qeth_reply *reply, unsigned long data)
3379 {
3380 struct qeth_ipa_cmd *cmd;
3381
3382 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3383
3384 cmd = (struct qeth_ipa_cmd *) data;
3385 if (!card->options.layer2 ||
3386 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3387 memcpy(card->dev->dev_addr,
3388 &cmd->data.setadapterparms.data.change_addr.addr,
3389 OSA_ADDR_LEN);
3390 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3391 }
3392 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3393 return 0;
3394 }
3395
3396 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3397 {
3398 int rc;
3399 struct qeth_cmd_buffer *iob;
3400 struct qeth_ipa_cmd *cmd;
3401
3402 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3403
3404 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3405 sizeof(struct qeth_ipacmd_setadpparms));
3406 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3407 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3408 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3409 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3410 card->dev->dev_addr, OSA_ADDR_LEN);
3411 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3412 NULL);
3413 return rc;
3414 }
3415 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3416
3417 void qeth_tx_timeout(struct net_device *dev)
3418 {
3419 struct qeth_card *card;
3420
3421 card = dev->ml_priv;
3422 card->stats.tx_errors++;
3423 qeth_schedule_recovery(card);
3424 }
3425 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3426
3427 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3428 {
3429 struct qeth_card *card = dev->ml_priv;
3430 int rc = 0;
3431
3432 switch (regnum) {
3433 case MII_BMCR: /* Basic mode control register */
3434 rc = BMCR_FULLDPLX;
3435 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3436 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3437 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3438 rc |= BMCR_SPEED100;
3439 break;
3440 case MII_BMSR: /* Basic mode status register */
3441 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3442 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3443 BMSR_100BASE4;
3444 break;
3445 case MII_PHYSID1: /* PHYS ID 1 */
3446 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3447 dev->dev_addr[2];
3448 rc = (rc >> 5) & 0xFFFF;
3449 break;
3450 case MII_PHYSID2: /* PHYS ID 2 */
3451 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3452 break;
3453 case MII_ADVERTISE: /* Advertisement control reg */
3454 rc = ADVERTISE_ALL;
3455 break;
3456 case MII_LPA: /* Link partner ability reg */
3457 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3458 LPA_100BASE4 | LPA_LPACK;
3459 break;
3460 case MII_EXPANSION: /* Expansion register */
3461 break;
3462 case MII_DCOUNTER: /* disconnect counter */
3463 break;
3464 case MII_FCSCOUNTER: /* false carrier counter */
3465 break;
3466 case MII_NWAYTEST: /* N-way auto-neg test register */
3467 break;
3468 case MII_RERRCOUNTER: /* rx error counter */
3469 rc = card->stats.rx_errors;
3470 break;
3471 case MII_SREVISION: /* silicon revision */
3472 break;
3473 case MII_RESV1: /* reserved 1 */
3474 break;
3475 case MII_LBRERROR: /* loopback, rx, bypass error */
3476 break;
3477 case MII_PHYADDR: /* physical address */
3478 break;
3479 case MII_RESV2: /* reserved 2 */
3480 break;
3481 case MII_TPISTATUS: /* TPI status for 10mbps */
3482 break;
3483 case MII_NCONFIG: /* network interface config */
3484 break;
3485 default:
3486 break;
3487 }
3488 return rc;
3489 }
3490 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3491
3492 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3493 struct qeth_cmd_buffer *iob, int len,
3494 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3495 unsigned long),
3496 void *reply_param)
3497 {
3498 u16 s1, s2;
3499
3500 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3501
3502 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3503 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3504 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3505 /* adjust PDU length fields in IPA_PDU_HEADER */
3506 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3507 s2 = (u32) len;
3508 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3509 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3510 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3511 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3512 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3513 reply_cb, reply_param);
3514 }
3515
3516 static int qeth_snmp_command_cb(struct qeth_card *card,
3517 struct qeth_reply *reply, unsigned long sdata)
3518 {
3519 struct qeth_ipa_cmd *cmd;
3520 struct qeth_arp_query_info *qinfo;
3521 struct qeth_snmp_cmd *snmp;
3522 unsigned char *data;
3523 __u16 data_len;
3524
3525 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3526
3527 cmd = (struct qeth_ipa_cmd *) sdata;
3528 data = (unsigned char *)((char *)cmd - reply->offset);
3529 qinfo = (struct qeth_arp_query_info *) reply->param;
3530 snmp = &cmd->data.setadapterparms.data.snmp;
3531
3532 if (cmd->hdr.return_code) {
3533 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3534 return 0;
3535 }
3536 if (cmd->data.setadapterparms.hdr.return_code) {
3537 cmd->hdr.return_code =
3538 cmd->data.setadapterparms.hdr.return_code;
3539 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3540 return 0;
3541 }
3542 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3543 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3544 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3545 else
3546 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3547
3548 /* check if there is enough room in userspace */
3549 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3550 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3551 cmd->hdr.return_code = -ENOMEM;
3552 return 0;
3553 }
3554 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3555 cmd->data.setadapterparms.hdr.used_total);
3556 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3557 cmd->data.setadapterparms.hdr.seq_no);
3558 /*copy entries to user buffer*/
3559 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3560 memcpy(qinfo->udata + qinfo->udata_offset,
3561 (char *)snmp,
3562 data_len + offsetof(struct qeth_snmp_cmd, data));
3563 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3564 } else {
3565 memcpy(qinfo->udata + qinfo->udata_offset,
3566 (char *)&snmp->request, data_len);
3567 }
3568 qinfo->udata_offset += data_len;
3569 /* check if all replies received ... */
3570 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3571 cmd->data.setadapterparms.hdr.used_total);
3572 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3573 cmd->data.setadapterparms.hdr.seq_no);
3574 if (cmd->data.setadapterparms.hdr.seq_no <
3575 cmd->data.setadapterparms.hdr.used_total)
3576 return 1;
3577 return 0;
3578 }
3579
3580 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3581 {
3582 struct qeth_cmd_buffer *iob;
3583 struct qeth_ipa_cmd *cmd;
3584 struct qeth_snmp_ureq *ureq;
3585 int req_len;
3586 struct qeth_arp_query_info qinfo = {0, };
3587 int rc = 0;
3588
3589 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3590
3591 if (card->info.guestlan)
3592 return -EOPNOTSUPP;
3593
3594 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3595 (!card->options.layer2)) {
3596 return -EOPNOTSUPP;
3597 }
3598 /* skip 4 bytes (data_len struct member) to get req_len */
3599 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3600 return -EFAULT;
3601 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3602 if (!ureq) {
3603 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3604 return -ENOMEM;
3605 }
3606 if (copy_from_user(ureq, udata,
3607 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3608 kfree(ureq);
3609 return -EFAULT;
3610 }
3611 qinfo.udata_len = ureq->hdr.data_len;
3612 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3613 if (!qinfo.udata) {
3614 kfree(ureq);
3615 return -ENOMEM;
3616 }
3617 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3618
3619 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3620 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3621 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3622 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3623 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3624 qeth_snmp_command_cb, (void *)&qinfo);
3625 if (rc)
3626 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3627 QETH_CARD_IFNAME(card), rc);
3628 else {
3629 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3630 rc = -EFAULT;
3631 }
3632
3633 kfree(ureq);
3634 kfree(qinfo.udata);
3635 return rc;
3636 }
3637 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3638
3639 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3640 {
3641 switch (card->info.type) {
3642 case QETH_CARD_TYPE_IQD:
3643 return 2;
3644 default:
3645 return 0;
3646 }
3647 }
3648
3649 static int qeth_qdio_establish(struct qeth_card *card)
3650 {
3651 struct qdio_initialize init_data;
3652 char *qib_param_field;
3653 struct qdio_buffer **in_sbal_ptrs;
3654 struct qdio_buffer **out_sbal_ptrs;
3655 int i, j, k;
3656 int rc = 0;
3657
3658 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3659
3660 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3661 GFP_KERNEL);
3662 if (!qib_param_field)
3663 return -ENOMEM;
3664
3665 qeth_create_qib_param_field(card, qib_param_field);
3666 qeth_create_qib_param_field_blkt(card, qib_param_field);
3667
3668 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3669 GFP_KERNEL);
3670 if (!in_sbal_ptrs) {
3671 kfree(qib_param_field);
3672 return -ENOMEM;
3673 }
3674 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3675 in_sbal_ptrs[i] = (struct qdio_buffer *)
3676 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3677
3678 out_sbal_ptrs =
3679 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3680 sizeof(void *), GFP_KERNEL);
3681 if (!out_sbal_ptrs) {
3682 kfree(in_sbal_ptrs);
3683 kfree(qib_param_field);
3684 return -ENOMEM;
3685 }
3686 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3687 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3688 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3689 card->qdio.out_qs[i]->bufs[j].buffer);
3690 }
3691
3692 memset(&init_data, 0, sizeof(struct qdio_initialize));
3693 init_data.cdev = CARD_DDEV(card);
3694 init_data.q_format = qeth_get_qdio_q_format(card);
3695 init_data.qib_param_field_format = 0;
3696 init_data.qib_param_field = qib_param_field;
3697 init_data.no_input_qs = 1;
3698 init_data.no_output_qs = card->qdio.no_out_queues;
3699 init_data.input_handler = card->discipline.input_handler;
3700 init_data.output_handler = card->discipline.output_handler;
3701 init_data.int_parm = (unsigned long) card;
3702 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3703 QDIO_OUTBOUND_0COPY_SBALS |
3704 QDIO_USE_OUTBOUND_PCIS;
3705 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3706 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3707
3708 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3709 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3710 rc = qdio_initialize(&init_data);
3711 if (rc)
3712 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3713 }
3714 kfree(out_sbal_ptrs);
3715 kfree(in_sbal_ptrs);
3716 kfree(qib_param_field);
3717 return rc;
3718 }
3719
3720 static void qeth_core_free_card(struct qeth_card *card)
3721 {
3722
3723 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3724 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3725 qeth_clean_channel(&card->read);
3726 qeth_clean_channel(&card->write);
3727 if (card->dev)
3728 free_netdev(card->dev);
3729 kfree(card->ip_tbd_list);
3730 qeth_free_qdio_buffers(card);
3731 kfree(card);
3732 }
3733
3734 static struct ccw_device_id qeth_ids[] = {
3735 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3736 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3737 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3738 {},
3739 };
3740 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3741
3742 static struct ccw_driver qeth_ccw_driver = {
3743 .name = "qeth",
3744 .ids = qeth_ids,
3745 .probe = ccwgroup_probe_ccwdev,
3746 .remove = ccwgroup_remove_ccwdev,
3747 };
3748
3749 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3750 unsigned long driver_id)
3751 {
3752 return ccwgroup_create_from_string(root_dev, driver_id,
3753 &qeth_ccw_driver, 3, buf);
3754 }
3755
3756 int qeth_core_hardsetup_card(struct qeth_card *card)
3757 {
3758 struct qdio_ssqd_desc *qdio_ssqd;
3759 int retries = 3;
3760 int mpno = 0;
3761 int rc;
3762
3763 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3764 atomic_set(&card->force_alloc_skb, 0);
3765 retry:
3766 if (retries < 3) {
3767 PRINT_WARN("Retrying to do IDX activates.\n");
3768 ccw_device_set_offline(CARD_DDEV(card));
3769 ccw_device_set_offline(CARD_WDEV(card));
3770 ccw_device_set_offline(CARD_RDEV(card));
3771 ccw_device_set_online(CARD_RDEV(card));
3772 ccw_device_set_online(CARD_WDEV(card));
3773 ccw_device_set_online(CARD_DDEV(card));
3774 }
3775 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3776 if (rc == -ERESTARTSYS) {
3777 QETH_DBF_TEXT(SETUP, 2, "break1");
3778 return rc;
3779 } else if (rc) {
3780 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3781 if (--retries < 0)
3782 goto out;
3783 else
3784 goto retry;
3785 }
3786
3787 rc = qeth_get_unitaddr(card);
3788 if (rc) {
3789 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3790 return rc;
3791 }
3792
3793 qdio_ssqd = qdio_get_ssqd_desc(CARD_DDEV(card));
3794 if (qdio_ssqd)
3795 mpno = qdio_ssqd->pcnt;
3796 if (mpno)
3797 mpno = min(mpno - 1, QETH_MAX_PORTNO);
3798 if (card->info.portno > mpno) {
3799 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3800 "\n.", CARD_BUS_ID(card), card->info.portno);
3801 rc = -ENODEV;
3802 goto out;
3803 }
3804 qeth_init_tokens(card);
3805 qeth_init_func_level(card);
3806 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3807 if (rc == -ERESTARTSYS) {
3808 QETH_DBF_TEXT(SETUP, 2, "break2");
3809 return rc;
3810 } else if (rc) {
3811 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3812 if (--retries < 0)
3813 goto out;
3814 else
3815 goto retry;
3816 }
3817 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3818 if (rc == -ERESTARTSYS) {
3819 QETH_DBF_TEXT(SETUP, 2, "break3");
3820 return rc;
3821 } else if (rc) {
3822 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3823 if (--retries < 0)
3824 goto out;
3825 else
3826 goto retry;
3827 }
3828 rc = qeth_mpc_initialize(card);
3829 if (rc) {
3830 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3831 goto out;
3832 }
3833 return 0;
3834 out:
3835 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3836 return rc;
3837 }
3838 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3839
3840 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3841 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3842 {
3843 struct page *page = virt_to_page(element->addr);
3844 if (*pskb == NULL) {
3845 /* the upper protocol layers assume that there is data in the
3846 * skb itself. Copy a small amount (64 bytes) to make them
3847 * happy. */
3848 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3849 if (!(*pskb))
3850 return -ENOMEM;
3851 skb_reserve(*pskb, ETH_HLEN);
3852 if (data_len <= 64) {
3853 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3854 data_len);
3855 } else {
3856 get_page(page);
3857 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3858 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3859 data_len - 64);
3860 (*pskb)->data_len += data_len - 64;
3861 (*pskb)->len += data_len - 64;
3862 (*pskb)->truesize += data_len - 64;
3863 (*pfrag)++;
3864 }
3865 } else {
3866 get_page(page);
3867 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3868 (*pskb)->data_len += data_len;
3869 (*pskb)->len += data_len;
3870 (*pskb)->truesize += data_len;
3871 (*pfrag)++;
3872 }
3873 return 0;
3874 }
3875
3876 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3877 struct qdio_buffer *buffer,
3878 struct qdio_buffer_element **__element, int *__offset,
3879 struct qeth_hdr **hdr)
3880 {
3881 struct qdio_buffer_element *element = *__element;
3882 int offset = *__offset;
3883 struct sk_buff *skb = NULL;
3884 int skb_len;
3885 void *data_ptr;
3886 int data_len;
3887 int headroom = 0;
3888 int use_rx_sg = 0;
3889 int frag = 0;
3890
3891 /* qeth_hdr must not cross element boundaries */
3892 if (element->length < offset + sizeof(struct qeth_hdr)) {
3893 if (qeth_is_last_sbale(element))
3894 return NULL;
3895 element++;
3896 offset = 0;
3897 if (element->length < sizeof(struct qeth_hdr))
3898 return NULL;
3899 }
3900 *hdr = element->addr + offset;
3901
3902 offset += sizeof(struct qeth_hdr);
3903 if (card->options.layer2) {
3904 if (card->info.type == QETH_CARD_TYPE_OSN) {
3905 skb_len = (*hdr)->hdr.osn.pdu_length;
3906 headroom = sizeof(struct qeth_hdr);
3907 } else {
3908 skb_len = (*hdr)->hdr.l2.pkt_length;
3909 }
3910 } else {
3911 skb_len = (*hdr)->hdr.l3.length;
3912 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3913 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3914 headroom = TR_HLEN;
3915 else
3916 headroom = ETH_HLEN;
3917 }
3918
3919 if (!skb_len)
3920 return NULL;
3921
3922 if ((skb_len >= card->options.rx_sg_cb) &&
3923 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3924 (!atomic_read(&card->force_alloc_skb))) {
3925 use_rx_sg = 1;
3926 } else {
3927 skb = dev_alloc_skb(skb_len + headroom);
3928 if (!skb)
3929 goto no_mem;
3930 if (headroom)
3931 skb_reserve(skb, headroom);
3932 }
3933
3934 data_ptr = element->addr + offset;
3935 while (skb_len) {
3936 data_len = min(skb_len, (int)(element->length - offset));
3937 if (data_len) {
3938 if (use_rx_sg) {
3939 if (qeth_create_skb_frag(element, &skb, offset,
3940 &frag, data_len))
3941 goto no_mem;
3942 } else {
3943 memcpy(skb_put(skb, data_len), data_ptr,
3944 data_len);
3945 }
3946 }
3947 skb_len -= data_len;
3948 if (skb_len) {
3949 if (qeth_is_last_sbale(element)) {
3950 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3951 QETH_DBF_TEXT_(TRACE, 4, "%s",
3952 CARD_BUS_ID(card));
3953 QETH_DBF_TEXT(QERR, 2, "unexeob");
3954 QETH_DBF_TEXT_(QERR, 2, "%s",
3955 CARD_BUS_ID(card));
3956 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
3957 dev_kfree_skb_any(skb);
3958 card->stats.rx_errors++;
3959 return NULL;
3960 }
3961 element++;
3962 offset = 0;
3963 data_ptr = element->addr;
3964 } else {
3965 offset += data_len;
3966 }
3967 }
3968 *__element = element;
3969 *__offset = offset;
3970 if (use_rx_sg && card->options.performance_stats) {
3971 card->perf_stats.sg_skbs_rx++;
3972 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
3973 }
3974 return skb;
3975 no_mem:
3976 if (net_ratelimit()) {
3977 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
3978 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
3979 }
3980 card->stats.rx_dropped++;
3981 return NULL;
3982 }
3983 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
3984
3985 static void qeth_unregister_dbf_views(void)
3986 {
3987 int x;
3988 for (x = 0; x < QETH_DBF_INFOS; x++) {
3989 debug_unregister(qeth_dbf[x].id);
3990 qeth_dbf[x].id = NULL;
3991 }
3992 }
3993
3994 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
3995 {
3996 char dbf_txt_buf[32];
3997 va_list args;
3998
3999 if (level > (qeth_dbf[dbf_nix].id)->level)
4000 return;
4001 va_start(args, fmt);
4002 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4003 va_end(args);
4004 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4005 }
4006 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4007
4008 static int qeth_register_dbf_views(void)
4009 {
4010 int ret;
4011 int x;
4012
4013 for (x = 0; x < QETH_DBF_INFOS; x++) {
4014 /* register the areas */
4015 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4016 qeth_dbf[x].pages,
4017 qeth_dbf[x].areas,
4018 qeth_dbf[x].len);
4019 if (qeth_dbf[x].id == NULL) {
4020 qeth_unregister_dbf_views();
4021 return -ENOMEM;
4022 }
4023
4024 /* register a view */
4025 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4026 if (ret) {
4027 qeth_unregister_dbf_views();
4028 return ret;
4029 }
4030
4031 /* set a passing level */
4032 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4033 }
4034
4035 return 0;
4036 }
4037
4038 int qeth_core_load_discipline(struct qeth_card *card,
4039 enum qeth_discipline_id discipline)
4040 {
4041 int rc = 0;
4042 switch (discipline) {
4043 case QETH_DISCIPLINE_LAYER3:
4044 card->discipline.ccwgdriver = try_then_request_module(
4045 symbol_get(qeth_l3_ccwgroup_driver),
4046 "qeth_l3");
4047 break;
4048 case QETH_DISCIPLINE_LAYER2:
4049 card->discipline.ccwgdriver = try_then_request_module(
4050 symbol_get(qeth_l2_ccwgroup_driver),
4051 "qeth_l2");
4052 break;
4053 }
4054 if (!card->discipline.ccwgdriver) {
4055 PRINT_ERR("Support for discipline %d not present\n",
4056 discipline);
4057 rc = -EINVAL;
4058 }
4059 return rc;
4060 }
4061
4062 void qeth_core_free_discipline(struct qeth_card *card)
4063 {
4064 if (card->options.layer2)
4065 symbol_put(qeth_l2_ccwgroup_driver);
4066 else
4067 symbol_put(qeth_l3_ccwgroup_driver);
4068 card->discipline.ccwgdriver = NULL;
4069 }
4070
4071 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4072 {
4073 struct qeth_card *card;
4074 struct device *dev;
4075 int rc;
4076 unsigned long flags;
4077
4078 QETH_DBF_TEXT(SETUP, 2, "probedev");
4079
4080 dev = &gdev->dev;
4081 if (!get_device(dev))
4082 return -ENODEV;
4083
4084 QETH_DBF_TEXT_(SETUP, 2, "%s", gdev->dev.bus_id);
4085
4086 card = qeth_alloc_card();
4087 if (!card) {
4088 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4089 rc = -ENOMEM;
4090 goto err_dev;
4091 }
4092 card->read.ccwdev = gdev->cdev[0];
4093 card->write.ccwdev = gdev->cdev[1];
4094 card->data.ccwdev = gdev->cdev[2];
4095 dev_set_drvdata(&gdev->dev, card);
4096 card->gdev = gdev;
4097 gdev->cdev[0]->handler = qeth_irq;
4098 gdev->cdev[1]->handler = qeth_irq;
4099 gdev->cdev[2]->handler = qeth_irq;
4100
4101 rc = qeth_determine_card_type(card);
4102 if (rc) {
4103 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4104 goto err_card;
4105 }
4106 rc = qeth_setup_card(card);
4107 if (rc) {
4108 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4109 goto err_card;
4110 }
4111
4112 if (card->info.type == QETH_CARD_TYPE_OSN) {
4113 rc = qeth_core_create_osn_attributes(dev);
4114 if (rc)
4115 goto err_card;
4116 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4117 if (rc) {
4118 qeth_core_remove_osn_attributes(dev);
4119 goto err_card;
4120 }
4121 rc = card->discipline.ccwgdriver->probe(card->gdev);
4122 if (rc) {
4123 qeth_core_free_discipline(card);
4124 qeth_core_remove_osn_attributes(dev);
4125 goto err_card;
4126 }
4127 } else {
4128 rc = qeth_core_create_device_attributes(dev);
4129 if (rc)
4130 goto err_card;
4131 }
4132
4133 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4134 list_add_tail(&card->list, &qeth_core_card_list.list);
4135 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4136 return 0;
4137
4138 err_card:
4139 qeth_core_free_card(card);
4140 err_dev:
4141 put_device(dev);
4142 return rc;
4143 }
4144
4145 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4146 {
4147 unsigned long flags;
4148 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4149
4150 if (card->discipline.ccwgdriver) {
4151 card->discipline.ccwgdriver->remove(gdev);
4152 qeth_core_free_discipline(card);
4153 }
4154
4155 if (card->info.type == QETH_CARD_TYPE_OSN) {
4156 qeth_core_remove_osn_attributes(&gdev->dev);
4157 } else {
4158 qeth_core_remove_device_attributes(&gdev->dev);
4159 }
4160 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4161 list_del(&card->list);
4162 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4163 qeth_core_free_card(card);
4164 dev_set_drvdata(&gdev->dev, NULL);
4165 put_device(&gdev->dev);
4166 return;
4167 }
4168
4169 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4170 {
4171 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4172 int rc = 0;
4173 int def_discipline;
4174
4175 if (!card->discipline.ccwgdriver) {
4176 if (card->info.type == QETH_CARD_TYPE_IQD)
4177 def_discipline = QETH_DISCIPLINE_LAYER3;
4178 else
4179 def_discipline = QETH_DISCIPLINE_LAYER2;
4180 rc = qeth_core_load_discipline(card, def_discipline);
4181 if (rc)
4182 goto err;
4183 rc = card->discipline.ccwgdriver->probe(card->gdev);
4184 if (rc)
4185 goto err;
4186 }
4187 rc = card->discipline.ccwgdriver->set_online(gdev);
4188 err:
4189 return rc;
4190 }
4191
4192 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4193 {
4194 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4195 return card->discipline.ccwgdriver->set_offline(gdev);
4196 }
4197
4198 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4199 {
4200 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4201 if (card->discipline.ccwgdriver &&
4202 card->discipline.ccwgdriver->shutdown)
4203 card->discipline.ccwgdriver->shutdown(gdev);
4204 }
4205
4206 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4207 .owner = THIS_MODULE,
4208 .name = "qeth",
4209 .driver_id = 0xD8C5E3C8,
4210 .probe = qeth_core_probe_device,
4211 .remove = qeth_core_remove_device,
4212 .set_online = qeth_core_set_online,
4213 .set_offline = qeth_core_set_offline,
4214 .shutdown = qeth_core_shutdown,
4215 };
4216
4217 static ssize_t
4218 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4219 size_t count)
4220 {
4221 int err;
4222 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4223 qeth_core_ccwgroup_driver.driver_id);
4224 if (err)
4225 return err;
4226 else
4227 return count;
4228 }
4229
4230 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4231
4232 static struct {
4233 const char str[ETH_GSTRING_LEN];
4234 } qeth_ethtool_stats_keys[] = {
4235 /* 0 */{"rx skbs"},
4236 {"rx buffers"},
4237 {"tx skbs"},
4238 {"tx buffers"},
4239 {"tx skbs no packing"},
4240 {"tx buffers no packing"},
4241 {"tx skbs packing"},
4242 {"tx buffers packing"},
4243 {"tx sg skbs"},
4244 {"tx sg frags"},
4245 /* 10 */{"rx sg skbs"},
4246 {"rx sg frags"},
4247 {"rx sg page allocs"},
4248 {"tx large kbytes"},
4249 {"tx large count"},
4250 {"tx pk state ch n->p"},
4251 {"tx pk state ch p->n"},
4252 {"tx pk watermark low"},
4253 {"tx pk watermark high"},
4254 {"queue 0 buffer usage"},
4255 /* 20 */{"queue 1 buffer usage"},
4256 {"queue 2 buffer usage"},
4257 {"queue 3 buffer usage"},
4258 {"rx handler time"},
4259 {"rx handler count"},
4260 {"rx do_QDIO time"},
4261 {"rx do_QDIO count"},
4262 {"tx handler time"},
4263 {"tx handler count"},
4264 {"tx time"},
4265 /* 30 */{"tx count"},
4266 {"tx do_QDIO time"},
4267 {"tx do_QDIO count"},
4268 };
4269
4270 int qeth_core_get_stats_count(struct net_device *dev)
4271 {
4272 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4273 }
4274 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4275
4276 void qeth_core_get_ethtool_stats(struct net_device *dev,
4277 struct ethtool_stats *stats, u64 *data)
4278 {
4279 struct qeth_card *card = dev->ml_priv;
4280 data[0] = card->stats.rx_packets -
4281 card->perf_stats.initial_rx_packets;
4282 data[1] = card->perf_stats.bufs_rec;
4283 data[2] = card->stats.tx_packets -
4284 card->perf_stats.initial_tx_packets;
4285 data[3] = card->perf_stats.bufs_sent;
4286 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4287 - card->perf_stats.skbs_sent_pack;
4288 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4289 data[6] = card->perf_stats.skbs_sent_pack;
4290 data[7] = card->perf_stats.bufs_sent_pack;
4291 data[8] = card->perf_stats.sg_skbs_sent;
4292 data[9] = card->perf_stats.sg_frags_sent;
4293 data[10] = card->perf_stats.sg_skbs_rx;
4294 data[11] = card->perf_stats.sg_frags_rx;
4295 data[12] = card->perf_stats.sg_alloc_page_rx;
4296 data[13] = (card->perf_stats.large_send_bytes >> 10);
4297 data[14] = card->perf_stats.large_send_cnt;
4298 data[15] = card->perf_stats.sc_dp_p;
4299 data[16] = card->perf_stats.sc_p_dp;
4300 data[17] = QETH_LOW_WATERMARK_PACK;
4301 data[18] = QETH_HIGH_WATERMARK_PACK;
4302 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4303 data[20] = (card->qdio.no_out_queues > 1) ?
4304 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4305 data[21] = (card->qdio.no_out_queues > 2) ?
4306 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4307 data[22] = (card->qdio.no_out_queues > 3) ?
4308 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4309 data[23] = card->perf_stats.inbound_time;
4310 data[24] = card->perf_stats.inbound_cnt;
4311 data[25] = card->perf_stats.inbound_do_qdio_time;
4312 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4313 data[27] = card->perf_stats.outbound_handler_time;
4314 data[28] = card->perf_stats.outbound_handler_cnt;
4315 data[29] = card->perf_stats.outbound_time;
4316 data[30] = card->perf_stats.outbound_cnt;
4317 data[31] = card->perf_stats.outbound_do_qdio_time;
4318 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4319 }
4320 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4321
4322 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4323 {
4324 switch (stringset) {
4325 case ETH_SS_STATS:
4326 memcpy(data, &qeth_ethtool_stats_keys,
4327 sizeof(qeth_ethtool_stats_keys));
4328 break;
4329 default:
4330 WARN_ON(1);
4331 break;
4332 }
4333 }
4334 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4335
4336 void qeth_core_get_drvinfo(struct net_device *dev,
4337 struct ethtool_drvinfo *info)
4338 {
4339 struct qeth_card *card = dev->ml_priv;
4340 if (card->options.layer2)
4341 strcpy(info->driver, "qeth_l2");
4342 else
4343 strcpy(info->driver, "qeth_l3");
4344
4345 strcpy(info->version, "1.0");
4346 strcpy(info->fw_version, card->info.mcl_level);
4347 sprintf(info->bus_info, "%s/%s/%s",
4348 CARD_RDEV_ID(card),
4349 CARD_WDEV_ID(card),
4350 CARD_DDEV_ID(card));
4351 }
4352 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4353
4354 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4355 struct ethtool_cmd *ecmd)
4356 {
4357 struct qeth_card *card = netdev->ml_priv;
4358 enum qeth_link_types link_type;
4359
4360 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4361 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4362 else
4363 link_type = card->info.link_type;
4364
4365 ecmd->transceiver = XCVR_INTERNAL;
4366 ecmd->supported = SUPPORTED_Autoneg;
4367 ecmd->advertising = ADVERTISED_Autoneg;
4368 ecmd->duplex = DUPLEX_FULL;
4369 ecmd->autoneg = AUTONEG_ENABLE;
4370
4371 switch (link_type) {
4372 case QETH_LINK_TYPE_FAST_ETH:
4373 case QETH_LINK_TYPE_LANE_ETH100:
4374 ecmd->supported |= SUPPORTED_10baseT_Half |
4375 SUPPORTED_10baseT_Full |
4376 SUPPORTED_100baseT_Half |
4377 SUPPORTED_100baseT_Full |
4378 SUPPORTED_TP;
4379 ecmd->advertising |= ADVERTISED_10baseT_Half |
4380 ADVERTISED_10baseT_Full |
4381 ADVERTISED_100baseT_Half |
4382 ADVERTISED_100baseT_Full |
4383 ADVERTISED_TP;
4384 ecmd->speed = SPEED_100;
4385 ecmd->port = PORT_TP;
4386 break;
4387
4388 case QETH_LINK_TYPE_GBIT_ETH:
4389 case QETH_LINK_TYPE_LANE_ETH1000:
4390 ecmd->supported |= SUPPORTED_10baseT_Half |
4391 SUPPORTED_10baseT_Full |
4392 SUPPORTED_100baseT_Half |
4393 SUPPORTED_100baseT_Full |
4394 SUPPORTED_1000baseT_Half |
4395 SUPPORTED_1000baseT_Full |
4396 SUPPORTED_FIBRE;
4397 ecmd->advertising |= ADVERTISED_10baseT_Half |
4398 ADVERTISED_10baseT_Full |
4399 ADVERTISED_100baseT_Half |
4400 ADVERTISED_100baseT_Full |
4401 ADVERTISED_1000baseT_Half |
4402 ADVERTISED_1000baseT_Full |
4403 ADVERTISED_FIBRE;
4404 ecmd->speed = SPEED_1000;
4405 ecmd->port = PORT_FIBRE;
4406 break;
4407
4408 case QETH_LINK_TYPE_10GBIT_ETH:
4409 ecmd->supported |= SUPPORTED_10baseT_Half |
4410 SUPPORTED_10baseT_Full |
4411 SUPPORTED_100baseT_Half |
4412 SUPPORTED_100baseT_Full |
4413 SUPPORTED_1000baseT_Half |
4414 SUPPORTED_1000baseT_Full |
4415 SUPPORTED_10000baseT_Full |
4416 SUPPORTED_FIBRE;
4417 ecmd->advertising |= ADVERTISED_10baseT_Half |
4418 ADVERTISED_10baseT_Full |
4419 ADVERTISED_100baseT_Half |
4420 ADVERTISED_100baseT_Full |
4421 ADVERTISED_1000baseT_Half |
4422 ADVERTISED_1000baseT_Full |
4423 ADVERTISED_10000baseT_Full |
4424 ADVERTISED_FIBRE;
4425 ecmd->speed = SPEED_10000;
4426 ecmd->port = PORT_FIBRE;
4427 break;
4428
4429 default:
4430 ecmd->supported |= SUPPORTED_10baseT_Half |
4431 SUPPORTED_10baseT_Full |
4432 SUPPORTED_TP;
4433 ecmd->advertising |= ADVERTISED_10baseT_Half |
4434 ADVERTISED_10baseT_Full |
4435 ADVERTISED_TP;
4436 ecmd->speed = SPEED_10;
4437 ecmd->port = PORT_TP;
4438 }
4439
4440 return 0;
4441 }
4442 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4443
4444 static int __init qeth_core_init(void)
4445 {
4446 int rc;
4447
4448 PRINT_INFO("loading core functions\n");
4449 INIT_LIST_HEAD(&qeth_core_card_list.list);
4450 rwlock_init(&qeth_core_card_list.rwlock);
4451
4452 rc = qeth_register_dbf_views();
4453 if (rc)
4454 goto out_err;
4455 rc = ccw_driver_register(&qeth_ccw_driver);
4456 if (rc)
4457 goto ccw_err;
4458 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4459 if (rc)
4460 goto ccwgroup_err;
4461 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4462 &driver_attr_group);
4463 if (rc)
4464 goto driver_err;
4465 qeth_core_root_dev = s390_root_dev_register("qeth");
4466 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4467 if (rc)
4468 goto register_err;
4469
4470 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4471 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4472 if (!qeth_core_header_cache) {
4473 rc = -ENOMEM;
4474 goto slab_err;
4475 }
4476
4477 return 0;
4478 slab_err:
4479 s390_root_dev_unregister(qeth_core_root_dev);
4480 register_err:
4481 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4482 &driver_attr_group);
4483 driver_err:
4484 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4485 ccwgroup_err:
4486 ccw_driver_unregister(&qeth_ccw_driver);
4487 ccw_err:
4488 qeth_unregister_dbf_views();
4489 out_err:
4490 PRINT_ERR("Initialization failed with code %d\n", rc);
4491 return rc;
4492 }
4493
4494 static void __exit qeth_core_exit(void)
4495 {
4496 s390_root_dev_unregister(qeth_core_root_dev);
4497 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4498 &driver_attr_group);
4499 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4500 ccw_driver_unregister(&qeth_ccw_driver);
4501 kmem_cache_destroy(qeth_core_header_cache);
4502 qeth_unregister_dbf_views();
4503 PRINT_INFO("core functions removed\n");
4504 }
4505
4506 module_init(qeth_core_init);
4507 module_exit(qeth_core_exit);
4508 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4509 MODULE_DESCRIPTION("qeth core functions");
4510 MODULE_LICENSE("GPL");
Linux with added FPC-III support