sound/soc/codecs/wm8737.c

   1 /*
   2  * wm8737.c  --  WM8737 ALSA SoC Audio driver
   3  *
   4  * Copyright 2010 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/i2c.h>
  19 #include <linux/regmap.h>
  20 #include <linux/regulator/consumer.h>
  21 #include <linux/spi/spi.h>
  22 #include <linux/slab.h>
  23 #include <linux/of_device.h>
  24 #include <sound/core.h>
  25 #include <sound/pcm.h>
  26 #include <sound/pcm_params.h>
  27 #include <sound/soc.h>
  28 #include <sound/soc-dapm.h>
  29 #include <sound/initval.h>
  30 #include <sound/tlv.h>
  31
  32 #include "wm8737.h"
  33
  34 #define WM8737_NUM_SUPPLIES 4
  35 static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
  36         "DCVDD",
  37         "DBVDD",
  38         "AVDD",
  39         "MVDD",
  40 };
  41
  42 /* codec private data */
  43 struct wm8737_priv {
  44         struct regmap *regmap;
  45         struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
  46         unsigned int mclk;
  47 };
  48
  49 static const struct reg_default wm8737_reg_defaults[] = {
  50         {  0, 0x00C3 },     /* R0  - Left PGA volume */
  51         {  1, 0x00C3 },     /* R1  - Right PGA volume */
  52         {  2, 0x0007 },     /* R2  - AUDIO path L */
  53         {  3, 0x0007 },     /* R3  - AUDIO path R */
  54         {  4, 0x0000 },     /* R4  - 3D Enhance */
  55         {  5, 0x0000 },     /* R5  - ADC Control */
  56         {  6, 0x0000 },     /* R6  - Power Management */
  57         {  7, 0x000A },     /* R7  - Audio Format */
  58         {  8, 0x0000 },     /* R8  - Clocking */
  59         {  9, 0x000F },     /* R9  - MIC Preamp Control */
  60         { 10, 0x0003 },     /* R10 - Misc Bias Control */
  61         { 11, 0x0000 },     /* R11 - Noise Gate */
  62         { 12, 0x007C },     /* R12 - ALC1 */
  63         { 13, 0x0000 },     /* R13 - ALC2 */
  64         { 14, 0x0032 },     /* R14 - ALC3 */
  65 };
  66
  67 static bool wm8737_volatile(struct device *dev, unsigned int reg)
  68 {
  69         switch (reg) {
  70         case WM8737_RESET:
  71                 return true;
  72         default:
  73                 return false;
  74         }
  75 }
  76
  77 static int wm8737_reset(struct snd_soc_codec *codec)
  78 {
  79         return snd_soc_write(codec, WM8737_RESET, 0);
  80 }
  81
  82 static const unsigned int micboost_tlv[] = {
  83         TLV_DB_RANGE_HEAD(4),
  84         0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
  85         1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
  86         2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
  87         3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0),
  88 };
  89 static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
  90 static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
  91 static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
  92 static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
  93 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
  94
  95 static const char *micbias_enum_text[] = {
  96         "25%",
  97         "50%",
  98         "75%",
  99         "100%",
 100 };
 101
 102 static SOC_ENUM_SINGLE_DECL(micbias_enum,
 103                             WM8737_MIC_PREAMP_CONTROL, 0, micbias_enum_text);
 104
 105 static const char *low_cutoff_text[] = {
 106         "Low", "High"
 107 };
 108
 109 static SOC_ENUM_SINGLE_DECL(low_3d,
 110                             WM8737_3D_ENHANCE, 6, low_cutoff_text);
 111
 112 static const char *high_cutoff_text[] = {
 113         "High", "Low"
 114 };
 115
 116 static SOC_ENUM_SINGLE_DECL(high_3d,
 117                             WM8737_3D_ENHANCE, 5, high_cutoff_text);
 118
 119 static const char *alc_fn_text[] = {
 120         "Disabled", "Right", "Left", "Stereo"
 121 };
 122
 123 static SOC_ENUM_SINGLE_DECL(alc_fn,
 124                             WM8737_ALC1, 7, alc_fn_text);
 125
 126 static const char *alc_hold_text[] = {
 127         "0", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
 128         "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
 129         "10.916s", "21.832s", "43.691s"
 130 };
 131
 132 static SOC_ENUM_SINGLE_DECL(alc_hold,
 133                             WM8737_ALC2, 0, alc_hold_text);
 134
 135 static const char *alc_atk_text[] = {
 136         "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
 137         "1.075s", "2.15s", "4.3s", "8.6s"
 138 };
 139
 140 static SOC_ENUM_SINGLE_DECL(alc_atk,
 141                             WM8737_ALC3, 0, alc_atk_text);
 142
 143 static const char *alc_dcy_text[] = {
 144         "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
 145         "4.3s", "8.6s", "17.2s", "34.41s"
 146 };
 147
 148 static SOC_ENUM_SINGLE_DECL(alc_dcy,
 149                             WM8737_ALC3, 4, alc_dcy_text);
 150
 151 static const struct snd_kcontrol_new wm8737_snd_controls[] = {
 152 SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 153                  6, 3, 0, micboost_tlv),
 154 SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 155              4, 1, 0),
 156 SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 157            3, 1, 0),
 158
 159 SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
 160                  WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
 161 SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
 162            2, 1, 0),
 163
 164 SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
 165
 166 SOC_ENUM("Mic PGA Bias", micbias_enum),
 167 SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
 168 SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
 169 SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
 170
 171 SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
 172 SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
 173 SOC_ENUM("3D Low Cut-off", low_3d),
 174 SOC_ENUM("3D High Cut-off", low_3d),
 175 SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
 176
 177 SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
 178 SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
 179                ng_tlv),
 180
 181 SOC_ENUM("ALC", alc_fn),
 182 SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
 183 SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
 184 SOC_ENUM("ALC Hold Time", alc_hold),
 185 SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
 186 SOC_ENUM("ALC Attack Time", alc_atk),
 187 SOC_ENUM("ALC Decay Time", alc_dcy),
 188 };
 189
 190 static const char *linsel_text[] = {
 191         "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
 192 };
 193
 194 static SOC_ENUM_SINGLE_DECL(linsel_enum,
 195                             WM8737_AUDIO_PATH_L, 7, linsel_text);
 196
 197 static const struct snd_kcontrol_new linsel_mux =
 198         SOC_DAPM_ENUM("LINSEL", linsel_enum);
 199
 200
 201 static const char *rinsel_text[] = {
 202         "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
 203 };
 204
 205 static SOC_ENUM_SINGLE_DECL(rinsel_enum,
 206                             WM8737_AUDIO_PATH_R, 7, rinsel_text);
 207
 208 static const struct snd_kcontrol_new rinsel_mux =
 209         SOC_DAPM_ENUM("RINSEL", rinsel_enum);
 210
 211 static const char *bypass_text[] = {
 212         "Direct", "Preamp"
 213 };
 214
 215 static SOC_ENUM_SINGLE_DECL(lbypass_enum,
 216                             WM8737_MIC_PREAMP_CONTROL, 2, bypass_text);
 217
 218 static const struct snd_kcontrol_new lbypass_mux =
 219         SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
 220
 221
 222 static SOC_ENUM_SINGLE_DECL(rbypass_enum,
 223                             WM8737_MIC_PREAMP_CONTROL, 3, bypass_text);
 224
 225 static const struct snd_kcontrol_new rbypass_mux =
 226         SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
 227
 228 static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
 229 SND_SOC_DAPM_INPUT("LINPUT1"),
 230 SND_SOC_DAPM_INPUT("LINPUT2"),
 231 SND_SOC_DAPM_INPUT("LINPUT3"),
 232 SND_SOC_DAPM_INPUT("RINPUT1"),
 233 SND_SOC_DAPM_INPUT("RINPUT2"),
 234 SND_SOC_DAPM_INPUT("RINPUT3"),
 235 SND_SOC_DAPM_INPUT("LACIN"),
 236 SND_SOC_DAPM_INPUT("RACIN"),
 237
 238 SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
 239 SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
 240
 241 SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
 242 SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
 243
 244 SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
 245 SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
 246
 247 SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
 248 SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
 249
 250 SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
 251 };
 252
 253 static const struct snd_soc_dapm_route intercon[] = {
 254         { "LINSEL", "LINPUT1", "LINPUT1" },
 255         { "LINSEL", "LINPUT2", "LINPUT2" },
 256         { "LINSEL", "LINPUT3", "LINPUT3" },
 257         { "LINSEL", "LINPUT1 DC", "LINPUT1" },
 258
 259         { "RINSEL", "RINPUT1", "RINPUT1" },
 260         { "RINSEL", "RINPUT2", "RINPUT2" },
 261         { "RINSEL", "RINPUT3", "RINPUT3" },
 262         { "RINSEL", "RINPUT1 DC", "RINPUT1" },
 263
 264         { "Left Preamp Mux", "Preamp", "LINSEL" },
 265         { "Left Preamp Mux", "Direct", "LACIN" },
 266
 267         { "Right Preamp Mux", "Preamp", "RINSEL" },
 268         { "Right Preamp Mux", "Direct", "RACIN" },
 269
 270         { "PGAL", NULL, "Left Preamp Mux" },
 271         { "PGAR", NULL, "Right Preamp Mux" },
 272
 273         { "ADCL", NULL, "PGAL" },
 274         { "ADCR", NULL, "PGAR" },
 275
 276         { "AIF", NULL, "ADCL" },
 277         { "AIF", NULL, "ADCR" },
 278 };
 279
 280 static int wm8737_add_widgets(struct snd_soc_codec *codec)
 281 {
 282         struct snd_soc_dapm_context *dapm = &codec->dapm;
 283
 284         snd_soc_dapm_new_controls(dapm, wm8737_dapm_widgets,
 285                                   ARRAY_SIZE(wm8737_dapm_widgets));
 286         snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
 287
 288         return 0;
 289 }
 290
 291 /* codec mclk clock divider coefficients */
 292 static const struct {
 293         u32 mclk;
 294         u32 rate;
 295         u8 usb;
 296         u8 sr;
 297 } coeff_div[] = {
 298         { 12288000,  8000, 0,  0x4 },
 299         { 12288000, 12000, 0,  0x8 },
 300         { 12288000, 16000, 0,  0xa },
 301         { 12288000, 24000, 0, 0x1c },
 302         { 12288000, 32000, 0,  0xc },
 303         { 12288000, 48000, 0,    0 },
 304         { 12288000, 96000, 0,  0xe },
 305
 306         { 11289600,  8000, 0, 0x14 },
 307         { 11289600, 11025, 0, 0x18 },
 308         { 11289600, 22050, 0, 0x1a },
 309         { 11289600, 44100, 0, 0x10 },
 310         { 11289600, 88200, 0, 0x1e },
 311
 312         { 18432000,  8000, 0,  0x5 },
 313         { 18432000, 12000, 0,  0x9 },
 314         { 18432000, 16000, 0,  0xb },
 315         { 18432000, 24000, 0, 0x1b },
 316         { 18432000, 32000, 0,  0xd },
 317         { 18432000, 48000, 0,  0x1 },
 318         { 18432000, 96000, 0, 0x1f },
 319
 320         { 16934400,  8000, 0, 0x15 },
 321         { 16934400, 11025, 0, 0x19 },
 322         { 16934400, 22050, 0, 0x1b },
 323         { 16934400, 44100, 0, 0x11 },
 324         { 16934400, 88200, 0, 0x1f },
 325
 326         { 12000000,  8000, 1,  0x4 },
 327         { 12000000, 11025, 1, 0x19 },
 328         { 12000000, 12000, 1,  0x8 },
 329         { 12000000, 16000, 1,  0xa },
 330         { 12000000, 22050, 1, 0x1b },
 331         { 12000000, 24000, 1, 0x1c },
 332         { 12000000, 32000, 1,  0xc },
 333         { 12000000, 44100, 1, 0x11 },
 334         { 12000000, 48000, 1,  0x0 },
 335         { 12000000, 88200, 1, 0x1f },
 336         { 12000000, 96000, 1,  0xe },
 337 };
 338
 339 static int wm8737_hw_params(struct snd_pcm_substream *substream,
 340                             struct snd_pcm_hw_params *params,
 341                             struct snd_soc_dai *dai)
 342 {
 343         struct snd_soc_codec *codec = dai->codec;
 344         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 345         int i;
 346         u16 clocking = 0;
 347         u16 af = 0;
 348
 349         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 350                 if (coeff_div[i].rate != params_rate(params))
 351                         continue;
 352
 353                 if (coeff_div[i].mclk == wm8737->mclk)
 354                         break;
 355
 356                 if (coeff_div[i].mclk == wm8737->mclk * 2) {
 357                         clocking |= WM8737_CLKDIV2;
 358                         break;
 359                 }
 360         }
 361
 362         if (i == ARRAY_SIZE(coeff_div)) {
 363                 dev_err(codec->dev, "%dHz MCLK can't support %dHz\n",
 364                         wm8737->mclk, params_rate(params));
 365                 return -EINVAL;
 366         }
 367
 368         clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
 369
 370         switch (params_format(params)) {
 371         case SNDRV_PCM_FORMAT_S16_LE:
 372                 break;
 373         case SNDRV_PCM_FORMAT_S20_3LE:
 374                 af |= 0x8;
 375                 break;
 376         case SNDRV_PCM_FORMAT_S24_LE:
 377                 af |= 0x10;
 378                 break;
 379         case SNDRV_PCM_FORMAT_S32_LE:
 380                 af |= 0x18;
 381                 break;
 382         default:
 383                 return -EINVAL;
 384         }
 385
 386         snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
 387         snd_soc_update_bits(codec, WM8737_CLOCKING,
 388                             WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
 389                             clocking);
 390
 391         return 0;
 392 }
 393
 394 static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 395                                  int clk_id, unsigned int freq, int dir)
 396 {
 397         struct snd_soc_codec *codec = codec_dai->codec;
 398         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 399         int i;
 400
 401         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 402                 if (freq == coeff_div[i].mclk ||
 403                     freq == coeff_div[i].mclk * 2) {
 404                         wm8737->mclk = freq;
 405                         return 0;
 406                 }
 407         }
 408
 409         dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq);
 410
 411         return -EINVAL;
 412 }
 413
 414
 415 static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
 416                 unsigned int fmt)
 417 {
 418         struct snd_soc_codec *codec = codec_dai->codec;
 419         u16 af = 0;
 420
 421         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 422         case SND_SOC_DAIFMT_CBM_CFM:
 423                 af |= WM8737_MS;
 424                 break;
 425         case SND_SOC_DAIFMT_CBS_CFS:
 426                 break;
 427         default:
 428                 return -EINVAL;
 429         }
 430
 431         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 432         case SND_SOC_DAIFMT_I2S:
 433                 af |= 0x2;
 434                 break;
 435         case SND_SOC_DAIFMT_RIGHT_J:
 436                 break;
 437         case SND_SOC_DAIFMT_LEFT_J:
 438                 af |= 0x1;
 439                 break;
 440         case SND_SOC_DAIFMT_DSP_A:
 441                 af |= 0x3;
 442                 break;
 443         case SND_SOC_DAIFMT_DSP_B:
 444                 af |= 0x13;
 445                 break;
 446         default:
 447                 return -EINVAL;
 448         }
 449
 450         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 451         case SND_SOC_DAIFMT_NB_NF:
 452                 break;
 453         case SND_SOC_DAIFMT_NB_IF:
 454                 af |= WM8737_LRP;
 455                 break;
 456         default:
 457                 return -EINVAL;
 458         }
 459
 460         snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT,
 461                             WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
 462
 463         return 0;
 464 }
 465
 466 static int wm8737_set_bias_level(struct snd_soc_codec *codec,
 467                                  enum snd_soc_bias_level level)
 468 {
 469         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 470         int ret;
 471
 472         switch (level) {
 473         case SND_SOC_BIAS_ON:
 474                 break;
 475
 476         case SND_SOC_BIAS_PREPARE:
 477                 /* VMID at 2*75k */
 478                 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
 479                                     WM8737_VMIDSEL_MASK, 0);
 480                 break;
 481
 482         case SND_SOC_BIAS_STANDBY:
 483                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
 484                         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
 485                                                     wm8737->supplies);
 486                         if (ret != 0) {
 487                                 dev_err(codec->dev,
 488                                         "Failed to enable supplies: %d\n",
 489                                         ret);
 490                                 return ret;
 491                         }
 492
 493                         regcache_sync(wm8737->regmap);
 494
 495                         /* Fast VMID ramp at 2*2.5k */
 496                         snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
 497                                             WM8737_VMIDSEL_MASK,
 498                                             2 << WM8737_VMIDSEL_SHIFT);
 499
 500                         /* Bring VMID up */
 501                         snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
 502                                             WM8737_VMID_MASK |
 503                                             WM8737_VREF_MASK,
 504                                             WM8737_VMID_MASK |
 505                                             WM8737_VREF_MASK);
 506
 507                         msleep(500);
 508                 }
 509
 510                 /* VMID at 2*300k */
 511                 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
 512                                     WM8737_VMIDSEL_MASK,
 513                                     1 << WM8737_VMIDSEL_SHIFT);
 514
 515                 break;
 516
 517         case SND_SOC_BIAS_OFF:
 518                 snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
 519                                     WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
 520
 521                 regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
 522                                        wm8737->supplies);
 523                 break;
 524         }
 525
 526         codec->dapm.bias_level = level;
 527         return 0;
 528 }
 529
 530 #define WM8737_RATES SNDRV_PCM_RATE_8000_96000
 531
 532 #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 533                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
 534
 535 static const struct snd_soc_dai_ops wm8737_dai_ops = {
 536         .hw_params      = wm8737_hw_params,
 537         .set_sysclk     = wm8737_set_dai_sysclk,
 538         .set_fmt        = wm8737_set_dai_fmt,
 539 };
 540
 541 static struct snd_soc_dai_driver wm8737_dai = {
 542         .name = "wm8737",
 543         .capture = {
 544                 .stream_name = "Capture",
 545                 .channels_min = 2,  /* Mono modes not yet supported */
 546                 .channels_max = 2,
 547                 .rates = WM8737_RATES,
 548                 .formats = WM8737_FORMATS,
 549         },
 550         .ops = &wm8737_dai_ops,
 551 };
 552
 553 #ifdef CONFIG_PM
 554 static int wm8737_suspend(struct snd_soc_codec *codec)
 555 {
 556         wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
 557         return 0;
 558 }
 559
 560 static int wm8737_resume(struct snd_soc_codec *codec)
 561 {
 562         wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 563         return 0;
 564 }
 565 #else
 566 #define wm8737_suspend NULL
 567 #define wm8737_resume NULL
 568 #endif
 569
 570 static int wm8737_probe(struct snd_soc_codec *codec)
 571 {
 572         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
 573         int ret;
 574
 575         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
 576                                     wm8737->supplies);
 577         if (ret != 0) {
 578                 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
 579                 goto err_get;
 580         }
 581
 582         ret = wm8737_reset(codec);
 583         if (ret < 0) {
 584                 dev_err(codec->dev, "Failed to issue reset\n");
 585                 goto err_enable;
 586         }
 587
 588         snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
 589                             WM8737_LVU);
 590         snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
 591                             WM8737_RVU);
 592
 593         wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 594
 595         /* Bias level configuration will have done an extra enable */
 596         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
 597
 598         snd_soc_add_codec_controls(codec, wm8737_snd_controls,
 599                              ARRAY_SIZE(wm8737_snd_controls));
 600         wm8737_add_widgets(codec);
 601
 602         return 0;
 603
 604 err_enable:
 605         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
 606 err_get:
 607         return ret;
 608 }
 609
 610 static int wm8737_remove(struct snd_soc_codec *codec)
 611 {
 612         wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
 613         return 0;
 614 }
 615
 616 static struct snd_soc_codec_driver soc_codec_dev_wm8737 = {
 617         .probe          = wm8737_probe,
 618         .remove         = wm8737_remove,
 619         .suspend        = wm8737_suspend,
 620         .resume         = wm8737_resume,
 621         .set_bias_level = wm8737_set_bias_level,
 622 };
 623
 624 static const struct of_device_id wm8737_of_match[] = {
 625         { .compatible = "wlf,wm8737", },
 626         { }
 627 };
 628
 629 MODULE_DEVICE_TABLE(of, wm8737_of_match);
 630
 631 static const struct regmap_config wm8737_regmap = {
 632         .reg_bits = 7,
 633         .val_bits = 9,
 634         .max_register = WM8737_MAX_REGISTER,
 635
 636         .reg_defaults = wm8737_reg_defaults,
 637         .num_reg_defaults = ARRAY_SIZE(wm8737_reg_defaults),
 638         .cache_type = REGCACHE_RBTREE,
 639
 640         .volatile_reg = wm8737_volatile,
 641 };
 642
 643 #if IS_ENABLED(CONFIG_I2C)
 644 static int wm8737_i2c_probe(struct i2c_client *i2c,
 645                             const struct i2c_device_id *id)
 646 {
 647         struct wm8737_priv *wm8737;
 648         int ret, i;
 649
 650         wm8737 = devm_kzalloc(&i2c->dev, sizeof(struct wm8737_priv),
 651                               GFP_KERNEL);
 652         if (wm8737 == NULL)
 653                 return -ENOMEM;
 654
 655         for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
 656                 wm8737->supplies[i].supply = wm8737_supply_names[i];
 657
 658         ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8737->supplies),
 659                                       wm8737->supplies);
 660         if (ret != 0) {
 661                 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
 662                 return ret;
 663         }
 664
 665         wm8737->regmap = devm_regmap_init_i2c(i2c, &wm8737_regmap);
 666         if (IS_ERR(wm8737->regmap))
 667                 return PTR_ERR(wm8737->regmap);
 668
 669         i2c_set_clientdata(i2c, wm8737);
 670
 671         ret =  snd_soc_register_codec(&i2c->dev,
 672                                       &soc_codec_dev_wm8737, &wm8737_dai, 1);
 673
 674         return ret;
 675
 676 }
 677
 678 static int wm8737_i2c_remove(struct i2c_client *client)
 679 {
 680         snd_soc_unregister_codec(&client->dev);
 681
 682         return 0;
 683 }
 684
 685 static const struct i2c_device_id wm8737_i2c_id[] = {
 686         { "wm8737", 0 },
 687         { }
 688 };
 689 MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
 690
 691 static struct i2c_driver wm8737_i2c_driver = {
 692         .driver = {
 693                 .name = "wm8737",
 694                 .owner = THIS_MODULE,
 695                 .of_match_table = wm8737_of_match,
 696         },
 697         .probe =    wm8737_i2c_probe,
 698         .remove =   wm8737_i2c_remove,
 699         .id_table = wm8737_i2c_id,
 700 };
 701 #endif
 702
 703 #if defined(CONFIG_SPI_MASTER)
 704 static int wm8737_spi_probe(struct spi_device *spi)
 705 {
 706         struct wm8737_priv *wm8737;
 707         int ret, i;
 708
 709         wm8737 = devm_kzalloc(&spi->dev, sizeof(struct wm8737_priv),
 710                               GFP_KERNEL);
 711         if (wm8737 == NULL)
 712                 return -ENOMEM;
 713
 714         for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
 715                 wm8737->supplies[i].supply = wm8737_supply_names[i];
 716
 717         ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8737->supplies),
 718                                       wm8737->supplies);
 719         if (ret != 0) {
 720                 dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
 721                 return ret;
 722         }
 723
 724         wm8737->regmap = devm_regmap_init_spi(spi, &wm8737_regmap);
 725         if (IS_ERR(wm8737->regmap))
 726                 return PTR_ERR(wm8737->regmap);
 727
 728         spi_set_drvdata(spi, wm8737);
 729
 730         ret = snd_soc_register_codec(&spi->dev,
 731                                      &soc_codec_dev_wm8737, &wm8737_dai, 1);
 732
 733         return ret;
 734 }
 735
 736 static int wm8737_spi_remove(struct spi_device *spi)
 737 {
 738         snd_soc_unregister_codec(&spi->dev);
 739
 740         return 0;
 741 }
 742
 743 static struct spi_driver wm8737_spi_driver = {
 744         .driver = {
 745                 .name   = "wm8737",
 746                 .owner  = THIS_MODULE,
 747                 .of_match_table = wm8737_of_match,
 748         },
 749         .probe          = wm8737_spi_probe,
 750         .remove         = wm8737_spi_remove,
 751 };
 752 #endif /* CONFIG_SPI_MASTER */
 753
 754 static int __init wm8737_modinit(void)
 755 {
 756         int ret;
 757 #if IS_ENABLED(CONFIG_I2C)
 758         ret = i2c_add_driver(&wm8737_i2c_driver);
 759         if (ret != 0) {
 760                 printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
 761                        ret);
 762         }
 763 #endif
 764 #if defined(CONFIG_SPI_MASTER)
 765         ret = spi_register_driver(&wm8737_spi_driver);
 766         if (ret != 0) {
 767                 printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
 768                        ret);
 769         }
 770 #endif
 771         return 0;
 772 }
 773 module_init(wm8737_modinit);
 774
 775 static void __exit wm8737_exit(void)
 776 {
 777 #if defined(CONFIG_SPI_MASTER)
 778         spi_unregister_driver(&wm8737_spi_driver);
 779 #endif
 780 #if IS_ENABLED(CONFIG_I2C)
 781         i2c_del_driver(&wm8737_i2c_driver);
 782 #endif
 783 }
 784 module_exit(wm8737_exit);
 785
 786 MODULE_DESCRIPTION("ASoC WM8737 driver");
 787 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
 788 MODULE_LICENSE("GPL");