arch/powerpc/boot/dts/p3060qds.dts

   1 /*
   2  * P3060QDS Device Tree Source
   3  *
   4  * Copyright 2011 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /include/ "p3060si.dtsi"
  36
  37 / {
  38         model = "fsl,P3060QDS";
  39         compatible = "fsl,P3060QDS";
  40         #address-cells = <2>;
  41         #size-cells = <2>;
  42         interrupt-parent = <&mpic>;
  43
  44         memory {
  45                 device_type = "memory";
  46         };
  47
  48         dcsr: dcsr@f00000000 {
  49                 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
  50         };
  51
  52         soc: soc@ffe000000 {
  53                 spi@110000 {
  54                         flash@0 {
  55                                 #address-cells = <1>;
  56                                 #size-cells = <1>;
  57                                 compatible = "spansion,s25sl12801";
  58                                 reg = <0>;
  59                                 spi-max-frequency = <40000000>; /* input clock */
  60                                 partition@u-boot {
  61                                         label = "u-boot";
  62                                         reg = <0x00000000 0x00100000>;
  63                                         read-only;
  64                                 };
  65                                 partition@kernel {
  66                                         label = "kernel";
  67                                         reg = <0x00100000 0x00500000>;
  68                                         read-only;
  69                                 };
  70                                 partition@dtb {
  71                                         label = "dtb";
  72                                         reg = <0x00600000 0x00100000>;
  73                                         read-only;
  74                                 };
  75                                 partition@fs {
  76                                         label = "file system";
  77                                         reg = <0x00700000 0x00900000>;
  78                                 };
  79                         };
  80                         flash@1 {
  81                                 #address-cells = <1>;
  82                                 #size-cells = <1>;
  83                                 compatible = "spansion,en25q32b";
  84                                 reg = <1>;
  85                                 spi-max-frequency = <40000000>; /* input clock */
  86                                 partition@spi1 {
  87                                         label = "spi1";
  88                                         reg = <0x00000000 0x00400000>;
  89                                 };
  90                         };
  91                         flash@2 {
  92                                 #address-cells = <1>;
  93                                 #size-cells = <1>;
  94                                 compatible = "atmel,at45db081d";
  95                                 reg = <2>;
  96                                 spi-max-frequency = <40000000>; /* input clock */
  97                                 partition@spi1 {
  98                                         label = "spi2";
  99                                         reg = <0x00000000 0x00100000>;
 100                                 };
 101                         };
 102                         flash@3 {
 103                                 #address-cells = <1>;
 104                                 #size-cells = <1>;
 105                                 compatible = "spansion,sst25wf040";
 106                                 reg = <3>;
 107                                 spi-max-frequency = <40000000>; /* input clock */
 108                                 partition@spi3 {
 109                                         label = "spi3";
 110                                         reg = <0x00000000 0x00080000>;
 111                                 };
 112                         };
 113                 };
 114
 115                 i2c@118000 {
 116                         eeprom@51 {
 117                                 compatible = "at24,24c256";
 118                                 reg = <0x51>;
 119                         };
 120                         eeprom@53 {
 121                                 compatible = "at24,24c256";
 122                                 reg = <0x53>;
 123                         };
 124                         rtc@68 {
 125                                 compatible = "dallas,ds3232";
 126                                 reg = <0x68>;
 127                                 interrupts = <0x1 0x1 0 0>;
 128                         };
 129                 };
 130
 131                 usb0: usb@210000 {
 132                         phy_type = "ulpi";
 133                 };
 134
 135                 usb1: usb@211000 {
 136                         dr_mode = "host";
 137                         phy_type = "ulpi";
 138                 };
 139         };
 140
 141         rapidio@ffe0c0000 {
 142                 reg = <0xf 0xfe0c0000 0 0x11000>;
 143
 144                 port1 {
 145                         ranges = <0 0 0xc 0x20000000 0 0x10000000>;
 146                 };
 147                 port2 {
 148                         ranges = <0 0 0xc 0x30000000 0 0x10000000>;
 149                 };
 150         };
 151
 152         localbus@ffe124000 {
 153                 reg = <0xf 0xfe124000 0 0x1000>;
 154                 ranges = <0 0 0xf 0xe8000000 0x08000000
 155                           2 0 0xf 0xffa00000 0x00040000
 156                           3 0 0xf 0xffdf0000 0x00008000>;
 157
 158                 flash@0,0 {
 159                         compatible = "cfi-flash";
 160                         reg = <0 0 0x08000000>;
 161                         bank-width = <2>;
 162                         device-width = <2>;
 163                 };
 164
 165                 nand@2,0 {
 166                         #address-cells = <1>;
 167                         #size-cells = <1>;
 168                         compatible = "fsl,elbc-fcm-nand";
 169                         reg = <0x2 0x0 0x40000>;
 170
 171                         partition@0 {
 172                                 label = "NAND U-Boot Image";
 173                                 reg = <0x0 0x02000000>;
 174                                 read-only;
 175                         };
 176
 177                         partition@2000000 {
 178                                 label = "NAND Root File System";
 179                                 reg = <0x02000000 0x10000000>;
 180                         };
 181
 182                         partition@12000000 {
 183                                 label = "NAND Compressed RFS Image";
 184                                 reg = <0x12000000 0x08000000>;
 185                         };
 186
 187                         partition@1a000000 {
 188                                 label = "NAND Linux Kernel Image";
 189                                 reg = <0x1a000000 0x04000000>;
 190                         };
 191
 192                         partition@1e000000 {
 193                                 label = "NAND DTB Image";
 194                                 reg = <0x1e000000 0x01000000>;
 195                         };
 196
 197                         partition@1f000000 {
 198                                 label = "NAND Writable User area";
 199                                 reg = <0x1f000000 0x21000000>;
 200                         };
 201                 };
 202
 203                 board-control@3,0 {
 204                         compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis";
 205                         reg = <3 0 0x100>;
 206                 };
 207         };
 208
 209         pci0: pcie@ffe200000 {
 210                 reg = <0xf 0xfe200000 0 0x1000>;
 211                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 212                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
 213                 pcie@0 {
 214                         ranges = <0x02000000 0 0xe0000000
 215                                   0x02000000 0 0xe0000000
 216                                   0 0x20000000
 217
 218                                   0x01000000 0 0x00000000
 219                                   0x01000000 0 0x00000000
 220                                   0 0x00010000>;
 221                 };
 222         };
 223
 224         pci1: pcie@ffe201000 {
 225                 reg = <0xf 0xfe201000 0 0x1000>;
 226                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
 227                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
 228                 pcie@0 {
 229                         ranges = <0x02000000 0 0xe0000000
 230                                   0x02000000 0 0xe0000000
 231                                   0 0x20000000
 232
 233                                   0x01000000 0 0x00000000
 234                                   0x01000000 0 0x00000000
 235                                   0 0x00010000>;
 236                 };
 237         };
 238 };