3 * Common boot and setup code.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/seq_file.h>
24 #include <linux/ioport.h>
25 #include <linux/console.h>
26 #include <linux/utsname.h>
27 #include <linux/tty.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/bootmem.h>
35 #include <linux/pci.h>
36 #include <linux/lockdep.h>
37 #include <linux/memblock.h>
39 #include <asm/kdump.h>
41 #include <asm/processor.h>
42 #include <asm/pgtable.h>
45 #include <asm/machdep.h>
48 #include <asm/cputable.h>
49 #include <asm/sections.h>
50 #include <asm/btext.h>
51 #include <asm/nvram.h>
52 #include <asm/setup.h>
53 #include <asm/system.h>
55 #include <asm/iommu.h>
56 #include <asm/serial.h>
57 #include <asm/cache.h>
60 #include <asm/firmware.h>
63 #include <asm/kexec.h>
64 #include <asm/mmu_context.h>
65 #include <asm/code-patching.h>
66 #include <asm/kvm_ppc.h>
71 #define DBG(fmt...) udbg_printf(fmt)
77 int __initdata spinning_secondaries
;
80 /* Pick defaults since we might want to patch instructions
81 * before we've read this from the device tree.
83 struct ppc64_caches ppc64_caches
= {
89 EXPORT_SYMBOL_GPL(ppc64_caches
);
92 * These are used in binfmt_elf.c to put aux entries on the stack
93 * for each elf executable being started.
101 static char *smt_enabled_cmdline
;
103 /* Look for ibm,smt-enabled OF option */
104 static void check_smt_enabled(void)
106 struct device_node
*dn
;
107 const char *smt_option
;
109 /* Default to enabling all threads */
110 smt_enabled_at_boot
= threads_per_core
;
112 /* Allow the command line to overrule the OF option */
113 if (smt_enabled_cmdline
) {
114 if (!strcmp(smt_enabled_cmdline
, "on"))
115 smt_enabled_at_boot
= threads_per_core
;
116 else if (!strcmp(smt_enabled_cmdline
, "off"))
117 smt_enabled_at_boot
= 0;
122 rc
= strict_strtol(smt_enabled_cmdline
, 10, &smt
);
124 smt_enabled_at_boot
=
125 min(threads_per_core
, (int)smt
);
128 dn
= of_find_node_by_path("/options");
130 smt_option
= of_get_property(dn
, "ibm,smt-enabled",
134 if (!strcmp(smt_option
, "on"))
135 smt_enabled_at_boot
= threads_per_core
;
136 else if (!strcmp(smt_option
, "off"))
137 smt_enabled_at_boot
= 0;
145 /* Look for smt-enabled= cmdline option */
146 static int __init
early_smt_enabled(char *p
)
148 smt_enabled_cmdline
= p
;
151 early_param("smt-enabled", early_smt_enabled
);
154 #define check_smt_enabled()
155 #endif /* CONFIG_SMP */
158 * Early initialization entry point. This is called by head.S
159 * with MMU translation disabled. We rely on the "feature" of
160 * the CPU that ignores the top 2 bits of the address in real
161 * mode so we can access kernel globals normally provided we
162 * only toy with things in the RMO region. From here, we do
163 * some early parsing of the device-tree to setup out MEMBLOCK
164 * data structures, and allocate & initialize the hash table
165 * and segment tables so we can start running with translation
168 * It is this function which will call the probe() callback of
169 * the various platform types and copy the matching one to the
170 * global ppc_md structure. Your platform can eventually do
171 * some very early initializations from the probe() routine, but
172 * this is not recommended, be very careful as, for example, the
173 * device-tree is not accessible via normal means at this point.
176 void __init
early_setup(unsigned long dt_ptr
)
178 /* -------- printk is _NOT_ safe to use here ! ------- */
180 /* Identify CPU type */
181 identify_cpu(0, mfspr(SPRN_PVR
));
183 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
184 initialise_paca(&boot_paca
, 0);
185 setup_paca(&boot_paca
);
187 /* Initialize lockdep early or else spinlocks will blow */
190 /* -------- printk is now safe to use ------- */
192 /* Enable early debugging if any specified (see udbg.h) */
195 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr
);
198 * Do early initialization using the flattened device
199 * tree, such as retrieving the physical memory map or
200 * calculating/retrieving the hash table size.
202 early_init_devtree(__va(dt_ptr
));
204 /* Now we know the logical id of our boot cpu, setup the paca. */
205 setup_paca(&paca
[boot_cpuid
]);
207 /* Fix up paca fields required for the boot cpu */
208 get_paca()->cpu_start
= 1;
210 /* Probe the machine type */
213 setup_kdump_trampoline();
215 DBG("Found, Initializing memory management...\n");
217 /* Initialize the hash table or TLB handling */
220 DBG(" <- early_setup()\n");
224 void early_setup_secondary(void)
226 /* Mark interrupts enabled in PACA */
227 get_paca()->soft_enabled
= 0;
229 /* Initialize the hash table or TLB handling */
230 early_init_mmu_secondary();
233 #endif /* CONFIG_SMP */
235 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
236 void smp_release_cpus(void)
241 DBG(" -> smp_release_cpus()\n");
243 /* All secondary cpus are spinning on a common spinloop, release them
244 * all now so they can start to spin on their individual paca
245 * spinloops. For non SMP kernels, the secondary cpus never get out
246 * of the common spinloop.
249 ptr
= (unsigned long *)((unsigned long)&__secondary_hold_spinloop
251 *ptr
= __pa(generic_secondary_smp_init
);
253 /* And wait a bit for them to catch up */
254 for (i
= 0; i
< 100000; i
++) {
257 if (spinning_secondaries
== 0)
261 DBG("spinning_secondaries = %d\n", spinning_secondaries
);
263 DBG(" <- smp_release_cpus()\n");
265 #endif /* CONFIG_SMP || CONFIG_KEXEC */
268 * Initialize some remaining members of the ppc64_caches and systemcfg
270 * (at least until we get rid of them completely). This is mostly some
271 * cache informations about the CPU that will be used by cache flush
272 * routines and/or provided to userland
274 static void __init
initialize_cache_info(void)
276 struct device_node
*np
;
277 unsigned long num_cpus
= 0;
279 DBG(" -> initialize_cache_info()\n");
281 for_each_node_by_type(np
, "cpu") {
285 * We're assuming *all* of the CPUs have the same
286 * d-cache and i-cache sizes... -Peter
289 const u32
*sizep
, *lsizep
;
293 lsize
= cur_cpu_spec
->dcache_bsize
;
294 sizep
= of_get_property(np
, "d-cache-size", NULL
);
297 lsizep
= of_get_property(np
, "d-cache-block-size",
299 /* fallback if block size missing */
301 lsizep
= of_get_property(np
,
306 if (sizep
== 0 || lsizep
== 0)
307 DBG("Argh, can't find dcache properties ! "
308 "sizep: %p, lsizep: %p\n", sizep
, lsizep
);
310 ppc64_caches
.dsize
= size
;
311 ppc64_caches
.dline_size
= lsize
;
312 ppc64_caches
.log_dline_size
= __ilog2(lsize
);
313 ppc64_caches
.dlines_per_page
= PAGE_SIZE
/ lsize
;
316 lsize
= cur_cpu_spec
->icache_bsize
;
317 sizep
= of_get_property(np
, "i-cache-size", NULL
);
320 lsizep
= of_get_property(np
, "i-cache-block-size",
323 lsizep
= of_get_property(np
,
328 if (sizep
== 0 || lsizep
== 0)
329 DBG("Argh, can't find icache properties ! "
330 "sizep: %p, lsizep: %p\n", sizep
, lsizep
);
332 ppc64_caches
.isize
= size
;
333 ppc64_caches
.iline_size
= lsize
;
334 ppc64_caches
.log_iline_size
= __ilog2(lsize
);
335 ppc64_caches
.ilines_per_page
= PAGE_SIZE
/ lsize
;
339 DBG(" <- initialize_cache_info()\n");
344 * Do some initial setup of the system. The parameters are those which
345 * were passed in from the bootloader.
347 void __init
setup_system(void)
349 DBG(" -> setup_system()\n");
351 /* Apply the CPUs-specific and firmware specific fixups to kernel
352 * text (nop out sections not relevant to this CPU or this firmware)
354 do_feature_fixups(cur_cpu_spec
->cpu_features
,
355 &__start___ftr_fixup
, &__stop___ftr_fixup
);
356 do_feature_fixups(cur_cpu_spec
->mmu_features
,
357 &__start___mmu_ftr_fixup
, &__stop___mmu_ftr_fixup
);
358 do_feature_fixups(powerpc_firmware_features
,
359 &__start___fw_ftr_fixup
, &__stop___fw_ftr_fixup
);
360 do_lwsync_fixups(cur_cpu_spec
->cpu_features
,
361 &__start___lwsync_fixup
, &__stop___lwsync_fixup
);
365 * Unflatten the device-tree passed by prom_init or kexec
367 unflatten_device_tree();
370 * Fill the ppc64_caches & systemcfg structures with informations
371 * retrieved from the device-tree.
373 initialize_cache_info();
375 #ifdef CONFIG_PPC_RTAS
377 * Initialize RTAS if available
380 #endif /* CONFIG_PPC_RTAS */
383 * Check if we have an initrd provided via the device-tree
388 * Do some platform specific early initializations, that includes
389 * setting up the hash table pointers. It also sets up some interrupt-mapping
390 * related options that will be used by finish_device_tree()
392 if (ppc_md
.init_early
)
396 * We can discover serial ports now since the above did setup the
397 * hash table management for us, thus ioremap works. We do that early
398 * so that further code can be debugged
400 find_legacy_serial_ports();
403 * Register early console
405 register_early_udbg_console();
412 smp_setup_cpu_maps();
416 /* Release secondary cpus out of their spinloops at 0x60 now that
417 * we can map physical -> logical CPU ids
422 printk("Starting Linux PPC64 %s\n", init_utsname()->version
);
424 printk("-----------------------------------------------------\n");
425 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size
);
426 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size());
427 if (ppc64_caches
.dline_size
!= 0x80)
428 printk("ppc64_caches.dcache_line_size = 0x%x\n",
429 ppc64_caches
.dline_size
);
430 if (ppc64_caches
.iline_size
!= 0x80)
431 printk("ppc64_caches.icache_line_size = 0x%x\n",
432 ppc64_caches
.iline_size
);
433 #ifdef CONFIG_PPC_STD_MMU_64
435 printk("htab_address = 0x%p\n", htab_address
);
436 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask
);
437 #endif /* CONFIG_PPC_STD_MMU_64 */
438 if (PHYSICAL_START
> 0)
439 printk("physical_start = 0x%llx\n",
440 (unsigned long long)PHYSICAL_START
);
441 printk("-----------------------------------------------------\n");
443 DBG(" <- setup_system()\n");
446 /* This returns the limit below which memory accesses to the linear
447 * mapping are guarnateed not to cause a TLB or SLB miss. This is
448 * used to allocate interrupt or emergency stacks for which our
449 * exception entry path doesn't deal with being interrupted.
451 static u64
safe_stack_limit(void)
453 #ifdef CONFIG_PPC_BOOK3E
454 /* Freescale BookE bolts the entire linear mapping */
455 if (mmu_has_feature(MMU_FTR_TYPE_FSL_E
))
456 return linear_map_top
;
457 /* Other BookE, we assume the first GB is bolted */
460 /* BookS, the first segment is bolted */
461 if (mmu_has_feature(MMU_FTR_1T_SEGMENT
))
462 return 1UL << SID_SHIFT_1T
;
463 return 1UL << SID_SHIFT
;
467 static void __init
irqstack_early_init(void)
469 u64 limit
= safe_stack_limit();
473 * Interrupt stacks must be in the first segment since we
474 * cannot afford to take SLB misses on them.
476 for_each_possible_cpu(i
) {
477 softirq_ctx
[i
] = (struct thread_info
*)
478 __va(memblock_alloc_base(THREAD_SIZE
,
479 THREAD_SIZE
, limit
));
480 hardirq_ctx
[i
] = (struct thread_info
*)
481 __va(memblock_alloc_base(THREAD_SIZE
,
482 THREAD_SIZE
, limit
));
486 #ifdef CONFIG_PPC_BOOK3E
487 static void __init
exc_lvl_early_init(void)
489 extern unsigned int interrupt_base_book3e
;
490 extern unsigned int exc_debug_debug_book3e
;
494 for_each_possible_cpu(i
) {
495 critirq_ctx
[i
] = (struct thread_info
*)
496 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
497 dbgirq_ctx
[i
] = (struct thread_info
*)
498 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
499 mcheckirq_ctx
[i
] = (struct thread_info
*)
500 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
503 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC
))
504 patch_branch(&interrupt_base_book3e
+ (0x040 / 4) + 1,
505 (unsigned long)&exc_debug_debug_book3e
, 0);
508 #define exc_lvl_early_init()
512 * Stack space used when we detect a bad kernel stack pointer, and
513 * early in SMP boots before relocation is enabled.
515 static void __init
emergency_stack_init(void)
521 * Emergency stacks must be under 256MB, we cannot afford to take
522 * SLB misses on them. The ABI also requires them to be 128-byte
525 * Since we use these as temporary stacks during secondary CPU
526 * bringup, we need to get at them in real mode. This means they
527 * must also be within the RMO region.
529 limit
= min(safe_stack_limit(), ppc64_rma_size
);
531 for_each_possible_cpu(i
) {
533 sp
= memblock_alloc_base(THREAD_SIZE
, THREAD_SIZE
, limit
);
535 paca
[i
].emergency_sp
= __va(sp
);
540 * Called into from start_kernel this initializes bootmem, which is used
541 * to manage page allocation until mem_init is called.
543 void __init
setup_arch(char **cmdline_p
)
545 ppc64_boot_msg(0x12, "Setup Arch");
547 *cmdline_p
= cmd_line
;
550 * Set cache line size based on type of cpu as a default.
551 * Systems with OF can look in the properties on the cpu node(s)
552 * for a possibly more accurate value.
554 dcache_bsize
= ppc64_caches
.dline_size
;
555 icache_bsize
= ppc64_caches
.iline_size
;
557 /* reboot on panic */
563 init_mm
.start_code
= (unsigned long)_stext
;
564 init_mm
.end_code
= (unsigned long) _etext
;
565 init_mm
.end_data
= (unsigned long) _edata
;
566 init_mm
.brk
= klimit
;
568 irqstack_early_init();
569 exc_lvl_early_init();
570 emergency_stack_init();
572 #ifdef CONFIG_PPC_STD_MMU_64
575 /* set up the bootmem stuff with available memory */
579 #ifdef CONFIG_DUMMY_CONSOLE
580 conswitchp
= &dummy_con
;
583 if (ppc_md
.setup_arch
)
588 /* Initialize the MMU context management stuff */
593 ppc64_boot_msg(0x15, "Setup Done");
597 /* ToDo: do something useful if ppc_md is not yet setup. */
598 #define PPC64_LINUX_FUNCTION 0x0f000000
599 #define PPC64_IPL_MESSAGE 0xc0000000
600 #define PPC64_TERM_MESSAGE 0xb0000000
602 static void ppc64_do_msg(unsigned int src
, const char *msg
)
604 if (ppc_md
.progress
) {
607 sprintf(buf
, "%08X\n", src
);
608 ppc_md
.progress(buf
, 0);
609 snprintf(buf
, 128, "%s", msg
);
610 ppc_md
.progress(buf
, 0);
614 /* Print a boot progress message. */
615 void ppc64_boot_msg(unsigned int src
, const char *msg
)
617 ppc64_do_msg(PPC64_LINUX_FUNCTION
|PPC64_IPL_MESSAGE
|src
, msg
);
618 printk("[boot]%04x %s\n", src
, msg
);
622 #define PCPU_DYN_SIZE ()
624 static void * __init
pcpu_fc_alloc(unsigned int cpu
, size_t size
, size_t align
)
626 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu
)), size
, align
,
627 __pa(MAX_DMA_ADDRESS
));
630 static void __init
pcpu_fc_free(void *ptr
, size_t size
)
632 free_bootmem(__pa(ptr
), size
);
635 static int pcpu_cpu_distance(unsigned int from
, unsigned int to
)
637 if (cpu_to_node(from
) == cpu_to_node(to
))
638 return LOCAL_DISTANCE
;
640 return REMOTE_DISTANCE
;
643 unsigned long __per_cpu_offset
[NR_CPUS
] __read_mostly
;
644 EXPORT_SYMBOL(__per_cpu_offset
);
646 void __init
setup_per_cpu_areas(void)
648 const size_t dyn_size
= PERCPU_MODULE_RESERVE
+ PERCPU_DYNAMIC_RESERVE
;
655 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need
656 * to group units. For larger mappings, use 1M atom which
657 * should be large enough to contain a number of units.
659 if (mmu_linear_psize
== MMU_PAGE_4K
)
660 atom_size
= PAGE_SIZE
;
664 rc
= pcpu_embed_first_chunk(0, dyn_size
, atom_size
, pcpu_cpu_distance
,
665 pcpu_fc_alloc
, pcpu_fc_free
);
667 panic("cannot initialize percpu area (err=%d)", rc
);
669 delta
= (unsigned long)pcpu_base_addr
- (unsigned long)__per_cpu_start
;
670 for_each_possible_cpu(cpu
) {
671 __per_cpu_offset
[cpu
] = delta
+ pcpu_unit_offsets
[cpu
];
672 paca
[cpu
].data_offset
= __per_cpu_offset
[cpu
];
678 #ifdef CONFIG_PPC_INDIRECT_IO
679 struct ppc_pci_io ppc_pci_io
;
680 EXPORT_SYMBOL(ppc_pci_io
);
681 #endif /* CONFIG_PPC_INDIRECT_IO */