1 menu "Platform support"
3 source "arch/powerpc/platforms/powernv/Kconfig"
4 source "arch/powerpc/platforms/pseries/Kconfig"
5 source "arch/powerpc/platforms/iseries/Kconfig"
6 source "arch/powerpc/platforms/chrp/Kconfig"
7 source "arch/powerpc/platforms/512x/Kconfig"
8 source "arch/powerpc/platforms/52xx/Kconfig"
9 source "arch/powerpc/platforms/powermac/Kconfig"
10 source "arch/powerpc/platforms/prep/Kconfig"
11 source "arch/powerpc/platforms/maple/Kconfig"
12 source "arch/powerpc/platforms/pasemi/Kconfig"
13 source "arch/powerpc/platforms/ps3/Kconfig"
14 source "arch/powerpc/platforms/cell/Kconfig"
15 source "arch/powerpc/platforms/8xx/Kconfig"
16 source "arch/powerpc/platforms/82xx/Kconfig"
17 source "arch/powerpc/platforms/83xx/Kconfig"
18 source "arch/powerpc/platforms/85xx/Kconfig"
19 source "arch/powerpc/platforms/86xx/Kconfig"
20 source "arch/powerpc/platforms/embedded6xx/Kconfig"
21 source "arch/powerpc/platforms/44x/Kconfig"
22 source "arch/powerpc/platforms/40x/Kconfig"
23 source "arch/powerpc/platforms/amigaone/Kconfig"
24 source "arch/powerpc/platforms/wsp/Kconfig"
27 bool "KVM Guest support"
30 This option enables various optimizations for running under the KVM
31 hypervisor. Overhead for the kernel when not running inside KVM should
34 In case of doubt, say Y
38 depends on 6xx || PPC64
40 Support for running natively on the hardware, i.e. without
41 a hypervisor. This option is not user-selectable but should
42 be selected by all platforms that need it.
44 config PPC_OF_BOOT_TRAMPOLINE
45 bool "Support booting from Open Firmware or yaboot"
46 depends on 6xx || PPC64
49 Support from booting from Open Firmware or yaboot using an
50 Open Firmware client interface. This enables the kernel to
51 communicate with open firmware to retrieve system information
52 such as the device tree.
54 In case of doubt, say Y
56 config UDBG_RTAS_CONSOLE
57 bool "RTAS based debug console"
61 config PPC_SMP_MUXED_IPI
64 Select this opton if your platform supports SMP and your
65 interrupt controller provides less than 4 interrupts to each
66 cpu. This will enable the generic code to multiplex the 4
67 messages on to one ipi.
70 bool "BEAT based debug console"
82 config PPC_EPAPR_HV_PIC
103 config RTAS_ERROR_LOGGING
108 config PPC_RTAS_DAEMON
114 bool "Proc interface to RTAS"
119 tristate "Firmware flash interface"
120 depends on PPC64 && RTAS_PROC
126 config MPIC_U3_HT_IRQS
130 config MPIC_BROKEN_REGREAD
134 This option enables a MPIC driver workaround for some chips
135 that have a bug that causes some interrupt source information
136 to not read back properly. It is safe to use on other chips as
137 well, but enabling it uses about 8KB of memory to keep copies
138 of the register contents in software.
141 depends on PPC_PSERIES || PPC_ISERIES
146 depends on PPC_PSERIES
147 bool "Support for GX bus based adapters"
149 Bus device driver for GX bus based adapters.
163 config PPC_INDIRECT_IO
167 config PPC_INDIRECT_PIO
169 select PPC_INDIRECT_IO
171 config PPC_INDIRECT_MMIO
173 select PPC_INDIRECT_IO
175 config PPC_IO_WORKAROUNDS
181 source "drivers/cpufreq/Kconfig"
183 menu "CPU Frequency drivers"
187 bool "Support for Apple PowerBooks"
188 depends on ADB_PMU && PPC32
189 select CPU_FREQ_TABLE
191 This adds support for frequency switching on Apple PowerBooks,
192 this currently includes some models of iBook & Titanium
195 config CPU_FREQ_PMAC64
196 bool "Support for some Apple G5s"
197 depends on PPC_PMAC && PPC64
198 select CPU_FREQ_TABLE
200 This adds support for frequency switching on Apple iMac G5,
201 and some of the more recent desktop G5 machines as well.
203 config PPC_PASEMI_CPUFREQ
204 bool "Support for PA Semi PWRficient"
205 depends on PPC_PASEMI
207 select CPU_FREQ_TABLE
209 This adds the support for frequency switching on PA Semi
210 PWRficient processors.
214 config PPC601_SYNC_FIX
215 bool "Workarounds for PPC601 bugs"
216 depends on 6xx && (PPC_PREP || PPC_PMAC)
218 Some versions of the PPC601 (the first PowerPC chip) have bugs which
219 mean that extra synchronization instructions are required near
220 certain instructions, typically those that make major changes to the
221 CPU state. These extra instructions reduce performance slightly.
222 If you say N here, these extra instructions will not be included,
223 resulting in a kernel which will run faster but may not run at all
224 on some systems with the PPC601 chip.
226 If in doubt, say Y here.
229 bool "On-chip CPU temperature sensor support"
232 G3 and G4 processors have an on-chip temperature sensor called the
233 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
234 temperature within 2-4 degrees Celsius. This option shows the current
235 on-die temperature in /proc/cpuinfo if the cpu supports it.
237 Unfortunately, on some chip revisions, this sensor is very inaccurate
238 and in many cases, does not work at all, so don't assume the cpu
239 temp is actually what /proc/cpuinfo says it is.
242 bool "Interrupt driven TAU driver (DANGEROUS)"
245 The TAU supports an interrupt driven mode which causes an interrupt
246 whenever the temperature goes out of range. This is the fastest way
247 to get notified the temp has exceeded a range. With this option off,
248 a timer is used to re-check the temperature periodically.
250 However, on some cpus it appears that the TAU interrupt hardware
251 is buggy and can cause a situation which would lead unexplained hard
254 Unless you are extending the TAU driver, or enjoy kernel/hardware
255 debugging, leave this option off.
258 bool "Average high and low temp"
261 The TAU hardware can compare the temperature to an upper and lower
262 bound. The default behavior is to show both the upper and lower
263 bound in /proc/cpuinfo. If the range is large, the temperature is
264 either changing a lot, or the TAU hardware is broken (likely on some
265 G4's). If the range is small (around 4 degrees), the temperature is
266 relatively stable. If you say Y here, a single temperature value,
267 halfway between the upper and lower bounds, will be reported in
270 If in doubt, say N here.
273 bool "Freescale QUICC Engine (QE) Support"
274 depends on FSL_SOC && PPC32
278 The QUICC Engine (QE) is a new generation of communications
279 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
280 Selecting this option means that you wish to build a kernel
281 for a machine with a QE coprocessor.
284 bool "QE GPIO support"
285 depends on QUICC_ENGINE
287 select ARCH_REQUIRE_GPIOLIB
289 Say Y here if you're going to use hardware that connects to the
293 bool "Enable support for the CPM2 (Communications Processor Module)"
294 depends on (FSL_SOC_BOOKE && PPC32) || 8260
297 select PPC_PCI_CHOICE
298 select ARCH_REQUIRE_GPIOLIB
301 The CPM2 (Communications Processor Module) is a coprocessor on
302 embedded CPUs made by Freescale. Selecting this option means that
303 you wish to build a kernel for a machine with a CPM2 coprocessor
304 on it (826x, 827x, 8560).
307 tristate "Axon DDR2 memory device driver"
308 depends on PPC_IBM_CELL_BLADE && BLOCK
311 It registers one block device per Axon's DDR2 memory bank found
312 on a system. Block devices are called axonram?, their major and
313 minor numbers are available in /proc/devices, /proc/partitions or
314 in /sys/block/axonram?/dev.
319 select GENERIC_ISA_DMA
321 Supports for the ULI1575 PCIe south bridge that exists on some
322 Freescale reference boards. The boards all use the ULI in pretty
332 Uses information from the OF or flattened device tree to instantiate
333 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
335 source "arch/powerpc/sysdev/bestcomm/Kconfig"
338 bool "Support for simple, memory-mapped GPIO controllers"
341 select ARCH_REQUIRE_GPIOLIB
343 Say Y here to support simple, memory-mapped GPIO controllers.
344 These are usually BCSRs used to control board's switches, LEDs,
345 chip-selects, Ethernet/USB PHY's power and various other small
346 on-board peripherals.
348 config MCU_MPC8349EMITX
349 bool "MPC8349E-mITX MCU driver"
350 depends on I2C=y && PPC_83xx
352 select ARCH_REQUIRE_GPIOLIB
354 Say Y here to enable soft power-off functionality on the Freescale
355 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
356 also register MCU GPIOs with the generic GPIO API, so you'll able
357 to use MCU pins as GPIOs.
360 bool "Xilinx PCI host bridge support"
361 depends on PCI && XILINX_VIRTEX