2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2010
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
23 * Stack layout for the system_call stack entry.
24 * The first few entries are identical to the user_regs_struct.
26 SP_PTREGS = STACK_FRAME_OVERHEAD
27 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
28 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
29 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
30 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
31 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
32 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
33 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
34 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
35 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
36 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
37 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
38 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
39 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
40 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
41 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
42 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
43 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
44 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
45 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46 SP_SVC_CODE = STACK_FRAME_OVERHEAD + __PT_SVC_CODE
47 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
49 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
50 STACK_SIZE = 1 << STACK_SHIFT
52 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
53 _TIF_MCCK_PENDING | _TIF_PER_TRAP )
54 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
57 _TIF_SYSCALL_TRACEPOINT)
58 _TIF_EXIT_SIE = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)
60 #define BASED(name) name-system_call(%r13)
63 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
64 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP
66 .insn s,0xb2800000,\newpp
70 .macro HANDLE_SIE_INTERCEPT
71 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
72 tm __TI_flags+6(%r12),_TIF_SIE>>8
74 SPP __LC_CMF_HPP # set host id
75 clc SP_PSW+8(8,%r15),BASED(.Lsie_loop)
77 clc SP_PSW+8(8,%r15),BASED(.Lsie_done)
79 mvc SP_PSW+8(8,%r15),BASED(.Lsie_loop)
84 #ifdef CONFIG_TRACE_IRQFLAGS
87 brasl %r14,trace_hardirqs_on_caller
92 brasl %r14,trace_hardirqs_off_caller
96 #define TRACE_IRQS_OFF
100 .macro LOCKDEP_SYS_EXIT
101 tm SP_PSW+1(%r15),0x01 # returning to user ?
103 brasl %r14,lockdep_sys_exit
107 #define LOCKDEP_SYS_EXIT
110 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
118 * Register usage in interrupt handlers:
119 * R9 - pointer to current task structure
120 * R13 - pointer to literal pool
121 * R14 - return register for function calls
122 * R15 - kernel stack pointer
125 .macro SAVE_ALL_SVC psworg,savearea
126 stmg %r11,%r15,\savearea
127 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
128 aghi %r15,-SP_SIZE # make room for registers & psw
129 lg %r11,__LC_LAST_BREAK
132 .macro SAVE_ALL_PGM psworg,savearea
133 stmg %r11,%r15,\savearea
134 tm \psworg+1,0x01 # test problem state bit
135 #ifdef CONFIG_CHECK_STACK
137 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
144 1: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
145 2: aghi %r15,-SP_SIZE # make room for registers & psw
146 larl %r13,system_call
147 lg %r11,__LC_LAST_BREAK
150 .macro SAVE_ALL_ASYNC psworg,savearea
151 stmg %r11,%r15,\savearea
152 larl %r13,system_call
153 lg %r11,__LC_LAST_BREAK
155 tm \psworg+1,0x01 # test problem state bit
156 jnz 1f # from user -> load kernel stack
157 clc \psworg+8(8),BASED(.Lcritical_end)
159 clc \psworg+8(8),BASED(.Lcritical_start)
161 brasl %r14,cleanup_critical
162 tm 1(%r12),0x01 # retest problem state after cleanup
164 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
166 srag %r14,%r14,STACK_SHIFT
167 #ifdef CONFIG_CHECK_STACK
169 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
175 1: lg %r15,__LC_ASYNC_STACK # load async stack
176 2: aghi %r15,-SP_SIZE # make room for registers & psw
179 .macro CREATE_STACK_FRAME savearea
180 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
181 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
182 mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack
183 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
186 .macro RESTORE_ALL psworg,sync
187 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
189 ni \psworg+1,0xfd # clear wait state bit
191 lg %r14,__LC_VDSO_PER_CPU
192 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
194 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
195 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
196 lpswe \psworg # back to caller
202 stg %r11,__TI_last_break(%r12)
207 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15)
208 ni __SF_EMPTY(%r15),0xbf
212 .section .kprobes.text, "ax"
215 * Scheduler resume function, called by switch_to
216 * gpr2 = (task_struct *) prev
217 * gpr3 = (task_struct *) next
222 lg %r4,__THREAD_info(%r2) # get thread_info of prev
223 lg %r5,__THREAD_info(%r3) # get thread_info of next
224 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
226 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
227 oi __TI_flags+7(%r5),_TIF_MCCK_PENDING # set it in next
228 0: stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
229 stg %r15,__THREAD_ksp(%r2) # store kernel stack of prev
230 lg %r15,__THREAD_ksp(%r3) # load kernel stack of next
231 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
232 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
233 stg %r3,__LC_CURRENT # store task struct of next
234 mvc __LC_CURRENT_PID+4(4,%r0),__TASK_pid(%r3) # store pid of next
235 stg %r5,__LC_THREAD_INFO # store thread info of next
236 aghi %r5,STACK_SIZE # end of kernel stack of next
237 stg %r5,__LC_KERNEL_STACK # store end of kernel stack
242 * SVC interrupt handler routine. System calls are synchronous events and
243 * are executed with interrupts enabled.
247 stpt __LC_SYNC_ENTER_TIMER
249 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
250 CREATE_STACK_FRAME __LC_SAVE_AREA
251 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
252 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
253 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC
254 oi __TI_flags+7(%r12),_TIF_SYSCALL
256 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
258 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
260 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
263 llgh %r7,SP_SVC_CODE+2(%r15)
264 slag %r7,%r7,2 # shift and test for svc 0
266 # svc 0: system call number in %r1
267 llgfr %r1,%r1 # clear high word in r1
270 sth %r1,SP_SVC_CODE+2(%r15)
271 slag %r7,%r1,2 # shift and test for svc 0
273 larl %r10,sys_call_table
275 tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ?
277 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
280 tm __TI_flags+6(%r12),_TIF_TRACE >> 8
281 mvc SP_ARGS(8,%r15),SP_R7(%r15)
282 lgf %r8,0(%r7,%r10) # load address of system call routine
284 basr %r14,%r8 # call sys_xxxx
285 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
290 tm SP_PSW+1(%r15),0x01 # returning to user ?
292 tm __TI_flags+7(%r12),_TIF_WORK_SVC
293 jnz sysc_work # there is work to do (signals etc.)
294 ni __TI_flags+7(%r12),255-_TIF_SYSCALL
296 RESTORE_ALL __LC_RETURN_PSW,1
300 # One of the work bits is on. Find out which one.
303 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
305 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
307 tm __TI_flags+7(%r12),_TIF_SIGPENDING
309 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
310 jo sysc_notify_resume
311 tm __TI_flags+7(%r12),_TIF_PER_TRAP
313 j sysc_return # beware of critical section cleanup
316 # _TIF_NEED_RESCHED is set, call schedule
319 larl %r14,sysc_return
320 jg schedule # return point is sysc_return
323 # _TIF_MCCK_PENDING is set, call handler
326 larl %r14,sysc_return
327 jg s390_handle_mcck # TIF bit will be cleared by handler
330 # _TIF_SIGPENDING is set, call do_signal
333 ni __TI_flags+7(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
334 la %r2,SP_PTREGS(%r15) # load pt_regs
335 brasl %r14,do_signal # call do_signal
336 tm __TI_flags+7(%r12),_TIF_SYSCALL
338 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
339 lghi %r7,0 # svc 0 returns -ENOSYS
340 lh %r1,SP_SVC_CODE+2(%r15) # load new svc number
342 jnl sysc_nr_ok # invalid svc number -> do svc 0
344 j sysc_nr_ok # restart svc
347 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
350 la %r2,SP_PTREGS(%r15) # load pt_regs
351 larl %r14,sysc_return
352 jg do_notify_resume # call do_notify_resume
355 # _TIF_PER_TRAP is set, call do_per_trap
358 ni __TI_flags+7(%r12),255-(_TIF_SYSCALL | _TIF_PER_TRAP)
359 la %r2,SP_PTREGS(%r15) # address of register-save area
360 larl %r14,sysc_return # load adr. of system return
364 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
365 # and after the system call
368 la %r2,SP_PTREGS(%r15) # load pt_regs
370 llgh %r0,SP_SVC_CODE+2(%r15)
372 brasl %r14,do_syscall_trace_enter
376 sllg %r7,%r2,2 # svc number *4
379 lmg %r3,%r6,SP_R3(%r15)
380 mvc SP_ARGS(8,%r15),SP_R7(%r15)
381 lg %r2,SP_ORIG_R2(%r15)
382 basr %r14,%r8 # call sys_xxx
383 stg %r2,SP_R2(%r15) # store return value
385 tm __TI_flags+6(%r12),_TIF_TRACE >> 8
387 la %r2,SP_PTREGS(%r15) # load pt_regs
388 larl %r14,sysc_return # return point is sysc_return
389 jg do_syscall_trace_exit
392 # a new process exits the kernel with ret_from_fork
395 lg %r13,__LC_SVC_NEW_PSW+8
396 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
397 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
399 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
400 0: brasl %r14,schedule_tail
402 stosm 24(%r15),0x03 # reenable interrupts
406 # kernel_execve function needs to deal with pt_regs that is not
410 stmg %r12,%r15,96(%r15)
413 stg %r14,__SF_BACKCHAIN(%r15)
414 la %r12,SP_PTREGS(%r15)
415 xc 0(__PT_SIZE,%r12),0(%r12)
421 lmg %r12,%r15,96(%r15)
424 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
425 lg %r15,__LC_KERNEL_STACK # load ksp
426 aghi %r15,-SP_SIZE # make room for registers & psw
427 lg %r13,__LC_SVC_NEW_PSW+8
428 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
429 lg %r12,__LC_THREAD_INFO
430 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
431 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
432 brasl %r14,execve_tail
436 * Program check handler routine
439 ENTRY(pgm_check_handler)
441 * First we need to check for a special case:
442 * Single stepping an instruction that disables the PER event mask will
443 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
444 * For a single stepped SVC the program check handler gets control after
445 * the SVC new PSW has been loaded. But we want to execute the SVC first and
446 * then handle the PER event. Therefore we update the SVC old PSW to point
447 * to the pgm_check_handler and branch to the SVC handler after we checked
448 * if we have to load the kernel stack register.
449 * For every other possible cause for PER event without the PER mask set
450 * we just ignore the PER event (FIXME: is there anything we have to do
453 stpt __LC_SYNC_ENTER_TIMER
454 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
455 jnz pgm_per # got per exception -> special case
456 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
457 CREATE_STACK_FRAME __LC_SAVE_AREA
458 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
459 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
461 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
463 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
464 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
465 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
468 stg %r11,SP_ARGS(%r15)
469 lgf %r3,__LC_PGM_ILC # load program interruption code
470 lg %r4,__LC_TRANS_EXC_CODE
475 larl %r1,pgm_check_table
476 lg %r1,0(%r8,%r1) # load address of handler routine
477 la %r2,SP_PTREGS(%r15) # address of register-save area
478 basr %r14,%r1 # branch to interrupt-handler
483 # handle per exception
486 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
487 jnz pgm_per_std # ok, normal per event from user space
488 # ok its one of the special cases, now we need to find out which one
489 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
491 # no interesting special case, ignore PER event
492 lpswe __LC_PGM_OLD_PSW
495 # Normal per exception
498 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
499 CREATE_STACK_FRAME __LC_SAVE_AREA
500 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
501 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
503 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
505 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
506 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
507 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
510 lg %r1,__TI_task(%r12)
511 tm SP_PSW+1(%r15),0x01 # kernel per event ?
513 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE
514 mvc __THREAD_per_address(8,%r1),__LC_PER_ADDRESS
515 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID
516 oi __TI_flags+7(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP
517 lgf %r3,__LC_PGM_ILC # load program interruption code
518 lg %r4,__LC_TRANS_EXC_CODE
521 ngr %r8,%r3 # clear per-event-bit and ilc
524 larl %r1,pgm_check_table
525 lg %r1,0(%r8,%r1) # load address of handler routine
526 la %r2,SP_PTREGS(%r15) # address of register-save area
527 basr %r14,%r1 # branch to interrupt-handler
532 # it was a single stepped SVC that is causing all the trouble
535 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
536 CREATE_STACK_FRAME __LC_SAVE_AREA
537 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
538 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
539 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC
540 oi __TI_flags+7(%r12),(_TIF_SYSCALL | _TIF_PER_TRAP)
541 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
542 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
543 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
545 lg %r8,__TI_task(%r12)
546 mvc __THREAD_per_cause(2,%r8),__LC_PER_CAUSE
547 mvc __THREAD_per_address(8,%r8),__LC_PER_ADDRESS
548 mvc __THREAD_per_paid(1,%r8),__LC_PER_PAID
549 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
550 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
554 # per was called from kernel, must be kprobes
558 la %r2,SP_PTREGS(%r15) # address of register-save area
559 brasl %r14,do_per_trap
563 * IO interrupt handler routine
565 ENTRY(io_int_handler)
567 stpt __LC_ASYNC_ENTER_TIMER
568 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40
569 CREATE_STACK_FRAME __LC_SAVE_AREA+40
570 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
571 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
573 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
575 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
576 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
577 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
581 la %r2,SP_PTREGS(%r15) # address of register-save area
582 brasl %r14,do_IRQ # call standard irq handler
587 tm __TI_flags+7(%r12),_TIF_WORK_INT
588 jnz io_work # there is work to do (signals etc.)
590 RESTORE_ALL __LC_RETURN_PSW,0
594 # There is work todo, find out in which context we have been interrupted:
595 # 1) if we return to user space we can do all _TIF_WORK_INT work
596 # 2) if we return to kernel code and kvm is enabled check if we need to
597 # modify the psw to leave SIE
598 # 3) if we return to kernel code and preemptive scheduling is enabled check
599 # the preemption counter and if it is zero call preempt_schedule_irq
600 # Before any work can be done, a switch to the kernel stack is required.
603 tm SP_PSW+1(%r15),0x01 # returning to user ?
604 jo io_work_user # yes -> do resched & signal
605 #ifdef CONFIG_PREEMPT
606 # check for preemptive scheduling
607 icm %r0,15,__TI_precount(%r12)
608 jnz io_restore # preemption is disabled
609 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
611 # switch to kernel stack
614 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
615 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
617 # TRACE_IRQS_ON already done at io_return, call
618 # TRACE_IRQS_OFF to keep things symmetrical
620 brasl %r14,preempt_schedule_irq
627 # Need to do work before returning to userspace, switch to kernel stack
630 lg %r1,__LC_KERNEL_STACK
632 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
633 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
637 # One of the work bits is on. Find out which one.
638 # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
639 # and _TIF_MCCK_PENDING
642 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
644 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
646 tm __TI_flags+7(%r12),_TIF_SIGPENDING
648 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
650 j io_return # beware of critical section cleanup
653 # _TIF_MCCK_PENDING is set, call handler
656 # TRACE_IRQS_ON already done at io_return
657 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
662 # _TIF_NEED_RESCHED is set, call schedule
665 # TRACE_IRQS_ON already done at io_return
666 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
667 brasl %r14,schedule # call scheduler
668 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
673 # _TIF_SIGPENDING or is set, call do_signal
676 # TRACE_IRQS_ON already done at io_return
677 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
678 la %r2,SP_PTREGS(%r15) # load pt_regs
679 brasl %r14,do_signal # call do_signal
680 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
685 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
688 # TRACE_IRQS_ON already done at io_return
689 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
690 la %r2,SP_PTREGS(%r15) # load pt_regs
691 brasl %r14,do_notify_resume # call do_notify_resume
692 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
697 * External interrupt handler routine
699 ENTRY(ext_int_handler)
701 stpt __LC_ASYNC_ENTER_TIMER
702 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40
703 CREATE_STACK_FRAME __LC_SAVE_AREA+40
704 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
705 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
707 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
709 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
710 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
711 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
716 la %r2,SP_PTREGS(%r15) # address of register-save area
717 llgf %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
718 llgf %r4,__LC_EXT_PARAMS # get external parameter
719 lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter
726 * Machine check handler routines
728 ENTRY(mcck_int_handler)
730 la %r1,4095 # revalidate r1
731 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
732 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
733 stmg %r11,%r15,__LC_SAVE_AREA+80
734 larl %r13,system_call
735 lg %r11,__LC_LAST_BREAK
736 la %r12,__LC_MCK_OLD_PSW
737 tm __LC_MCCK_CODE,0x80 # system damage?
738 jo mcck_int_main # yes -> rest of mcck code invalid
740 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
741 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
743 la %r14,__LC_SYNC_ENTER_TIMER
744 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
746 la %r14,__LC_ASYNC_ENTER_TIMER
747 0: clc 0(8,%r14),__LC_EXIT_TIMER
749 la %r14,__LC_EXIT_TIMER
750 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
752 la %r14,__LC_LAST_UPDATE_TIMER
754 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
755 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
756 jno mcck_int_main # no -> skip cleanup critical
757 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
758 jnz mcck_int_main # from user -> load kernel stack
759 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
761 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
763 brasl %r14,cleanup_critical
765 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
767 srag %r14,%r14,PAGE_SHIFT
769 lg %r15,__LC_PANIC_STACK # load panic stack
770 0: aghi %r15,-SP_SIZE # make room for registers & psw
771 CREATE_STACK_FRAME __LC_SAVE_AREA+80
772 mvc SP_PSW(16,%r15),0(%r12)
773 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
774 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
775 jno mcck_no_vtime # no -> no timer update
777 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
779 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
780 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
781 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
784 la %r2,SP_PTREGS(%r15) # load pt_regs
785 brasl %r14,s390_do_machine_check
786 tm SP_PSW+1(%r15),0x01 # returning to user ?
788 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
790 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
791 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
793 stosm __SF_EMPTY(%r15),0x04 # turn dat on
794 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
797 brasl %r14,s390_handle_mcck
800 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
801 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
802 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
803 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
806 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
810 * Restart interruption handler, kick starter for additional CPUs
814 ENTRY(restart_int_handler)
817 spt restart_vtime-restart_base(%r1)
818 stck __LC_LAST_UPDATE_CLOCK
819 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
820 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
821 lg %r15,__LC_SAVE_AREA+120 # load ksp
822 lghi %r10,__LC_CREGS_SAVE_AREA
823 lctlg %c0,%c15,0(%r10) # get new ctl regs
824 lghi %r10,__LC_AREGS_SAVE_AREA
826 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
827 lg %r1,__LC_THREAD_INFO
828 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
829 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
830 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
831 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
832 brasl %r14,start_secondary
835 .long 0x7fffffff,0xffffffff
839 * If we do not run with SMP enabled, let the new CPU crash ...
841 ENTRY(restart_int_handler)
844 lpswe restart_crash-restart_base(%r1)
847 .long 0x000a0000,0x00000000,0x00000000,0x00000000
852 # PSW restart interrupt handler
854 ENTRY(psw_restart_int_handler)
855 stg %r15,__LC_SAVE_AREA+120(%r0) # save r15
856 larl %r15,restart_stack # load restart stack
858 aghi %r15,-SP_SIZE # make room for pt_regs
859 stmg %r0,%r14,SP_R0(%r15) # store gprs %r0-%r14 to stack
860 mvc SP_R15(8,%r15),__LC_SAVE_AREA+120(%r0)# store saved %r15 to stack
861 mvc SP_PSW(16,%r15),__LC_RST_OLD_PSW(%r0)# store restart old psw
862 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0
863 brasl %r14,do_restart
865 larl %r14,restart_psw_crash # load disabled wait PSW if
866 lpswe 0(%r14) # do_restart returns
869 .quad 0x0002000080000000,0x0000000000000000 + restart_psw_crash
871 .section .kprobes.text, "ax"
873 #ifdef CONFIG_CHECK_STACK
875 * The synchronous or the asynchronous stack overflowed. We are dead.
876 * No need to properly save the registers, we are going to panic anyway.
877 * Setup a pt_regs so that show_trace can provide a good call trace.
880 lg %r15,__LC_PANIC_STACK # change to panic stack
882 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
883 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
884 la %r1,__LC_SAVE_AREA
885 chi %r12,__LC_SVC_OLD_PSW
887 chi %r12,__LC_PGM_OLD_PSW
889 la %r1,__LC_SAVE_AREA+40
890 0: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack
891 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
892 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
893 la %r2,SP_PTREGS(%r15) # load pt_regs
894 jg kernel_stack_overflow
897 cleanup_table_system_call:
898 .quad system_call, sysc_do_svc
899 cleanup_table_sysc_tif:
900 .quad sysc_tif, sysc_restore
901 cleanup_table_sysc_restore:
902 .quad sysc_restore, sysc_done
903 cleanup_table_io_tif:
904 .quad io_tif, io_restore
905 cleanup_table_io_restore:
906 .quad io_restore, io_done
909 clc 8(8,%r12),BASED(cleanup_table_system_call)
911 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
912 jl cleanup_system_call
914 clc 8(8,%r12),BASED(cleanup_table_sysc_tif)
916 clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8)
919 clc 8(8,%r12),BASED(cleanup_table_sysc_restore)
921 clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8)
922 jl cleanup_sysc_restore
924 clc 8(8,%r12),BASED(cleanup_table_io_tif)
926 clc 8(8,%r12),BASED(cleanup_table_io_tif+8)
929 clc 8(8,%r12),BASED(cleanup_table_io_restore)
931 clc 8(8,%r12),BASED(cleanup_table_io_restore+8)
932 jl cleanup_io_restore
937 mvc __LC_RETURN_PSW(16),0(%r12)
938 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
940 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
941 cghi %r12,__LC_MCK_OLD_PSW
943 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
944 0: cghi %r12,__LC_MCK_OLD_PSW
945 la %r12,__LC_SAVE_AREA+80
947 la %r12,__LC_SAVE_AREA+40
948 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
950 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
952 mvc __LC_SAVE_AREA(40),0(%r12)
953 0: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
954 aghi %r15,-SP_SIZE # make room for registers & psw
957 CREATE_STACK_FRAME __LC_SAVE_AREA
958 mvc 8(8,%r12),__LC_THREAD_INFO
959 lg %r12,__LC_THREAD_INFO
960 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
961 mvc SP_SVC_CODE(4,%r15),__LC_SVC_ILC
962 oi __TI_flags+7(%r12),_TIF_SYSCALL
964 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
966 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
968 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
970 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
972 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
974 lg %r12,__LC_THREAD_INFO
976 stg %r11,__TI_last_break(%r12)
977 0: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
978 la %r12,__LC_RETURN_PSW
980 cleanup_system_call_insn:
988 mvc __LC_RETURN_PSW(8),0(%r12)
989 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif)
990 la %r12,__LC_RETURN_PSW
993 cleanup_sysc_restore:
994 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn)
996 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8)
998 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
999 cghi %r12,__LC_MCK_OLD_PSW
1001 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1002 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1003 cghi %r12,__LC_MCK_OLD_PSW
1004 la %r12,__LC_SAVE_AREA+80
1006 la %r12,__LC_SAVE_AREA+40
1007 1: mvc 0(40,%r12),SP_R11(%r15)
1008 lmg %r0,%r10,SP_R0(%r15)
1009 lg %r15,SP_R15(%r15)
1010 2: la %r12,__LC_RETURN_PSW
1012 cleanup_sysc_restore_insn:
1014 .quad sysc_done - 16
1017 mvc __LC_RETURN_PSW(8),0(%r12)
1018 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif)
1019 la %r12,__LC_RETURN_PSW
1023 clc 8(8,%r12),BASED(cleanup_io_restore_insn)
1025 clc 8(8,%r12),BASED(cleanup_io_restore_insn+8)
1027 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1028 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1029 mvc __LC_SAVE_AREA+80(40),SP_R11(%r15)
1030 lmg %r0,%r10,SP_R0(%r15)
1031 lg %r15,SP_R15(%r15)
1032 1: la %r12,__LC_RETURN_PSW
1034 cleanup_io_restore_insn:
1043 .quad __critical_start
1045 .quad __critical_end
1047 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
1049 * sie64a calling convention:
1050 * %r2 pointer to sie control block
1051 * %r3 guest register save area
1054 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
1055 stg %r2,__SF_EMPTY(%r15) # save control block pointer
1056 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
1057 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
1058 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1059 oi __TI_flags+6(%r14),_TIF_SIE>>8
1061 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1062 tm __TI_flags+7(%r14),_TIF_EXIT_SIE
1064 lg %r14,__LC_GMAP # get gmap pointer
1067 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
1069 lg %r14,__SF_EMPTY(%r15) # get control block pointer
1070 SPP __SF_EMPTY(%r15) # set guest id
1073 SPP __LC_CMF_HPP # set host id
1074 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1076 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1077 ni __TI_flags+6(%r14),255-(_TIF_SIE>>8)
1078 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
1079 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
1080 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
1084 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1085 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1086 ni __TI_flags+6(%r14),255-(_TIF_SIE>>8)
1087 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
1088 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
1089 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
1099 .section __ex_table,"a"
1100 .quad sie_loop,sie_fault
1104 .section .rodata, "a"
1105 #define SYSCALL(esa,esame,emu) .long esame
1106 .globl sys_call_table
1108 #include "syscalls.S"
1111 #ifdef CONFIG_COMPAT
1113 #define SYSCALL(esa,esame,emu) .long emu
1115 #include "syscalls.S"