sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / arm / cpu-enable-method / al,alpine-smp
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1 ========================================================
2 Secondary CPU enable-method "al,alpine-smp" binding
3 ========================================================
5 This document describes the "al,alpine-smp" method for
6 enabling secondary CPUs. To apply to all CPUs, a single
7 "al,alpine-smp" enable method should be defined in the
8 "cpus" node.
10 Enable method name:     "al,alpine-smp"
11 Compatible machines:    "al,alpine"
12 Compatible CPUs:        "arm,cortex-a15"
13 Related properties:     (none)
15 Note:
16 This enable method requires valid nodes compatible with
17 "al,alpine-cpu-resume" and "al,alpine-nb-service"[1].
19 Example:
21 cpus {
22         #address-cells = <1>;
23         #size-cells = <0>;
24         enable-method = "al,alpine-smp";
26         cpu@0 {
27                 compatible = "arm,cortex-a15";
28                 device_type = "cpu";
29                 reg = <0>;
30         };
32         cpu@1 {
33                 compatible = "arm,cortex-a15";
34                 device_type = "cpu";
35                 reg = <1>;
36         };
38         cpu@2 {
39                 compatible = "arm,cortex-a15";
40                 device_type = "cpu";
41                 reg = <2>;
42         };
44         cpu@3 {
45                 compatible = "arm,cortex-a15";
46                 device_type = "cpu";
47                 reg = <3>;
48         };
52 [1] arm/al,alpine.txt