sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / arm / cpu-enable-method / marvell,berlin-smp
blobcd236b727e2a12b0339c56998136302fce2daddb
1 ========================================================
2 Secondary CPU enable-method "marvell,berlin-smp" binding
3 ========================================================
5 This document describes the "marvell,berlin-smp" method for enabling secondary
6 CPUs. To apply to all CPUs, a single "marvell,berlin-smp" enable method should
7 be defined in the "cpus" node.
9 Enable method name:     "marvell,berlin-smp"
10 Compatible machines:    "marvell,berlin2" and "marvell,berlin2q"
11 Compatible CPUs:        "marvell,pj4b" and "arm,cortex-a9"
12 Related properties:     (none)
14 Note:
15 This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
16 "marvell,berlin-cpu-ctrl"[1].
18 Example:
20         cpus {
21                 #address-cells = <1>;
22                 #size-cells = <0>;
23                 enable-method = "marvell,berlin-smp";
25                 cpu@0 {
26                         compatible = "marvell,pj4b";
27                         device_type = "cpu";
28                         next-level-cache = <&l2>;
29                         reg = <0>;
30                 };
32                 cpu@1 {
33                         compatible = "marvell,pj4b";
34                         device_type = "cpu";
35                         next-level-cache = <&l2>;
36                         reg = <1>;
37                 };
38         };
41 [1] arm/marvell,berlin.txt