1 Marvell Armada AP806 System Controller
2 ======================================
4 The AP806 is one of the two core HW blocks of the Marvell Armada 7K/8K
5 SoCs. It contains a system controller, which provides a number
6 registers giving access to numerous features: clocks, pin-muxing and
7 many other SoC configuration items. This DT binding allows to describe
8 this system controller.
10 The Device Tree node representing the AP806 system controller provides
13 - 0: clock of CPU cluster 0
14 - 1: clock of CPU cluster 1
15 - 2: fixed PLL at 1200 Mhz
16 - 3: MSS clock, derived from the fixed PLL
20 - compatible: must be:
21 "marvell,ap806-system-controller", "syscon"
22 - reg: register area of the AP806 system controller
23 - #clock-cells: must be set to 1
24 - clock-output-names: must be defined to:
25 "ap-cpu-cluster-0", "ap-cpu-cluster-1", "ap-fixed", "ap-mss"
29 syscon: system-controller@6f4000 {
30 compatible = "marvell,ap806-system-controller", "syscon";
32 clock-output-names = "ap-cpu-cluster-0", "ap-cpu-cluster-1",
34 reg = <0x6f4000 0x1000>;