sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / arm / mediatek / mediatek,apmixedsys.txt
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1 Mediatek apmixedsys controller
2 ==============================
4 The Mediatek apmixedsys controller provides the PLLs to the system.
6 Required Properties:
8 - compatible: Should be one of:
9         - "mediatek,mt2701-apmixedsys"
10         - "mediatek,mt8135-apmixedsys"
11         - "mediatek,mt8173-apmixedsys"
12 - #clock-cells: Must be 1
14 The apmixedsys controller uses the common clk binding from
15 Documentation/devicetree/bindings/clock/clock-bindings.txt
16 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
18 Example:
20 apmixedsys: clock-controller@10209000 {
21         compatible = "mediatek,mt8173-apmixedsys";
22         reg = <0 0x10209000 0 0x1000>;
23         #clock-cells = <1>;