sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / arm / mediatek / mediatek,pericfg.txt
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1 Mediatek pericfg controller
2 ===========================
4 The Mediatek pericfg controller provides various clocks and reset
5 outputs to the system.
7 Required Properties:
9 - compatible: Should be one of:
10         - "mediatek,mt2701-pericfg", "syscon"
11         - "mediatek,mt8135-pericfg", "syscon"
12         - "mediatek,mt8173-pericfg", "syscon"
13 - #clock-cells: Must be 1
14 - #reset-cells: Must be 1
16 The pericfg controller uses the common clk binding from
17 Documentation/devicetree/bindings/clock/clock-bindings.txt
18 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
19 Also it uses the common reset controller binding from
20 Documentation/devicetree/bindings/reset/reset.txt.
21 The available reset outputs are defined in
22 dt-bindings/reset/mt*-resets.h
24 Example:
26 pericfg: power-controller@10003000 {
27         compatible = "mediatek,mt8173-pericfg", "syscon";
28         reg = <0 0x10003000 0 0x1000>;
29         #clock-cells = <1>;
30         #reset-cells = <1>;