sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / cpufreq / cpufreq-spear.txt
blobf3d44984d91ce63f1d35f1824eef52cdefb42b7b
1 SPEAr cpufreq driver
2 -------------------
4 SPEAr SoC cpufreq driver for CPU frequency scaling.
5 It supports both uniprocessor (UP) and symmetric multiprocessor (SMP) systems
6 which share clock across all CPUs.
8 Required properties:
9 - cpufreq_tbl: Table of frequencies CPU could be transitioned into, in the
10   increasing order.
12 Optional properties:
13 - clock-latency: Specify the possible maximum transition latency for clock, in
14   unit of nanoseconds.
16 Both required and optional properties listed above must be defined under node
17 /cpus/cpu@0.
19 Examples:
20 --------
21 cpus {
23         <...>
25         cpu@0 {
26                 compatible = "arm,cortex-a9";
27                 reg = <0>;
29                 <...>
31                 cpufreq_tbl = < 166000
32                                 200000
33                                 250000
34                                 300000
35                                 400000
36                                 500000
37                                 600000 >;
38         };
40         <...>