sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / display / hisilicon / dw-dsi.txt
blobd270bfe4e4e072d49459660fee4381648186a6e3
1 Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
3 A DSI Host Controller resides in the middle of display controller and external
4 HDMI converter or panel.
6 Required properties:
7 - compatible: value should be "hisilicon,hi6220-dsi".
8 - reg: physical base address and length of dsi controller's registers.
9 - clocks: contains APB clock phandle + clock-specifier pair.
10 - clock-names: should be "pclk".
11 - ports: contains DSI controller input and output sub port.
12   The input port connects to ADE output port with the reg value "0".
13   The output port with the reg value "1", it could connect to panel or
14   any other bridge endpoints.
15   See Documentation/devicetree/bindings/graph.txt for more device graph info.
17 A example of HiKey board hi6220 SoC and board specific DT entry:
18 Example:
20 SoC specific:
21         dsi: dsi@f4107800 {
22                 compatible = "hisilicon,hi6220-dsi";
23                 reg = <0x0 0xf4107800 0x0 0x100>;
24                 clocks = <&media_ctrl  HI6220_DSI_PCLK>;
25                 clock-names = "pclk";
26                 status = "disabled";
28                 ports {
29                         #address-cells = <1>;
30                         #size-cells = <0>;
32                         /* 0 for input port */
33                         port@0 {
34                                 reg = <0>;
35                                 dsi_in: endpoint {
36                                         remote-endpoint = <&ade_out>;
37                                 };
38                         };
39                 };
40         };
43 Board specific:
44         &dsi {
45                 status = "ok";
47                 ports {
48                         /* 1 for output port */
49                         port@1 {
50                                 reg = <1>;
52                                 dsi_out0: endpoint@0 {
53                                         remote-endpoint = <&adv7533_in>;
54                                 };
55                         };
56                 };
57         };
59         &i2c2 {
60                 ...
62                 adv7533: adv7533@39 {
63                         ...
65                         port {
66                                 adv7533_in: endpoint {
67                                         remote-endpoint = <&dsi_out0>;
68                                 };
69                         };
70                 };
71         };