Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt

   1 device-tree bindings for rockchip soc display controller (vop)
   2
   3 VOP (Visual Output Processor) is the Display Controller for the Rockchip
   4 series of SoCs which transfers the image data from a video memory
   5 buffer to an external LCD interface.
   6
   7 Required properties:
   8 - compatible: value should be one of the following
   9                 "rockchip,rk3036-vop";
  10                 "rockchip,rk3288-vop";
  11                 "rockchip,rk3399-vop-big";
  12                 "rockchip,rk3399-vop-lit";
  13
  14 - interrupts: should contain a list of all VOP IP block interrupts in the
  15                  order: VSYNC, LCD_SYSTEM. The interrupt specifier
  16                  format depends on the interrupt controller used.
  17
  18 - clocks: must include clock specifiers corresponding to entries in the
  19                 clock-names property.
  20
  21 - clock-names: Must contain
  22                 aclk_vop: for ddr buffer transfer.
  23                 hclk_vop: for ahb bus to R/W the phy regs.
  24                 dclk_vop: pixel clock.
  25
  26 - resets: Must contain an entry for each entry in reset-names.
  27   See ../reset/reset.txt for details.
  28 - reset-names: Must include the following entries:
  29   - axi
  30   - ahb
  31   - dclk
  32
  33 - iommus: required a iommu node
  34
  35 - port: A port node with endpoint definitions as defined in
  36   Documentation/devicetree/bindings/media/video-interfaces.txt.
  37
  38 Example:
  39 SoC specific DT entry:
  40         vopb: vopb@ff930000 {
  41                 compatible = "rockchip,rk3288-vop";
  42                 reg = <0xff930000 0x19c>;
  43                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
  44                 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
  45                 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
  46                 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
  47                 reset-names = "axi", "ahb", "dclk";
  48                 iommus = <&vopb_mmu>;
  49                 vopb_out: port {
  50                         #address-cells = <1>;
  51                         #size-cells = <0>;
  52                         vopb_out_edp: endpoint@0 {
  53                                 reg = <0>;
  54                                 remote-endpoint=<&edp_in_vopb>;
  55                         };
  56                         vopb_out_hdmi: endpoint@1 {
  57                                 reg = <1>;
  58                                 remote-endpoint=<&hdmi_in_vopb>;
  59                         };
  60                 };
  61         };