sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / display / ti / ti,omap-dss.txt
blobe1ef29569338f32d0934f7d560eb881709e67a2e
1 Texas Instruments OMAP Display Subsystem
2 ========================================
4 Generic Description
5 -------------------
7 This document is a generic description of the OMAP Display Subsystem bindings.
8 Binding details for each OMAP SoC version are described in respective binding
9 documentation.
11 The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
12 a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
13 the encoder modules vary.
15 The DSS Core is the parent of the other DSS modules, and manages clock routing,
16 integration to the SoC, etc.
18 DISPC is the display controller, which reads pixels from the memory and outputs
19 a RGB pixel stream to encoders.
21 The encoder modules encode the received RGB pixel stream to a video output like
22 HDMI, MIPI DPI, etc.
24 Video Ports
25 -----------
27 The DSS Core and the encoders have video port outputs. The structure of the
28 video ports is described in Documentation/devicetree/bindings/graph.txt,
29 and the properties for the ports and endpoints for each encoder are
30 described in the SoC's DSS binding documentation.
32 The video ports are used to describe the connections to external hardware, like
33 panels or external encoders.
35 Aliases
36 -------
38 The board dts file may define aliases for displays to assign "displayX" style
39 name for each display. If no aliases are defined, a semi-random number is used
40 for the display.
42 Example
43 -------
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
46 removed, defined in omap4.dtsi:
48 dss: dss@58000000 {
49         compatible = "ti,omap4-dss";
50         reg = <0x58000000 0x80>;
51         status = "disabled";
52         ti,hwmods = "dss_core";
53         clocks = <&dss_dss_clk>;
54         clock-names = "fck";
55         #address-cells = <1>;
56         #size-cells = <1>;
57         ranges;
59         dispc@58001000 {
60                 compatible = "ti,omap4-dispc";
61                 reg = <0x58001000 0x1000>;
62                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
63                 ti,hwmods = "dss_dispc";
64                 clocks = <&dss_dss_clk>;
65                 clock-names = "fck";
66         };
68         hdmi: encoder@58006000 {
69                 compatible = "ti,omap4-hdmi";
70                 reg = <0x58006000 0x200>,
71                       <0x58006200 0x100>,
72                       <0x58006300 0x100>,
73                       <0x58006400 0x1000>;
74                 reg-names = "wp", "pll", "phy", "core";
75                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
76                 status = "disabled";
77                 ti,hwmods = "dss_hdmi";
78                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
79                 clock-names = "fck", "sys_clk";
80         };
83 A shortened example of the board description for OMAP4 Panda board, defined in
84 omap4-panda.dts.
86 The Panda board has a DVI and a HDMI connector, and the board contains a TFP410
87 chip (MIPI DPI to DVI encoder) and a TPD12S015 chip (HDMI ESD protection & level
88 shifter). The video pipelines for the connectors are formed as follows:
90 DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
91 OMAP HDMI --(HDMI)--> TPD12S015 --(HDMI)--> HDMI Connector
93 / {
94         aliases {
95                 display0 = &dvi0;
96                 display1 = &hdmi0;
97         };
99         tfp410: encoder@0 {
100                 compatible = "ti,tfp410";
101                 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;     /* 0, power-down */
103                 pinctrl-names = "default";
104                 pinctrl-0 = <&tfp410_pins>;
106                 ports {
107                         #address-cells = <1>;
108                         #size-cells = <0>;
110                         port@0 {
111                                 reg = <0>;
113                                 tfp410_in: endpoint@0 {
114                                         remote-endpoint = <&dpi_out>;
115                                 };
116                         };
118                         port@1 {
119                                 reg = <1>;
121                                 tfp410_out: endpoint@0 {
122                                         remote-endpoint = <&dvi_connector_in>;
123                                 };
124                         };
125                 };
126         };
128         dvi0: connector@0 {
129                 compatible = "dvi-connector";
130                 label = "dvi";
132                 i2c-bus = <&i2c3>;
134                 port {
135                         dvi_connector_in: endpoint {
136                                 remote-endpoint = <&tfp410_out>;
137                         };
138                 };
139         };
141         tpd12s015: encoder@1 {
142                 compatible = "ti,tpd12s015";
144                 pinctrl-names = "default";
145                 pinctrl-0 = <&tpd12s015_pins>;
147                 gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>,   /* 60, CT CP HPD */
148                         <&gpio2 9 GPIO_ACTIVE_HIGH>,    /* 41, LS OE */
149                         <&gpio2 31 GPIO_ACTIVE_HIGH>;   /* 63, HPD */
151                 ports {
152                         #address-cells = <1>;
153                         #size-cells = <0>;
155                         port@0 {
156                                 reg = <0>;
158                                 tpd12s015_in: endpoint@0 {
159                                         remote-endpoint = <&hdmi_out>;
160                                 };
161                         };
163                         port@1 {
164                                 reg = <1>;
166                                 tpd12s015_out: endpoint@0 {
167                                         remote-endpoint = <&hdmi_connector_in>;
168                                 };
169                         };
170                 };
171         };
173         hdmi0: connector@1 {
174                 compatible = "hdmi-connector";
175                 label = "hdmi";
177                 port {
178                         hdmi_connector_in: endpoint {
179                                 remote-endpoint = <&tpd12s015_out>;
180                         };
181                 };
182         };
185 &dss {
186         status = "ok";
188         pinctrl-names = "default";
189         pinctrl-0 = <&dss_dpi_pins>;
191         port {
192                 dpi_out: endpoint {
193                         remote-endpoint = <&tfp410_in>;
194                         data-lines = <24>;
195                 };
196         };
199 &hdmi {
200         status = "ok";
201         vdda-supply = <&vdac>;
203         pinctrl-names = "default";
204         pinctrl-0 = <&dss_hdmi_pins>;
206         port {
207                 hdmi_out: endpoint {
208                         remote-endpoint = <&tpd12s015_in>;
209                 };
210         };