1 Allwinner A31 DMA Controller
3 This driver follows the generic DMA bindings defined in dma.txt.
7 - compatible: Must be one of
8 "allwinner,sun6i-a31-dma"
9 "allwinner,sun8i-a23-dma"
10 "allwinner,sun8i-a83t-dma"
11 "allwinner,sun8i-h3-dma"
12 - reg: Should contain the registers base address and length
13 - interrupts: Should contain a reference to the interrupt used by this device
14 - clocks: Should contain a reference to the parent AHB clock
15 - resets: Should contain a reference to the reset controller asserting
17 - #dma-cells : Should be 1, a single cell holding a line request number
20 dma: dma-controller@01c02000 {
21 compatible = "allwinner,sun6i-a31-dma";
22 reg = <0x01c02000 0x1000>;
23 interrupts = <0 50 4>;
24 clocks = <&ahb1_gates 6>;
25 resets = <&ahb1_rst 6>;
31 DMA clients connected to the A31 DMA controller must use the format
32 described in the dma.txt file, using a two-cell specifier for each
33 channel: a phandle plus one integer cells.
34 The two cells in order are:
36 1. A phandle pointing to the DMA controller.
37 2. The port ID as specified in the datasheet
41 compatible = "allwinner,sun6i-a31-spi";
42 reg = <0x01c6a000 0x1000>;
43 interrupts = <0 67 4>;
44 clocks = <&ahb1_gates 22>, <&spi2_clk>;
45 clock-names = "ahb", "mod";
46 dmas = <&dma 25>, <&dma 25>;
47 dma-names = "rx", "tx";
48 resets = <&ahb1_rst 22>;