1 Omap2/3 intc controller
3 On TI omap2 and 3 the intc interrupt controller can provide
4 96 or 128 IRQ signals to the ARM host depending on the SoC.
7 - compatible: should be one of
14 - interrupt-controller : Identifies the node as an interrupt controller
15 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
16 source, should be 1 for intc
17 - interrupts: interrupt reference to primary interrupt controller
19 Please refer to interrupts.txt in this directory for details of the common
20 Interrupt Controllers bindings used by client devices.
23 intc: interrupt-controller@48200000 {
24 compatible = "ti,omap3-intc";
26 #interrupt-cells = <1>;
27 reg = <0x48200000 0x1000>;