sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / Documentation / devicetree / bindings / mtd / spear_smi.txt
blob7248aadd89e4dff6cb1e70bad9e818e5a02764ac
1 * SPEAr SMI
3 Required properties:
4 - compatible : "st,spear600-smi"
5 - reg : Address range of the mtd chip
6 - #address-cells, #size-cells : Must be present if the device has sub-nodes
7   representing partitions.
8 - interrupt-parent: Should be the phandle for the interrupt controller
9   that services interrupts for this device
10 - interrupts: Should contain the STMMAC interrupts
11 - clock-rate : Functional clock rate of SMI in Hz
13 Optional properties:
14 - st,smi-fast-mode : Flash supports read in fast mode
16 Example:
18         smi: flash@fc000000 {
19                 compatible = "st,spear600-smi";
20                 #address-cells = <1>;
21                 #size-cells = <1>;
22                 reg = <0xfc000000 0x1000>;
23                 interrupt-parent = <&vic1>;
24                 interrupts = <12>;
25                 clock-rate = <50000000>;        /* 50MHz */
27                 flash@f8000000 {
28                         st,smi-fast-mode;
29                         ...
30                 };
31         };