Documentation/devicetree/bindings/net/dsa/qca8k.txt

   1 * Qualcomm Atheros QCA8xxx switch family
   2
   3 Required properties:
   4
   5 - compatible: should be "qca,qca8337"
   6 - #size-cells: must be 0
   7 - #address-cells: must be 1
   8
   9 Subnodes:
  10
  11 The integrated switch subnode should be specified according to the binding
  12 described in dsa/dsa.txt. As the QCA8K switches do not have a N:N mapping of
  13 port and PHY id, each subnode describing a port needs to have a valid phandle
  14 referencing the internal PHY connected to it. The CPU port of this switch is
  15 always port 0.
  16
  17 Example:
  18
  19
  20         &mdio0 {
  21                 phy_port1: phy@0 {
  22                         reg = <0>;
  23                 };
  24
  25                 phy_port2: phy@1 {
  26                         reg = <1>;
  27                 };
  28
  29                 phy_port3: phy@2 {
  30                         reg = <2>;
  31                 };
  32
  33                 phy_port4: phy@3 {
  34                         reg = <3>;
  35                 };
  36
  37                 phy_port5: phy@4 {
  38                         reg = <4>;
  39                 };
  40
  41                 switch0@0 {
  42                         compatible = "qca,qca8337";
  43                         #address-cells = <1>;
  44                         #size-cells = <0>;
  45
  46                         reg = <0>;
  47
  48                         ports {
  49                                 #address-cells = <1>;
  50                                 #size-cells = <0>;
  51                                 port@0 {
  52                                         reg = <0>;
  53                                         label = "cpu";
  54                                         ethernet = <&gmac1>;
  55                                         phy-mode = "rgmii";
  56                                 };
  57
  58                                 port@1 {
  59                                         reg = <1>;
  60                                         label = "lan1";
  61                                         phy-handle = <&phy_port1>;
  62                                 };
  63
  64                                 port@2 {
  65                                         reg = <2>;
  66                                         label = "lan2";
  67                                         phy-handle = <&phy_port2>;
  68                                 };
  69
  70                                 port@3 {
  71                                         reg = <3>;
  72                                         label = "lan3";
  73                                         phy-handle = <&phy_port3>;
  74                                 };
  75
  76                                 port@4 {
  77                                         reg = <4>;
  78                                         label = "lan4";
  79                                         phy-handle = <&phy_port4>;
  80                                 };
  81
  82                                 port@5 {
  83                                         reg = <5>;
  84                                         label = "wan";
  85                                         phy-handle = <&phy_port5>;
  86                                 };
  87                         };
  88                 };
  89         };