3 Hardware modules that control pin multiplexing or configuration parameters
4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
5 controllers. Each pin controller must be represented as a node in device tree,
6 just like any other hardware module.
8 Hardware modules whose signals are affected by pin configuration are
9 designated client devices. Again, each client device must be represented as a
10 node in device tree, just like any other hardware module.
12 For a client device to operate correctly, certain pin controllers must
13 set up certain specific pin configurations. Some client devices need a
14 single static pin configuration, e.g. set up during initialization. Others
15 need to reconfigure pins at run-time, for example to tri-state pins when the
16 device is inactive. Hence, each client device can define a set of named
17 states. The number and names of those states is defined by the client device's
20 The common pinctrl bindings defined in this file provide an infrastructure
21 for client device device tree nodes to map those state names to the pin
22 configuration used by those states.
24 Note that pin controllers themselves may also be client devices of themselves.
25 For example, a pin controller may set up its own "active" state when the
26 driver loads. This would allow representing a board's static pin configuration
27 in a single place, rather than splitting it across multiple client device
28 nodes. The decision to do this or not somewhat rests with the author of
29 individual board device tree files, and any requirements imposed by the
30 bindings for the individual client devices in use by that board, i.e. whether
31 they require certain specific named states for dynamic pin configuration.
33 == Pinctrl client devices ==
35 For each client device individually, every pin state is assigned an integer
36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique
37 property exists to define the pin configuration. Each state may also be
38 assigned a name. When names are used, another property exists to map from
39 those names to the integer IDs.
41 Each client device's own binding determines the set of states that must be
42 defined in its device tree node, and whether to define the set of state
43 IDs that must be provided, or whether to define the set of state names that
47 pinctrl-0: List of phandles, each pointing at a pin configuration
48 node. These referenced pin configuration nodes must be child
49 nodes of the pin controller that they configure. Multiple
50 entries may exist in this list so that multiple pin
51 controllers may be configured, or so that a state may be built
52 from multiple nodes for a single pin controller, each
53 contributing part of the overall configuration. See the next
54 section of this document for details of the format of these
55 pin configuration nodes.
57 In some cases, it may be useful to define a state, but for it
58 to be empty. This may be required when a common IP block is
59 used in an SoC either without a pin controller, or where the
60 pin controller does not affect the HW module in question. If
61 the binding for that IP block requires certain pin states to
62 exist, they must still be defined, but may be left empty.
65 pinctrl-1: List of phandles, each pointing at a pin configuration
66 node within a pin controller.
68 pinctrl-n: List of phandles, each pointing at a pin configuration
69 node within a pin controller.
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
71 name for integer state ID 0, list entry 1 for state ID 1, and
76 /* For a client device requiring named states */
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
83 /* For the same device if using state IDs */
85 pinctrl-0 = <&state_0_node_a>;
86 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
90 * For an IP block whose binding supports pin configuration,
91 * but in use on an SoC that doesn't have any pin control hardware
94 pinctrl-names = "active", "idle";
99 == Pin controller devices ==
100 Required properties: See the pin controller driver specific documentation
103 #pinctrl-cells: Number of pin control cells in addition to the index within the
104 pin controller device instance
106 Pin controller devices should contain the pin configuration nodes that client
112 ... /* Standard DT properties for the device itself elided */
125 The contents of each of those pin configuration child nodes is defined
126 entirely by the binding for the individual pin controller device. There
127 exists no common standard for this content. The pinctrl framework only
128 provides generic helper bindings that the pin controller driver can use.
130 The pin configuration nodes need not be direct children of the pin controller
131 device; they may be grandchildren, for example. Whether this is legal, and
132 whether there is any interaction between the child and intermediate parent
133 nodes, is again defined entirely by the binding for the individual pin
136 == Generic pin multiplexing node content ==
138 pin multiplexing nodes:
140 function - the mux function to select
141 groups - the list of groups to select with this function
142 (either this or "pins" must be specified)
143 pins - the list of pins to select with this function (either
144 this or "groups" must be specified)
151 groups = "u0rxtx", "u0rtscts";
162 pins = "mfio29", "mfio30";
165 Optionally an altenative binding can be used if more suitable depending on the
166 pin controller hardware. For hardaware where there is a large number of identical
167 pin controller instances, naming each pin and function can easily become
168 unmaintainable. This is especially the case if the same controller is used for
169 different pins and functions depending on the SoC revision and packaging.
171 For cases like this, the pin controller driver may use pinctrl-pin-array helper
172 binding with a hardware based index and a number of pin configuration values:
175 ... /* Standard DT properties for the device itself elided */
176 #pinctrl-cells = <2>;
179 pinctrl-pin-array = <
180 0 A_DELAY_PS(0) G_DELAY_PS(120)
181 4 A_DELAY_PS(0) G_DELAY_PS(360)
188 Above #pinctrl-cells specifies the number of value cells in addition to the
189 index of the registers. This is similar to the interrupts-extended binding with
190 one exception. There is no need to specify the phandle for each entry as that
191 is already known as the defined pins are always children of the pin controller
192 node. Further having the phandle pointing to another pin controller would not
193 currently work as the pinctrl framework uses named modes to group pins for each
196 The index for pinctrl-pin-array must relate to the hardware for the pinctrl
197 registers, and must not be a virtual index of pin instances. The reason for
198 this is to avoid mapping of the index in the dts files and the pin controller
199 driver as it can change.
201 == Generic pin configuration node content ==
203 Many data items that are represented in a pin configuration node are common
204 and generic. Pin control bindings should use the properties defined below
205 where they are applicable; not all of these properties are relevant or useful
206 for all hardware or binding structures. Each individual binding document
207 should state which of these generic properties, if any, are used, and the
208 structure of the DT nodes that contain these properties.
210 Supported generic properties are:
212 pins - the list of pins that properties in the node
213 apply to (either this or "group" has to be
215 group - the group to apply the properties to, if the driver
216 supports configuration of whole groups rather than
217 individual pins (either this or "pins" has to be
219 bias-disable - disable any pin bias
220 bias-high-impedance - high impedance mode ("third-state", "floating")
221 bias-bus-hold - latch weakly
222 bias-pull-up - pull up the pin
223 bias-pull-down - pull down the pin
224 bias-pull-pin-default - use pin-default pull state
225 drive-push-pull - drive actively high and low
226 drive-open-drain - drive with open drain
227 drive-open-source - drive with open source
228 drive-strength - sink or source at most X mA
229 input-enable - enable input on pin (no effect on output)
230 input-disable - disable input on pin (no effect on output)
231 input-schmitt-enable - enable schmitt-trigger mode
232 input-schmitt-disable - disable schmitt-trigger mode
233 input-debounce - debounce mode with debound time X
234 power-source - select between different power supplies
235 low-power-enable - enable low power mode
236 low-power-disable - disable low power mode
237 output-low - set the pin to output mode with low level
238 output-high - set the pin to output mode with high level
239 slew-rate - set the slew rate
245 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
251 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
262 Some of the generic properties take arguments. For those that do, the
263 arguments are described below.
265 - pins takes a list of pin names or IDs as a required argument. The specific
266 binding for the hardware defines:
267 - Whether the entries are integers or strings, and their meaning.
269 - bias-pull-up, -down and -pin-default take as optional argument on hardware
270 supporting it the pull strength in Ohm. bias-disable will disable the pull.
272 - drive-strength takes as argument the target strength in mA.
274 - input-debounce takes the debounce time in usec as argument
275 or 0 to disable debouncing
277 More in-depth documentation on these parameters can be found in
278 <include/linux/pinctrl/pinconf-generic.h>