1 QorIQ DPAA Queue Manager Device Tree Binding
3 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
8 - QMan Private Memory Nodes
13 The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
14 supports queuing and QoS scheduling of frames to CPUs, network interfaces and
15 DPAA logic modules, maintains packet ordering within flows. Besides providing
16 flow-level queuing, is also responsible for congestion management functions such
17 as RED/WRED, congestion notifications and tail discards. This binding covers the
18 CCSR space programming model
24 Value type: <stringlist>
25 Definition: Must include "fsl,qman"
26 May include "fsl,<SoC>-qman"
30 Value type: <prop-encoded-array>
31 Definition: Registers region within the CCSR address space
33 The QMan revision information is located in the QMAN_IP_REV_1/2 registers which
34 are located at offsets 0xbf8 and 0xbfc
38 Value type: <prop-encoded-array>
39 Definition: Standard property. The error interrupt
44 Definition: Phandle to this QMan instance's portals
48 Value type: <prop-encoded-array>
49 Definition: PAMU property used for static LIODN assignment
54 Definition: PAMU property used for dynamic LIODN assignment
56 For additional details about the PAMU/LIODN binding(s) see pamu.txt
59 Usage: See clock-bindings.txt and qoriq-clock.txt
60 Value type: <prop-encoded-array>
61 Definition: Reference input clock. Its frequency is half of the
64 Devices connected to a QMan instance via Direct Connect Portals (DCP) must link
65 to the respective QMan instance
69 Value type: <prop-encoded-array>
70 Description: List of phandle and DCP index pairs, to the QMan instance
71 to which this device is connected via the DCP
73 QMan Private Memory Nodes
75 QMan requires two contiguous range of physical memory used for the backing store
76 for QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).
77 This memory is reserved/allocated as a nodes under the /reserved-memory node
79 The QMan FQD memory node must be named "qman-fqd"
85 Value type: <stringlist>
86 Definition: Must inclide "fsl,qman-fqd"
88 The QMan PFDR memory node must be named "qman-pfdr"
94 Value type: <stringlist>
95 Definition: Must inclide "fsl,qman-pfdr"
97 The following constraints are relevant to the FQD and PFDR private memory:
98 - The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
100 - The alignment must be a muliptle of the memory size
102 The size of the FQD and PFDP must be chosen by observing the hardware features
103 configured via the Reset Configuration Word (RCW) and that are relevant to a
104 specific board (e.g. number of MAC(s) pinned-out, number of offline/host command
105 FMan ports, etc.). The size configured in the DT must reflect the hardware
106 capabilities and not the specific needs of an application
108 For additional details about reserved memory regions see reserved-memory.txt
112 The example below shows a QMan FQD and a PFDR dynamic allocation memory nodes
115 #address-cells = <2>;
120 compatible = "fsl,qman-fqd";
121 alloc-ranges = <0 0 0x10 0>;
123 alignment = <0 0x400000>;
125 qman_pfdr: qman-pfdr {
126 compatible = "fsl,qman-pfdr";
127 alloc-ranges = <0 0 0x10 0>;
128 size = <0 0x2000000>;
129 alignment = <0 0x2000000>;
133 The example below shows a (P4080) QMan CCSR-space node
135 qportals: qman-portals@ff4200000 {
139 clockgen: global-utilities@e1000 {
145 platform_pll: platform-pll@c00 {
148 compatible = "fsl,qoriq-platform-pll-1.0";
150 clock-output-names = "platform-pll", "platform-pll-div2";
157 fsl,qman = <&qman, 2>;
162 compatible = "fsl,qman";
163 reg = <0x318000 0x1000>;
164 interrupts = <16 2 1 3>
166 fsl,qman-portals = <&qportals>;
167 memory-region = <&qman_fqd &qman_pfdr>;
168 clocks = <&platform_pll 1>;
173 fsl,qman = <&qman, 0>;