sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / bcma / driver_chipcommon_b.c
blob57f10b58b47cd3855ad117bb1ce57791e4c97532
1 /*
2 * Broadcom specific AMBA
3 * ChipCommon B Unit driver
5 * Copyright 2014, Hauke Mehrtens <hauke@hauke-m.de>
7 * Licensed under the GNU/GPL. See COPYING for details.
8 */
10 #include "bcma_private.h"
11 #include <linux/export.h>
12 #include <linux/bcma/bcma.h>
14 static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask,
15 u32 value, int timeout)
17 unsigned long deadline = jiffies + timeout;
18 u32 val;
20 do {
21 val = readl(addr);
22 if ((val & mask) == value)
23 return true;
24 cpu_relax();
25 udelay(10);
26 } while (!time_after_eq(jiffies, deadline));
28 bcma_err(bus, "Timeout waiting for register %p\n", addr);
30 return false;
33 void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value)
35 struct bcma_bus *bus = ccb->core->bus;
36 void __iomem *mii = ccb->mii;
38 writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
39 bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
40 writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
41 bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
43 EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write);
45 int bcma_core_chipcommon_b_init(struct bcma_drv_cc_b *ccb)
47 if (ccb->setup_done)
48 return 0;
50 ccb->setup_done = 1;
51 ccb->mii = ioremap_nocache(ccb->core->addr_s[1], BCMA_CORE_SIZE);
52 if (!ccb->mii)
53 return -ENOMEM;
55 return 0;
58 void bcma_core_chipcommon_b_free(struct bcma_drv_cc_b *ccb)
60 if (ccb->mii)
61 iounmap(ccb->mii);