2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/pci-aspm.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
33 #include <linux/bio.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/init.h>
39 #include <linux/jiffies.h>
40 #include <linux/hdreg.h>
41 #include <linux/spinlock.h>
42 #include <linux/compat.h>
43 #include <linux/mutex.h>
44 #include <linux/bitmap.h>
46 #include <linux/uaccess.h>
48 #include <linux/dma-mapping.h>
49 #include <linux/blkdev.h>
50 #include <linux/genhd.h>
51 #include <linux/completion.h>
52 #include <scsi/scsi.h>
54 #include <scsi/scsi_ioctl.h>
55 #include <linux/cdrom.h>
56 #include <linux/scatterlist.h>
57 #include <linux/kthread.h>
59 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
60 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
61 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
63 /* Embedded module documentation macros - see modules.h */
64 MODULE_AUTHOR("Hewlett-Packard Company");
65 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
66 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
67 MODULE_VERSION("3.6.26");
68 MODULE_LICENSE("GPL");
69 static int cciss_tape_cmds
= 6;
70 module_param(cciss_tape_cmds
, int, 0644);
71 MODULE_PARM_DESC(cciss_tape_cmds
,
72 "number of commands to allocate for tape devices (default: 6)");
73 static int cciss_simple_mode
;
74 module_param(cciss_simple_mode
, int, S_IRUGO
|S_IWUSR
);
75 MODULE_PARM_DESC(cciss_simple_mode
,
76 "Use 'simple mode' rather than 'performant mode'");
78 static int cciss_allow_hpsa
;
79 module_param(cciss_allow_hpsa
, int, S_IRUGO
|S_IWUSR
);
80 MODULE_PARM_DESC(cciss_allow_hpsa
,
81 "Prevent cciss driver from accessing hardware known to be "
82 " supported by the hpsa driver");
84 static DEFINE_MUTEX(cciss_mutex
);
85 static struct proc_dir_entry
*proc_cciss
;
87 #include "cciss_cmd.h"
89 #include <linux/cciss_ioctl.h>
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id cciss_pci_device_id
[] = {
93 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISS
, 0x0E11, 0x4070},
94 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSB
, 0x0E11, 0x4080},
95 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSB
, 0x0E11, 0x4082},
96 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSB
, 0x0E11, 0x4083},
97 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSC
, 0x0E11, 0x4091},
98 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSC
, 0x0E11, 0x409A},
99 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSC
, 0x0E11, 0x409B},
100 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSC
, 0x0E11, 0x409C},
101 {PCI_VENDOR_ID_COMPAQ
, PCI_DEVICE_ID_COMPAQ_CISSC
, 0x0E11, 0x409D},
102 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSA
, 0x103C, 0x3225},
103 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSC
, 0x103C, 0x3223},
104 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSC
, 0x103C, 0x3234},
105 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSC
, 0x103C, 0x3235},
106 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSD
, 0x103C, 0x3211},
107 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSD
, 0x103C, 0x3212},
108 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSD
, 0x103C, 0x3213},
109 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSD
, 0x103C, 0x3214},
110 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSD
, 0x103C, 0x3215},
111 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSC
, 0x103C, 0x3237},
112 {PCI_VENDOR_ID_HP
, PCI_DEVICE_ID_HP_CISSC
, 0x103C, 0x323D},
116 MODULE_DEVICE_TABLE(pci
, cciss_pci_device_id
);
118 /* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
120 * access = Address of the struct of function pointers
122 static struct board_type products
[] = {
123 {0x40700E11, "Smart Array 5300", &SA5_access
},
124 {0x40800E11, "Smart Array 5i", &SA5B_access
},
125 {0x40820E11, "Smart Array 532", &SA5B_access
},
126 {0x40830E11, "Smart Array 5312", &SA5B_access
},
127 {0x409A0E11, "Smart Array 641", &SA5_access
},
128 {0x409B0E11, "Smart Array 642", &SA5_access
},
129 {0x409C0E11, "Smart Array 6400", &SA5_access
},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access
},
131 {0x40910E11, "Smart Array 6i", &SA5_access
},
132 {0x3225103C, "Smart Array P600", &SA5_access
},
133 {0x3223103C, "Smart Array P800", &SA5_access
},
134 {0x3234103C, "Smart Array P400", &SA5_access
},
135 {0x3235103C, "Smart Array P400i", &SA5_access
},
136 {0x3211103C, "Smart Array E200i", &SA5_access
},
137 {0x3212103C, "Smart Array E200", &SA5_access
},
138 {0x3213103C, "Smart Array E200i", &SA5_access
},
139 {0x3214103C, "Smart Array E200i", &SA5_access
},
140 {0x3215103C, "Smart Array E200i", &SA5_access
},
141 {0x3237103C, "Smart Array E500", &SA5_access
},
142 {0x323D103C, "Smart Array P700m", &SA5_access
},
145 /* How long to wait (in milliseconds) for board to go into simple mode */
146 #define MAX_CONFIG_WAIT 30000
147 #define MAX_IOCTL_CONFIG_WAIT 1000
149 /*define how many times we will try a command because of bus resets */
150 #define MAX_CMD_RETRIES 3
154 /* Originally cciss driver only supports 8 major numbers */
155 #define MAX_CTLR_ORIG 8
157 static ctlr_info_t
*hba
[MAX_CTLR
];
159 static struct task_struct
*cciss_scan_thread
;
160 static DEFINE_MUTEX(scan_mutex
);
161 static LIST_HEAD(scan_q
);
163 static void do_cciss_request(struct request_queue
*q
);
164 static irqreturn_t
do_cciss_intx(int irq
, void *dev_id
);
165 static irqreturn_t
do_cciss_msix_intr(int irq
, void *dev_id
);
166 static int cciss_open(struct block_device
*bdev
, fmode_t mode
);
167 static int cciss_unlocked_open(struct block_device
*bdev
, fmode_t mode
);
168 static void cciss_release(struct gendisk
*disk
, fmode_t mode
);
169 static int cciss_ioctl(struct block_device
*bdev
, fmode_t mode
,
170 unsigned int cmd
, unsigned long arg
);
171 static int cciss_getgeo(struct block_device
*bdev
, struct hd_geometry
*geo
);
173 static int cciss_revalidate(struct gendisk
*disk
);
174 static int rebuild_lun_table(ctlr_info_t
*h
, int first_time
, int via_ioctl
);
175 static int deregister_disk(ctlr_info_t
*h
, int drv_index
,
176 int clear_all
, int via_ioctl
);
178 static void cciss_read_capacity(ctlr_info_t
*h
, int logvol
,
179 sector_t
*total_size
, unsigned int *block_size
);
180 static void cciss_read_capacity_16(ctlr_info_t
*h
, int logvol
,
181 sector_t
*total_size
, unsigned int *block_size
);
182 static void cciss_geometry_inquiry(ctlr_info_t
*h
, int logvol
,
184 unsigned int block_size
, InquiryData_struct
*inq_buff
,
185 drive_info_struct
*drv
);
186 static void cciss_interrupt_mode(ctlr_info_t
*);
187 static int cciss_enter_simple_mode(struct ctlr_info
*h
);
188 static void start_io(ctlr_info_t
*h
);
189 static int sendcmd_withirq(ctlr_info_t
*h
, __u8 cmd
, void *buff
, size_t size
,
190 __u8 page_code
, unsigned char scsi3addr
[],
192 static int sendcmd_withirq_core(ctlr_info_t
*h
, CommandList_struct
*c
,
194 static int process_sendcmd_error(ctlr_info_t
*h
, CommandList_struct
*c
);
196 static int add_to_scan_list(struct ctlr_info
*h
);
197 static int scan_thread(void *data
);
198 static int check_for_unit_attention(ctlr_info_t
*h
, CommandList_struct
*c
);
199 static void cciss_hba_release(struct device
*dev
);
200 static void cciss_device_release(struct device
*dev
);
201 static void cciss_free_gendisk(ctlr_info_t
*h
, int drv_index
);
202 static void cciss_free_drive_info(ctlr_info_t
*h
, int drv_index
);
203 static inline u32
next_command(ctlr_info_t
*h
);
204 static int cciss_find_cfg_addrs(struct pci_dev
*pdev
, void __iomem
*vaddr
,
205 u32
*cfg_base_addr
, u64
*cfg_base_addr_index
,
207 static int cciss_pci_find_memory_BAR(struct pci_dev
*pdev
,
208 unsigned long *memory_bar
);
209 static inline u32
cciss_tag_discard_error_bits(ctlr_info_t
*h
, u32 tag
);
210 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem
*cfgtable
);
212 /* performant mode helper functions */
213 static void calc_bucket_map(int *bucket
, int num_buckets
, int nsgs
,
215 static void cciss_put_controller_into_performant_mode(ctlr_info_t
*h
);
217 #ifdef CONFIG_PROC_FS
218 static void cciss_procinit(ctlr_info_t
*h
);
220 static void cciss_procinit(ctlr_info_t
*h
)
223 #endif /* CONFIG_PROC_FS */
226 static int cciss_compat_ioctl(struct block_device
*, fmode_t
,
227 unsigned, unsigned long);
230 static const struct block_device_operations cciss_fops
= {
231 .owner
= THIS_MODULE
,
232 .open
= cciss_unlocked_open
,
233 .release
= cciss_release
,
234 .ioctl
= cciss_ioctl
,
235 .getgeo
= cciss_getgeo
,
237 .compat_ioctl
= cciss_compat_ioctl
,
239 .revalidate_disk
= cciss_revalidate
,
242 /* set_performant_mode: Modify the tag for cciss performant
243 * set bit 0 for pull model, bits 3-1 for block fetch
246 static void set_performant_mode(ctlr_info_t
*h
, CommandList_struct
*c
)
248 if (likely(h
->transMethod
& CFGTBL_Trans_Performant
))
249 c
->busaddr
|= 1 | (h
->blockFetchTable
[c
->Header
.SGList
] << 1);
253 * Enqueuing and dequeuing functions for cmdlists.
255 static inline void addQ(struct list_head
*list
, CommandList_struct
*c
)
257 list_add_tail(&c
->list
, list
);
260 static inline void removeQ(CommandList_struct
*c
)
263 * After kexec/dump some commands might still
264 * be in flight, which the firmware will try
265 * to complete. Resetting the firmware doesn't work
266 * with old fw revisions, so we have to mark
267 * them off as 'stale' to prevent the driver from
270 if (WARN_ON(list_empty(&c
->list
))) {
271 c
->cmd_type
= CMD_MSG_STALE
;
275 list_del_init(&c
->list
);
278 static void enqueue_cmd_and_start_io(ctlr_info_t
*h
,
279 CommandList_struct
*c
)
282 set_performant_mode(h
, c
);
283 spin_lock_irqsave(&h
->lock
, flags
);
286 if (h
->Qdepth
> h
->maxQsinceinit
)
287 h
->maxQsinceinit
= h
->Qdepth
;
289 spin_unlock_irqrestore(&h
->lock
, flags
);
292 static void cciss_free_sg_chain_blocks(SGDescriptor_struct
**cmd_sg_list
,
299 for (i
= 0; i
< nr_cmds
; i
++) {
300 kfree(cmd_sg_list
[i
]);
301 cmd_sg_list
[i
] = NULL
;
306 static SGDescriptor_struct
**cciss_allocate_sg_chain_blocks(
307 ctlr_info_t
*h
, int chainsize
, int nr_cmds
)
310 SGDescriptor_struct
**cmd_sg_list
;
315 cmd_sg_list
= kmalloc(sizeof(*cmd_sg_list
) * nr_cmds
, GFP_KERNEL
);
319 /* Build up chain blocks for each command */
320 for (j
= 0; j
< nr_cmds
; j
++) {
321 /* Need a block of chainsized s/g elements. */
322 cmd_sg_list
[j
] = kmalloc((chainsize
*
323 sizeof(*cmd_sg_list
[j
])), GFP_KERNEL
);
324 if (!cmd_sg_list
[j
]) {
325 dev_err(&h
->pdev
->dev
, "Cannot get memory "
326 "for s/g chains.\n");
332 cciss_free_sg_chain_blocks(cmd_sg_list
, nr_cmds
);
336 static void cciss_unmap_sg_chain_block(ctlr_info_t
*h
, CommandList_struct
*c
)
338 SGDescriptor_struct
*chain_sg
;
341 if (c
->Header
.SGTotal
<= h
->max_cmd_sgentries
)
344 chain_sg
= &c
->SG
[h
->max_cmd_sgentries
- 1];
345 temp64
.val32
.lower
= chain_sg
->Addr
.lower
;
346 temp64
.val32
.upper
= chain_sg
->Addr
.upper
;
347 pci_unmap_single(h
->pdev
, temp64
.val
, chain_sg
->Len
, PCI_DMA_TODEVICE
);
350 static void cciss_map_sg_chain_block(ctlr_info_t
*h
, CommandList_struct
*c
,
351 SGDescriptor_struct
*chain_block
, int len
)
353 SGDescriptor_struct
*chain_sg
;
356 chain_sg
= &c
->SG
[h
->max_cmd_sgentries
- 1];
357 chain_sg
->Ext
= CCISS_SG_CHAIN
;
359 temp64
.val
= pci_map_single(h
->pdev
, chain_block
, len
,
361 chain_sg
->Addr
.lower
= temp64
.val32
.lower
;
362 chain_sg
->Addr
.upper
= temp64
.val32
.upper
;
365 #include "cciss_scsi.c" /* For SCSI tape support */
367 static const char *raid_label
[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
370 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
372 #ifdef CONFIG_PROC_FS
375 * Report information about this controller.
377 #define ENG_GIG 1000000000
378 #define ENG_GIG_FACTOR (ENG_GIG/512)
379 #define ENGAGE_SCSI "engage scsi"
381 static void cciss_seq_show_header(struct seq_file
*seq
)
383 ctlr_info_t
*h
= seq
->private;
385 seq_printf(seq
, "%s: HP %s Controller\n"
386 "Board ID: 0x%08lx\n"
387 "Firmware Version: %c%c%c%c\n"
389 "Logical drives: %d\n"
390 "Current Q depth: %d\n"
391 "Current # commands on controller: %d\n"
392 "Max Q depth since init: %d\n"
393 "Max # commands on controller since init: %d\n"
394 "Max SG entries since init: %d\n",
397 (unsigned long)h
->board_id
,
398 h
->firm_ver
[0], h
->firm_ver
[1], h
->firm_ver
[2],
399 h
->firm_ver
[3], (unsigned int)h
->intr
[h
->intr_mode
],
401 h
->Qdepth
, h
->commands_outstanding
,
402 h
->maxQsinceinit
, h
->max_outstanding
, h
->maxSG
);
404 #ifdef CONFIG_CISS_SCSI_TAPE
405 cciss_seq_tape_report(seq
, h
);
406 #endif /* CONFIG_CISS_SCSI_TAPE */
409 static void *cciss_seq_start(struct seq_file
*seq
, loff_t
*pos
)
411 ctlr_info_t
*h
= seq
->private;
414 /* prevent displaying bogus info during configuration
415 * or deconfiguration of a logical volume
417 spin_lock_irqsave(&h
->lock
, flags
);
418 if (h
->busy_configuring
) {
419 spin_unlock_irqrestore(&h
->lock
, flags
);
420 return ERR_PTR(-EBUSY
);
422 h
->busy_configuring
= 1;
423 spin_unlock_irqrestore(&h
->lock
, flags
);
426 cciss_seq_show_header(seq
);
431 static int cciss_seq_show(struct seq_file
*seq
, void *v
)
433 sector_t vol_sz
, vol_sz_frac
;
434 ctlr_info_t
*h
= seq
->private;
435 unsigned ctlr
= h
->ctlr
;
437 drive_info_struct
*drv
= h
->drv
[*pos
];
439 if (*pos
> h
->highest_lun
)
442 if (drv
== NULL
) /* it's possible for h->drv[] to have holes. */
448 vol_sz
= drv
->nr_blocks
;
449 vol_sz_frac
= sector_div(vol_sz
, ENG_GIG_FACTOR
);
451 sector_div(vol_sz_frac
, ENG_GIG_FACTOR
);
453 if (drv
->raid_level
< 0 || drv
->raid_level
> RAID_UNKNOWN
)
454 drv
->raid_level
= RAID_UNKNOWN
;
455 seq_printf(seq
, "cciss/c%dd%d:"
456 "\t%4u.%02uGB\tRAID %s\n",
457 ctlr
, (int) *pos
, (int)vol_sz
, (int)vol_sz_frac
,
458 raid_label
[drv
->raid_level
]);
462 static void *cciss_seq_next(struct seq_file
*seq
, void *v
, loff_t
*pos
)
464 ctlr_info_t
*h
= seq
->private;
466 if (*pos
> h
->highest_lun
)
473 static void cciss_seq_stop(struct seq_file
*seq
, void *v
)
475 ctlr_info_t
*h
= seq
->private;
477 /* Only reset h->busy_configuring if we succeeded in setting
478 * it during cciss_seq_start. */
479 if (v
== ERR_PTR(-EBUSY
))
482 h
->busy_configuring
= 0;
485 static const struct seq_operations cciss_seq_ops
= {
486 .start
= cciss_seq_start
,
487 .show
= cciss_seq_show
,
488 .next
= cciss_seq_next
,
489 .stop
= cciss_seq_stop
,
492 static int cciss_seq_open(struct inode
*inode
, struct file
*file
)
494 int ret
= seq_open(file
, &cciss_seq_ops
);
495 struct seq_file
*seq
= file
->private_data
;
498 seq
->private = PDE_DATA(inode
);
504 cciss_proc_write(struct file
*file
, const char __user
*buf
,
505 size_t length
, loff_t
*ppos
)
510 #ifndef CONFIG_CISS_SCSI_TAPE
514 if (!buf
|| length
> PAGE_SIZE
- 1)
517 buffer
= memdup_user_nul(buf
, length
);
519 return PTR_ERR(buffer
);
521 #ifdef CONFIG_CISS_SCSI_TAPE
522 if (strncmp(ENGAGE_SCSI
, buffer
, sizeof ENGAGE_SCSI
- 1) == 0) {
523 struct seq_file
*seq
= file
->private_data
;
524 ctlr_info_t
*h
= seq
->private;
526 err
= cciss_engage_scsi(h
);
530 #endif /* CONFIG_CISS_SCSI_TAPE */
532 /* might be nice to have "disengage" too, but it's not
533 safely possible. (only 1 module use count, lock issues.) */
539 static const struct file_operations cciss_proc_fops
= {
540 .owner
= THIS_MODULE
,
541 .open
= cciss_seq_open
,
544 .release
= seq_release
,
545 .write
= cciss_proc_write
,
548 static void cciss_procinit(ctlr_info_t
*h
)
550 struct proc_dir_entry
*pde
;
552 if (proc_cciss
== NULL
)
553 proc_cciss
= proc_mkdir("driver/cciss", NULL
);
556 pde
= proc_create_data(h
->devname
, S_IWUSR
| S_IRUSR
| S_IRGRP
|
558 &cciss_proc_fops
, h
);
560 #endif /* CONFIG_PROC_FS */
562 #define MAX_PRODUCT_NAME_LEN 19
564 #define to_hba(n) container_of(n, struct ctlr_info, dev)
565 #define to_drv(n) container_of(n, drive_info_struct, dev)
567 /* List of controllers which cannot be hard reset on kexec with reset_devices */
568 static u32 unresettable_controller
[] = {
569 0x3223103C, /* Smart Array P800 */
570 0x3234103C, /* Smart Array P400 */
571 0x3235103C, /* Smart Array P400i */
572 0x3211103C, /* Smart Array E200i */
573 0x3212103C, /* Smart Array E200 */
574 0x3213103C, /* Smart Array E200i */
575 0x3214103C, /* Smart Array E200i */
576 0x3215103C, /* Smart Array E200i */
577 0x3237103C, /* Smart Array E500 */
578 0x323D103C, /* Smart Array P700m */
579 0x40800E11, /* Smart Array 5i */
580 0x409C0E11, /* Smart Array 6400 */
581 0x409D0E11, /* Smart Array 6400 EM */
582 0x40700E11, /* Smart Array 5300 */
583 0x40820E11, /* Smart Array 532 */
584 0x40830E11, /* Smart Array 5312 */
585 0x409A0E11, /* Smart Array 641 */
586 0x409B0E11, /* Smart Array 642 */
587 0x40910E11, /* Smart Array 6i */
590 /* List of controllers which cannot even be soft reset */
591 static u32 soft_unresettable_controller
[] = {
592 0x40800E11, /* Smart Array 5i */
593 0x40700E11, /* Smart Array 5300 */
594 0x40820E11, /* Smart Array 532 */
595 0x40830E11, /* Smart Array 5312 */
596 0x409A0E11, /* Smart Array 641 */
597 0x409B0E11, /* Smart Array 642 */
598 0x40910E11, /* Smart Array 6i */
599 /* Exclude 640x boards. These are two pci devices in one slot
600 * which share a battery backed cache module. One controls the
601 * cache, the other accesses the cache through the one that controls
602 * it. If we reset the one controlling the cache, the other will
603 * likely not be happy. Just forbid resetting this conjoined mess.
605 0x409C0E11, /* Smart Array 6400 */
606 0x409D0E11, /* Smart Array 6400 EM */
609 static int ctlr_is_hard_resettable(u32 board_id
)
613 for (i
= 0; i
< ARRAY_SIZE(unresettable_controller
); i
++)
614 if (unresettable_controller
[i
] == board_id
)
619 static int ctlr_is_soft_resettable(u32 board_id
)
623 for (i
= 0; i
< ARRAY_SIZE(soft_unresettable_controller
); i
++)
624 if (soft_unresettable_controller
[i
] == board_id
)
629 static int ctlr_is_resettable(u32 board_id
)
631 return ctlr_is_hard_resettable(board_id
) ||
632 ctlr_is_soft_resettable(board_id
);
635 static ssize_t
host_show_resettable(struct device
*dev
,
636 struct device_attribute
*attr
,
639 struct ctlr_info
*h
= to_hba(dev
);
641 return snprintf(buf
, 20, "%d\n", ctlr_is_resettable(h
->board_id
));
643 static DEVICE_ATTR(resettable
, S_IRUGO
, host_show_resettable
, NULL
);
645 static ssize_t
host_store_rescan(struct device
*dev
,
646 struct device_attribute
*attr
,
647 const char *buf
, size_t count
)
649 struct ctlr_info
*h
= to_hba(dev
);
652 wake_up_process(cciss_scan_thread
);
653 wait_for_completion_interruptible(&h
->scan_wait
);
657 static DEVICE_ATTR(rescan
, S_IWUSR
, NULL
, host_store_rescan
);
659 static ssize_t
host_show_transport_mode(struct device
*dev
,
660 struct device_attribute
*attr
,
663 struct ctlr_info
*h
= to_hba(dev
);
665 return snprintf(buf
, 20, "%s\n",
666 h
->transMethod
& CFGTBL_Trans_Performant
?
667 "performant" : "simple");
669 static DEVICE_ATTR(transport_mode
, S_IRUGO
, host_show_transport_mode
, NULL
);
671 static ssize_t
dev_show_unique_id(struct device
*dev
,
672 struct device_attribute
*attr
,
675 drive_info_struct
*drv
= to_drv(dev
);
676 struct ctlr_info
*h
= to_hba(drv
->dev
.parent
);
681 spin_lock_irqsave(&h
->lock
, flags
);
682 if (h
->busy_configuring
)
685 memcpy(sn
, drv
->serial_no
, sizeof(sn
));
686 spin_unlock_irqrestore(&h
->lock
, flags
);
691 return snprintf(buf
, 16 * 2 + 2,
692 "%02X%02X%02X%02X%02X%02X%02X%02X"
693 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
694 sn
[0], sn
[1], sn
[2], sn
[3],
695 sn
[4], sn
[5], sn
[6], sn
[7],
696 sn
[8], sn
[9], sn
[10], sn
[11],
697 sn
[12], sn
[13], sn
[14], sn
[15]);
699 static DEVICE_ATTR(unique_id
, S_IRUGO
, dev_show_unique_id
, NULL
);
701 static ssize_t
dev_show_vendor(struct device
*dev
,
702 struct device_attribute
*attr
,
705 drive_info_struct
*drv
= to_drv(dev
);
706 struct ctlr_info
*h
= to_hba(drv
->dev
.parent
);
707 char vendor
[VENDOR_LEN
+ 1];
711 spin_lock_irqsave(&h
->lock
, flags
);
712 if (h
->busy_configuring
)
715 memcpy(vendor
, drv
->vendor
, VENDOR_LEN
+ 1);
716 spin_unlock_irqrestore(&h
->lock
, flags
);
721 return snprintf(buf
, sizeof(vendor
) + 1, "%s\n", drv
->vendor
);
723 static DEVICE_ATTR(vendor
, S_IRUGO
, dev_show_vendor
, NULL
);
725 static ssize_t
dev_show_model(struct device
*dev
,
726 struct device_attribute
*attr
,
729 drive_info_struct
*drv
= to_drv(dev
);
730 struct ctlr_info
*h
= to_hba(drv
->dev
.parent
);
731 char model
[MODEL_LEN
+ 1];
735 spin_lock_irqsave(&h
->lock
, flags
);
736 if (h
->busy_configuring
)
739 memcpy(model
, drv
->model
, MODEL_LEN
+ 1);
740 spin_unlock_irqrestore(&h
->lock
, flags
);
745 return snprintf(buf
, sizeof(model
) + 1, "%s\n", drv
->model
);
747 static DEVICE_ATTR(model
, S_IRUGO
, dev_show_model
, NULL
);
749 static ssize_t
dev_show_rev(struct device
*dev
,
750 struct device_attribute
*attr
,
753 drive_info_struct
*drv
= to_drv(dev
);
754 struct ctlr_info
*h
= to_hba(drv
->dev
.parent
);
755 char rev
[REV_LEN
+ 1];
759 spin_lock_irqsave(&h
->lock
, flags
);
760 if (h
->busy_configuring
)
763 memcpy(rev
, drv
->rev
, REV_LEN
+ 1);
764 spin_unlock_irqrestore(&h
->lock
, flags
);
769 return snprintf(buf
, sizeof(rev
) + 1, "%s\n", drv
->rev
);
771 static DEVICE_ATTR(rev
, S_IRUGO
, dev_show_rev
, NULL
);
773 static ssize_t
cciss_show_lunid(struct device
*dev
,
774 struct device_attribute
*attr
, char *buf
)
776 drive_info_struct
*drv
= to_drv(dev
);
777 struct ctlr_info
*h
= to_hba(drv
->dev
.parent
);
779 unsigned char lunid
[8];
781 spin_lock_irqsave(&h
->lock
, flags
);
782 if (h
->busy_configuring
) {
783 spin_unlock_irqrestore(&h
->lock
, flags
);
787 spin_unlock_irqrestore(&h
->lock
, flags
);
790 memcpy(lunid
, drv
->LunID
, sizeof(lunid
));
791 spin_unlock_irqrestore(&h
->lock
, flags
);
792 return snprintf(buf
, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
793 lunid
[0], lunid
[1], lunid
[2], lunid
[3],
794 lunid
[4], lunid
[5], lunid
[6], lunid
[7]);
796 static DEVICE_ATTR(lunid
, S_IRUGO
, cciss_show_lunid
, NULL
);
798 static ssize_t
cciss_show_raid_level(struct device
*dev
,
799 struct device_attribute
*attr
, char *buf
)
801 drive_info_struct
*drv
= to_drv(dev
);
802 struct ctlr_info
*h
= to_hba(drv
->dev
.parent
);
806 spin_lock_irqsave(&h
->lock
, flags
);
807 if (h
->busy_configuring
) {
808 spin_unlock_irqrestore(&h
->lock
, flags
);
811 raid
= drv
->raid_level
;
812 spin_unlock_irqrestore(&h
->lock
, flags
);
813 if (raid
< 0 || raid
> RAID_UNKNOWN
)
816 return snprintf(buf
, strlen(raid_label
[raid
]) + 7, "RAID %s\n",
819 static DEVICE_ATTR(raid_level
, S_IRUGO
, cciss_show_raid_level
, NULL
);
821 static ssize_t
cciss_show_usage_count(struct device
*dev
,
822 struct device_attribute
*attr
, char *buf
)
824 drive_info_struct
*drv
= to_drv(dev
);
825 struct ctlr_info
*h
= to_hba(drv
->dev
.parent
);
829 spin_lock_irqsave(&h
->lock
, flags
);
830 if (h
->busy_configuring
) {
831 spin_unlock_irqrestore(&h
->lock
, flags
);
834 count
= drv
->usage_count
;
835 spin_unlock_irqrestore(&h
->lock
, flags
);
836 return snprintf(buf
, 20, "%d\n", count
);
838 static DEVICE_ATTR(usage_count
, S_IRUGO
, cciss_show_usage_count
, NULL
);
840 static struct attribute
*cciss_host_attrs
[] = {
841 &dev_attr_rescan
.attr
,
842 &dev_attr_resettable
.attr
,
843 &dev_attr_transport_mode
.attr
,
847 static struct attribute_group cciss_host_attr_group
= {
848 .attrs
= cciss_host_attrs
,
851 static const struct attribute_group
*cciss_host_attr_groups
[] = {
852 &cciss_host_attr_group
,
856 static struct device_type cciss_host_type
= {
857 .name
= "cciss_host",
858 .groups
= cciss_host_attr_groups
,
859 .release
= cciss_hba_release
,
862 static struct attribute
*cciss_dev_attrs
[] = {
863 &dev_attr_unique_id
.attr
,
864 &dev_attr_model
.attr
,
865 &dev_attr_vendor
.attr
,
867 &dev_attr_lunid
.attr
,
868 &dev_attr_raid_level
.attr
,
869 &dev_attr_usage_count
.attr
,
873 static struct attribute_group cciss_dev_attr_group
= {
874 .attrs
= cciss_dev_attrs
,
877 static const struct attribute_group
*cciss_dev_attr_groups
[] = {
878 &cciss_dev_attr_group
,
882 static struct device_type cciss_dev_type
= {
883 .name
= "cciss_device",
884 .groups
= cciss_dev_attr_groups
,
885 .release
= cciss_device_release
,
888 static struct bus_type cciss_bus_type
= {
893 * cciss_hba_release is called when the reference count
894 * of h->dev goes to zero.
896 static void cciss_hba_release(struct device
*dev
)
899 * nothing to do, but need this to avoid a warning
900 * about not having a release handler from lib/kref.c.
905 * Initialize sysfs entry for each controller. This sets up and registers
906 * the 'cciss#' directory for each individual controller under
907 * /sys/bus/pci/devices/<dev>/.
909 static int cciss_create_hba_sysfs_entry(struct ctlr_info
*h
)
911 device_initialize(&h
->dev
);
912 h
->dev
.type
= &cciss_host_type
;
913 h
->dev
.bus
= &cciss_bus_type
;
914 dev_set_name(&h
->dev
, "%s", h
->devname
);
915 h
->dev
.parent
= &h
->pdev
->dev
;
917 return device_add(&h
->dev
);
921 * Remove sysfs entries for an hba.
923 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info
*h
)
926 put_device(&h
->dev
); /* final put. */
929 /* cciss_device_release is called when the reference count
930 * of h->drv[x]dev goes to zero.
932 static void cciss_device_release(struct device
*dev
)
934 drive_info_struct
*drv
= to_drv(dev
);
939 * Initialize sysfs for each logical drive. This sets up and registers
940 * the 'c#d#' directory for each individual logical drive under
941 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
942 * /sys/block/cciss!c#d# to this entry.
944 static long cciss_create_ld_sysfs_entry(struct ctlr_info
*h
,
949 if (h
->drv
[drv_index
]->device_initialized
)
952 dev
= &h
->drv
[drv_index
]->dev
;
953 device_initialize(dev
);
954 dev
->type
= &cciss_dev_type
;
955 dev
->bus
= &cciss_bus_type
;
956 dev_set_name(dev
, "c%dd%d", h
->ctlr
, drv_index
);
957 dev
->parent
= &h
->dev
;
958 h
->drv
[drv_index
]->device_initialized
= 1;
959 return device_add(dev
);
963 * Remove sysfs entries for a logical drive.
965 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info
*h
, int drv_index
,
968 struct device
*dev
= &h
->drv
[drv_index
]->dev
;
970 /* special case for c*d0, we only destroy it on controller exit */
971 if (drv_index
== 0 && !ctlr_exiting
)
975 put_device(dev
); /* the "final" put. */
976 h
->drv
[drv_index
] = NULL
;
980 * For operations that cannot sleep, a command block is allocated at init,
981 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
982 * which ones are free or in use.
984 static CommandList_struct
*cmd_alloc(ctlr_info_t
*h
)
986 CommandList_struct
*c
;
989 dma_addr_t cmd_dma_handle
, err_dma_handle
;
992 i
= find_first_zero_bit(h
->cmd_pool_bits
, h
->nr_cmds
);
995 } while (test_and_set_bit(i
, h
->cmd_pool_bits
) != 0);
997 memset(c
, 0, sizeof(CommandList_struct
));
998 cmd_dma_handle
= h
->cmd_pool_dhandle
+ i
* sizeof(CommandList_struct
);
999 c
->err_info
= h
->errinfo_pool
+ i
;
1000 memset(c
->err_info
, 0, sizeof(ErrorInfo_struct
));
1001 err_dma_handle
= h
->errinfo_pool_dhandle
1002 + i
* sizeof(ErrorInfo_struct
);
1007 INIT_LIST_HEAD(&c
->list
);
1008 c
->busaddr
= (__u32
) cmd_dma_handle
;
1009 temp64
.val
= (__u64
) err_dma_handle
;
1010 c
->ErrDesc
.Addr
.lower
= temp64
.val32
.lower
;
1011 c
->ErrDesc
.Addr
.upper
= temp64
.val32
.upper
;
1012 c
->ErrDesc
.Len
= sizeof(ErrorInfo_struct
);
1018 /* allocate a command using pci_alloc_consistent, used for ioctls,
1019 * etc., not for the main i/o path.
1021 static CommandList_struct
*cmd_special_alloc(ctlr_info_t
*h
)
1023 CommandList_struct
*c
;
1025 dma_addr_t cmd_dma_handle
, err_dma_handle
;
1027 c
= pci_zalloc_consistent(h
->pdev
, sizeof(CommandList_struct
),
1034 c
->err_info
= pci_zalloc_consistent(h
->pdev
, sizeof(ErrorInfo_struct
),
1037 if (c
->err_info
== NULL
) {
1038 pci_free_consistent(h
->pdev
,
1039 sizeof(CommandList_struct
), c
, cmd_dma_handle
);
1043 INIT_LIST_HEAD(&c
->list
);
1044 c
->busaddr
= (__u32
) cmd_dma_handle
;
1045 temp64
.val
= (__u64
) err_dma_handle
;
1046 c
->ErrDesc
.Addr
.lower
= temp64
.val32
.lower
;
1047 c
->ErrDesc
.Addr
.upper
= temp64
.val32
.upper
;
1048 c
->ErrDesc
.Len
= sizeof(ErrorInfo_struct
);
1054 static void cmd_free(ctlr_info_t
*h
, CommandList_struct
*c
)
1058 i
= c
- h
->cmd_pool
;
1059 clear_bit(i
, h
->cmd_pool_bits
);
1063 static void cmd_special_free(ctlr_info_t
*h
, CommandList_struct
*c
)
1067 temp64
.val32
.lower
= c
->ErrDesc
.Addr
.lower
;
1068 temp64
.val32
.upper
= c
->ErrDesc
.Addr
.upper
;
1069 pci_free_consistent(h
->pdev
, sizeof(ErrorInfo_struct
),
1070 c
->err_info
, (dma_addr_t
) temp64
.val
);
1071 pci_free_consistent(h
->pdev
, sizeof(CommandList_struct
), c
,
1072 (dma_addr_t
) cciss_tag_discard_error_bits(h
, (u32
) c
->busaddr
));
1075 static inline ctlr_info_t
*get_host(struct gendisk
*disk
)
1077 return disk
->queue
->queuedata
;
1080 static inline drive_info_struct
*get_drv(struct gendisk
*disk
)
1082 return disk
->private_data
;
1086 * Open. Make sure the device is really there.
1088 static int cciss_open(struct block_device
*bdev
, fmode_t mode
)
1090 ctlr_info_t
*h
= get_host(bdev
->bd_disk
);
1091 drive_info_struct
*drv
= get_drv(bdev
->bd_disk
);
1093 dev_dbg(&h
->pdev
->dev
, "cciss_open %s\n", bdev
->bd_disk
->disk_name
);
1094 if (drv
->busy_configuring
)
1097 * Root is allowed to open raw volume zero even if it's not configured
1098 * so array config can still work. Root is also allowed to open any
1099 * volume that has a LUN ID, so it can issue IOCTL to reread the
1100 * disk information. I don't think I really like this
1101 * but I'm already using way to many device nodes to claim another one
1102 * for "raw controller".
1104 if (drv
->heads
== 0) {
1105 if (MINOR(bdev
->bd_dev
) != 0) { /* not node 0? */
1106 /* if not node 0 make sure it is a partition = 0 */
1107 if (MINOR(bdev
->bd_dev
) & 0x0f) {
1109 /* if it is, make sure we have a LUN ID */
1110 } else if (memcmp(drv
->LunID
, CTLR_LUNID
,
1111 sizeof(drv
->LunID
))) {
1115 if (!capable(CAP_SYS_ADMIN
))
1123 static int cciss_unlocked_open(struct block_device
*bdev
, fmode_t mode
)
1127 mutex_lock(&cciss_mutex
);
1128 ret
= cciss_open(bdev
, mode
);
1129 mutex_unlock(&cciss_mutex
);
1135 * Close. Sync first.
1137 static void cciss_release(struct gendisk
*disk
, fmode_t mode
)
1140 drive_info_struct
*drv
;
1142 mutex_lock(&cciss_mutex
);
1144 drv
= get_drv(disk
);
1145 dev_dbg(&h
->pdev
->dev
, "cciss_release %s\n", disk
->disk_name
);
1148 mutex_unlock(&cciss_mutex
);
1151 #ifdef CONFIG_COMPAT
1153 static int cciss_ioctl32_passthru(struct block_device
*bdev
, fmode_t mode
,
1154 unsigned cmd
, unsigned long arg
);
1155 static int cciss_ioctl32_big_passthru(struct block_device
*bdev
, fmode_t mode
,
1156 unsigned cmd
, unsigned long arg
);
1158 static int cciss_compat_ioctl(struct block_device
*bdev
, fmode_t mode
,
1159 unsigned cmd
, unsigned long arg
)
1162 case CCISS_GETPCIINFO
:
1163 case CCISS_GETINTINFO
:
1164 case CCISS_SETINTINFO
:
1165 case CCISS_GETNODENAME
:
1166 case CCISS_SETNODENAME
:
1167 case CCISS_GETHEARTBEAT
:
1168 case CCISS_GETBUSTYPES
:
1169 case CCISS_GETFIRMVER
:
1170 case CCISS_GETDRIVVER
:
1171 case CCISS_REVALIDVOLS
:
1172 case CCISS_DEREGDISK
:
1173 case CCISS_REGNEWDISK
:
1175 case CCISS_RESCANDISK
:
1176 case CCISS_GETLUNINFO
:
1177 return cciss_ioctl(bdev
, mode
, cmd
, arg
);
1179 case CCISS_PASSTHRU32
:
1180 return cciss_ioctl32_passthru(bdev
, mode
, cmd
, arg
);
1181 case CCISS_BIG_PASSTHRU32
:
1182 return cciss_ioctl32_big_passthru(bdev
, mode
, cmd
, arg
);
1185 return -ENOIOCTLCMD
;
1189 static int cciss_ioctl32_passthru(struct block_device
*bdev
, fmode_t mode
,
1190 unsigned cmd
, unsigned long arg
)
1192 IOCTL32_Command_struct __user
*arg32
=
1193 (IOCTL32_Command_struct __user
*) arg
;
1194 IOCTL_Command_struct arg64
;
1195 IOCTL_Command_struct __user
*p
= compat_alloc_user_space(sizeof(arg64
));
1199 memset(&arg64
, 0, sizeof(arg64
));
1202 copy_from_user(&arg64
.LUN_info
, &arg32
->LUN_info
,
1203 sizeof(arg64
.LUN_info
));
1205 copy_from_user(&arg64
.Request
, &arg32
->Request
,
1206 sizeof(arg64
.Request
));
1208 copy_from_user(&arg64
.error_info
, &arg32
->error_info
,
1209 sizeof(arg64
.error_info
));
1210 err
|= get_user(arg64
.buf_size
, &arg32
->buf_size
);
1211 err
|= get_user(cp
, &arg32
->buf
);
1212 arg64
.buf
= compat_ptr(cp
);
1213 err
|= copy_to_user(p
, &arg64
, sizeof(arg64
));
1218 err
= cciss_ioctl(bdev
, mode
, CCISS_PASSTHRU
, (unsigned long)p
);
1222 copy_in_user(&arg32
->error_info
, &p
->error_info
,
1223 sizeof(arg32
->error_info
));
1229 static int cciss_ioctl32_big_passthru(struct block_device
*bdev
, fmode_t mode
,
1230 unsigned cmd
, unsigned long arg
)
1232 BIG_IOCTL32_Command_struct __user
*arg32
=
1233 (BIG_IOCTL32_Command_struct __user
*) arg
;
1234 BIG_IOCTL_Command_struct arg64
;
1235 BIG_IOCTL_Command_struct __user
*p
=
1236 compat_alloc_user_space(sizeof(arg64
));
1240 memset(&arg64
, 0, sizeof(arg64
));
1243 copy_from_user(&arg64
.LUN_info
, &arg32
->LUN_info
,
1244 sizeof(arg64
.LUN_info
));
1246 copy_from_user(&arg64
.Request
, &arg32
->Request
,
1247 sizeof(arg64
.Request
));
1249 copy_from_user(&arg64
.error_info
, &arg32
->error_info
,
1250 sizeof(arg64
.error_info
));
1251 err
|= get_user(arg64
.buf_size
, &arg32
->buf_size
);
1252 err
|= get_user(arg64
.malloc_size
, &arg32
->malloc_size
);
1253 err
|= get_user(cp
, &arg32
->buf
);
1254 arg64
.buf
= compat_ptr(cp
);
1255 err
|= copy_to_user(p
, &arg64
, sizeof(arg64
));
1260 err
= cciss_ioctl(bdev
, mode
, CCISS_BIG_PASSTHRU
, (unsigned long)p
);
1264 copy_in_user(&arg32
->error_info
, &p
->error_info
,
1265 sizeof(arg32
->error_info
));
1272 static int cciss_getgeo(struct block_device
*bdev
, struct hd_geometry
*geo
)
1274 drive_info_struct
*drv
= get_drv(bdev
->bd_disk
);
1276 if (!drv
->cylinders
)
1279 geo
->heads
= drv
->heads
;
1280 geo
->sectors
= drv
->sectors
;
1281 geo
->cylinders
= drv
->cylinders
;
1285 static void check_ioctl_unit_attention(ctlr_info_t
*h
, CommandList_struct
*c
)
1287 if (c
->err_info
->CommandStatus
== CMD_TARGET_STATUS
&&
1288 c
->err_info
->ScsiStatus
!= SAM_STAT_CHECK_CONDITION
)
1289 (void)check_for_unit_attention(h
, c
);
1292 static int cciss_getpciinfo(ctlr_info_t
*h
, void __user
*argp
)
1294 cciss_pci_info_struct pciinfo
;
1298 pciinfo
.domain
= pci_domain_nr(h
->pdev
->bus
);
1299 pciinfo
.bus
= h
->pdev
->bus
->number
;
1300 pciinfo
.dev_fn
= h
->pdev
->devfn
;
1301 pciinfo
.board_id
= h
->board_id
;
1302 if (copy_to_user(argp
, &pciinfo
, sizeof(cciss_pci_info_struct
)))
1307 static int cciss_getintinfo(ctlr_info_t
*h
, void __user
*argp
)
1309 cciss_coalint_struct intinfo
;
1310 unsigned long flags
;
1314 spin_lock_irqsave(&h
->lock
, flags
);
1315 intinfo
.delay
= readl(&h
->cfgtable
->HostWrite
.CoalIntDelay
);
1316 intinfo
.count
= readl(&h
->cfgtable
->HostWrite
.CoalIntCount
);
1317 spin_unlock_irqrestore(&h
->lock
, flags
);
1319 (argp
, &intinfo
, sizeof(cciss_coalint_struct
)))
1324 static int cciss_setintinfo(ctlr_info_t
*h
, void __user
*argp
)
1326 cciss_coalint_struct intinfo
;
1327 unsigned long flags
;
1332 if (!capable(CAP_SYS_ADMIN
))
1334 if (copy_from_user(&intinfo
, argp
, sizeof(intinfo
)))
1336 if ((intinfo
.delay
== 0) && (intinfo
.count
== 0))
1338 spin_lock_irqsave(&h
->lock
, flags
);
1339 /* Update the field, and then ring the doorbell */
1340 writel(intinfo
.delay
, &(h
->cfgtable
->HostWrite
.CoalIntDelay
));
1341 writel(intinfo
.count
, &(h
->cfgtable
->HostWrite
.CoalIntCount
));
1342 writel(CFGTBL_ChangeReq
, h
->vaddr
+ SA5_DOORBELL
);
1344 for (i
= 0; i
< MAX_IOCTL_CONFIG_WAIT
; i
++) {
1345 if (!(readl(h
->vaddr
+ SA5_DOORBELL
) & CFGTBL_ChangeReq
))
1347 udelay(1000); /* delay and try again */
1349 spin_unlock_irqrestore(&h
->lock
, flags
);
1350 if (i
>= MAX_IOCTL_CONFIG_WAIT
)
1355 static int cciss_getnodename(ctlr_info_t
*h
, void __user
*argp
)
1357 NodeName_type NodeName
;
1358 unsigned long flags
;
1363 spin_lock_irqsave(&h
->lock
, flags
);
1364 for (i
= 0; i
< 16; i
++)
1365 NodeName
[i
] = readb(&h
->cfgtable
->ServerName
[i
]);
1366 spin_unlock_irqrestore(&h
->lock
, flags
);
1367 if (copy_to_user(argp
, NodeName
, sizeof(NodeName_type
)))
1372 static int cciss_setnodename(ctlr_info_t
*h
, void __user
*argp
)
1374 NodeName_type NodeName
;
1375 unsigned long flags
;
1380 if (!capable(CAP_SYS_ADMIN
))
1382 if (copy_from_user(NodeName
, argp
, sizeof(NodeName_type
)))
1384 spin_lock_irqsave(&h
->lock
, flags
);
1385 /* Update the field, and then ring the doorbell */
1386 for (i
= 0; i
< 16; i
++)
1387 writeb(NodeName
[i
], &h
->cfgtable
->ServerName
[i
]);
1388 writel(CFGTBL_ChangeReq
, h
->vaddr
+ SA5_DOORBELL
);
1389 for (i
= 0; i
< MAX_IOCTL_CONFIG_WAIT
; i
++) {
1390 if (!(readl(h
->vaddr
+ SA5_DOORBELL
) & CFGTBL_ChangeReq
))
1392 udelay(1000); /* delay and try again */
1394 spin_unlock_irqrestore(&h
->lock
, flags
);
1395 if (i
>= MAX_IOCTL_CONFIG_WAIT
)
1400 static int cciss_getheartbeat(ctlr_info_t
*h
, void __user
*argp
)
1402 Heartbeat_type heartbeat
;
1403 unsigned long flags
;
1407 spin_lock_irqsave(&h
->lock
, flags
);
1408 heartbeat
= readl(&h
->cfgtable
->HeartBeat
);
1409 spin_unlock_irqrestore(&h
->lock
, flags
);
1410 if (copy_to_user(argp
, &heartbeat
, sizeof(Heartbeat_type
)))
1415 static int cciss_getbustypes(ctlr_info_t
*h
, void __user
*argp
)
1417 BusTypes_type BusTypes
;
1418 unsigned long flags
;
1422 spin_lock_irqsave(&h
->lock
, flags
);
1423 BusTypes
= readl(&h
->cfgtable
->BusTypes
);
1424 spin_unlock_irqrestore(&h
->lock
, flags
);
1425 if (copy_to_user(argp
, &BusTypes
, sizeof(BusTypes_type
)))
1430 static int cciss_getfirmver(ctlr_info_t
*h
, void __user
*argp
)
1432 FirmwareVer_type firmware
;
1436 memcpy(firmware
, h
->firm_ver
, 4);
1439 (argp
, firmware
, sizeof(FirmwareVer_type
)))
1444 static int cciss_getdrivver(ctlr_info_t
*h
, void __user
*argp
)
1446 DriverVer_type DriverVer
= DRIVER_VERSION
;
1450 if (copy_to_user(argp
, &DriverVer
, sizeof(DriverVer_type
)))
1455 static int cciss_getluninfo(ctlr_info_t
*h
,
1456 struct gendisk
*disk
, void __user
*argp
)
1458 LogvolInfo_struct luninfo
;
1459 drive_info_struct
*drv
= get_drv(disk
);
1463 memcpy(&luninfo
.LunID
, drv
->LunID
, sizeof(luninfo
.LunID
));
1464 luninfo
.num_opens
= drv
->usage_count
;
1465 luninfo
.num_parts
= 0;
1466 if (copy_to_user(argp
, &luninfo
, sizeof(LogvolInfo_struct
)))
1471 static int cciss_passthru(ctlr_info_t
*h
, void __user
*argp
)
1473 IOCTL_Command_struct iocommand
;
1474 CommandList_struct
*c
;
1477 DECLARE_COMPLETION_ONSTACK(wait
);
1482 if (!capable(CAP_SYS_RAWIO
))
1486 (&iocommand
, argp
, sizeof(IOCTL_Command_struct
)))
1488 if ((iocommand
.buf_size
< 1) &&
1489 (iocommand
.Request
.Type
.Direction
!= XFER_NONE
)) {
1492 if (iocommand
.buf_size
> 0) {
1493 buff
= kmalloc(iocommand
.buf_size
, GFP_KERNEL
);
1497 if (iocommand
.Request
.Type
.Direction
== XFER_WRITE
) {
1498 /* Copy the data into the buffer we created */
1499 if (copy_from_user(buff
, iocommand
.buf
, iocommand
.buf_size
)) {
1504 memset(buff
, 0, iocommand
.buf_size
);
1506 c
= cmd_special_alloc(h
);
1511 /* Fill in the command type */
1512 c
->cmd_type
= CMD_IOCTL_PEND
;
1513 /* Fill in Command Header */
1514 c
->Header
.ReplyQueue
= 0; /* unused in simple mode */
1515 if (iocommand
.buf_size
> 0) { /* buffer to fill */
1516 c
->Header
.SGList
= 1;
1517 c
->Header
.SGTotal
= 1;
1518 } else { /* no buffers to fill */
1519 c
->Header
.SGList
= 0;
1520 c
->Header
.SGTotal
= 0;
1522 c
->Header
.LUN
= iocommand
.LUN_info
;
1523 /* use the kernel address the cmd block for tag */
1524 c
->Header
.Tag
.lower
= c
->busaddr
;
1526 /* Fill in Request block */
1527 c
->Request
= iocommand
.Request
;
1529 /* Fill in the scatter gather information */
1530 if (iocommand
.buf_size
> 0) {
1531 temp64
.val
= pci_map_single(h
->pdev
, buff
,
1532 iocommand
.buf_size
, PCI_DMA_BIDIRECTIONAL
);
1533 c
->SG
[0].Addr
.lower
= temp64
.val32
.lower
;
1534 c
->SG
[0].Addr
.upper
= temp64
.val32
.upper
;
1535 c
->SG
[0].Len
= iocommand
.buf_size
;
1536 c
->SG
[0].Ext
= 0; /* we are not chaining */
1540 enqueue_cmd_and_start_io(h
, c
);
1541 wait_for_completion(&wait
);
1543 /* unlock the buffers from DMA */
1544 temp64
.val32
.lower
= c
->SG
[0].Addr
.lower
;
1545 temp64
.val32
.upper
= c
->SG
[0].Addr
.upper
;
1546 pci_unmap_single(h
->pdev
, (dma_addr_t
) temp64
.val
, iocommand
.buf_size
,
1547 PCI_DMA_BIDIRECTIONAL
);
1548 check_ioctl_unit_attention(h
, c
);
1550 /* Copy the error information out */
1551 iocommand
.error_info
= *(c
->err_info
);
1552 if (copy_to_user(argp
, &iocommand
, sizeof(IOCTL_Command_struct
))) {
1554 cmd_special_free(h
, c
);
1558 if (iocommand
.Request
.Type
.Direction
== XFER_READ
) {
1559 /* Copy the data out of the buffer we created */
1560 if (copy_to_user(iocommand
.buf
, buff
, iocommand
.buf_size
)) {
1562 cmd_special_free(h
, c
);
1567 cmd_special_free(h
, c
);
1571 static int cciss_bigpassthru(ctlr_info_t
*h
, void __user
*argp
)
1573 BIG_IOCTL_Command_struct
*ioc
;
1574 CommandList_struct
*c
;
1575 unsigned char **buff
= NULL
;
1576 int *buff_size
= NULL
;
1581 DECLARE_COMPLETION_ONSTACK(wait
);
1584 BYTE __user
*data_ptr
;
1588 if (!capable(CAP_SYS_RAWIO
))
1590 ioc
= kmalloc(sizeof(*ioc
), GFP_KERNEL
);
1595 if (copy_from_user(ioc
, argp
, sizeof(*ioc
))) {
1599 if ((ioc
->buf_size
< 1) &&
1600 (ioc
->Request
.Type
.Direction
!= XFER_NONE
)) {
1604 /* Check kmalloc limits using all SGs */
1605 if (ioc
->malloc_size
> MAX_KMALLOC_SIZE
) {
1609 if (ioc
->buf_size
> ioc
->malloc_size
* MAXSGENTRIES
) {
1613 buff
= kzalloc(MAXSGENTRIES
* sizeof(char *), GFP_KERNEL
);
1618 buff_size
= kmalloc(MAXSGENTRIES
* sizeof(int), GFP_KERNEL
);
1623 left
= ioc
->buf_size
;
1624 data_ptr
= ioc
->buf
;
1626 sz
= (left
> ioc
->malloc_size
) ? ioc
->malloc_size
: left
;
1627 buff_size
[sg_used
] = sz
;
1628 buff
[sg_used
] = kmalloc(sz
, GFP_KERNEL
);
1629 if (buff
[sg_used
] == NULL
) {
1633 if (ioc
->Request
.Type
.Direction
== XFER_WRITE
) {
1634 if (copy_from_user(buff
[sg_used
], data_ptr
, sz
)) {
1639 memset(buff
[sg_used
], 0, sz
);
1645 c
= cmd_special_alloc(h
);
1650 c
->cmd_type
= CMD_IOCTL_PEND
;
1651 c
->Header
.ReplyQueue
= 0;
1652 c
->Header
.SGList
= sg_used
;
1653 c
->Header
.SGTotal
= sg_used
;
1654 c
->Header
.LUN
= ioc
->LUN_info
;
1655 c
->Header
.Tag
.lower
= c
->busaddr
;
1657 c
->Request
= ioc
->Request
;
1658 for (i
= 0; i
< sg_used
; i
++) {
1659 temp64
.val
= pci_map_single(h
->pdev
, buff
[i
], buff_size
[i
],
1660 PCI_DMA_BIDIRECTIONAL
);
1661 c
->SG
[i
].Addr
.lower
= temp64
.val32
.lower
;
1662 c
->SG
[i
].Addr
.upper
= temp64
.val32
.upper
;
1663 c
->SG
[i
].Len
= buff_size
[i
];
1664 c
->SG
[i
].Ext
= 0; /* we are not chaining */
1667 enqueue_cmd_and_start_io(h
, c
);
1668 wait_for_completion(&wait
);
1669 /* unlock the buffers from DMA */
1670 for (i
= 0; i
< sg_used
; i
++) {
1671 temp64
.val32
.lower
= c
->SG
[i
].Addr
.lower
;
1672 temp64
.val32
.upper
= c
->SG
[i
].Addr
.upper
;
1673 pci_unmap_single(h
->pdev
,
1674 (dma_addr_t
) temp64
.val
, buff_size
[i
],
1675 PCI_DMA_BIDIRECTIONAL
);
1677 check_ioctl_unit_attention(h
, c
);
1678 /* Copy the error information out */
1679 ioc
->error_info
= *(c
->err_info
);
1680 if (copy_to_user(argp
, ioc
, sizeof(*ioc
))) {
1681 cmd_special_free(h
, c
);
1685 if (ioc
->Request
.Type
.Direction
== XFER_READ
) {
1686 /* Copy the data out of the buffer we created */
1687 BYTE __user
*ptr
= ioc
->buf
;
1688 for (i
= 0; i
< sg_used
; i
++) {
1689 if (copy_to_user(ptr
, buff
[i
], buff_size
[i
])) {
1690 cmd_special_free(h
, c
);
1694 ptr
+= buff_size
[i
];
1697 cmd_special_free(h
, c
);
1701 for (i
= 0; i
< sg_used
; i
++)
1710 static int cciss_ioctl(struct block_device
*bdev
, fmode_t mode
,
1711 unsigned int cmd
, unsigned long arg
)
1713 struct gendisk
*disk
= bdev
->bd_disk
;
1714 ctlr_info_t
*h
= get_host(disk
);
1715 void __user
*argp
= (void __user
*)arg
;
1717 dev_dbg(&h
->pdev
->dev
, "cciss_ioctl: Called with cmd=%x %lx\n",
1720 case CCISS_GETPCIINFO
:
1721 return cciss_getpciinfo(h
, argp
);
1722 case CCISS_GETINTINFO
:
1723 return cciss_getintinfo(h
, argp
);
1724 case CCISS_SETINTINFO
:
1725 return cciss_setintinfo(h
, argp
);
1726 case CCISS_GETNODENAME
:
1727 return cciss_getnodename(h
, argp
);
1728 case CCISS_SETNODENAME
:
1729 return cciss_setnodename(h
, argp
);
1730 case CCISS_GETHEARTBEAT
:
1731 return cciss_getheartbeat(h
, argp
);
1732 case CCISS_GETBUSTYPES
:
1733 return cciss_getbustypes(h
, argp
);
1734 case CCISS_GETFIRMVER
:
1735 return cciss_getfirmver(h
, argp
);
1736 case CCISS_GETDRIVVER
:
1737 return cciss_getdrivver(h
, argp
);
1738 case CCISS_DEREGDISK
:
1740 case CCISS_REVALIDVOLS
:
1741 return rebuild_lun_table(h
, 0, 1);
1742 case CCISS_GETLUNINFO
:
1743 return cciss_getluninfo(h
, disk
, argp
);
1744 case CCISS_PASSTHRU
:
1745 return cciss_passthru(h
, argp
);
1746 case CCISS_BIG_PASSTHRU
:
1747 return cciss_bigpassthru(h
, argp
);
1749 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1750 /* very meaningful for cciss. SG_IO is the main one people want. */
1752 case SG_GET_VERSION_NUM
:
1753 case SG_SET_TIMEOUT
:
1754 case SG_GET_TIMEOUT
:
1755 case SG_GET_RESERVED_SIZE
:
1756 case SG_SET_RESERVED_SIZE
:
1757 case SG_EMULATED_HOST
:
1759 case SCSI_IOCTL_SEND_COMMAND
:
1760 return scsi_cmd_blk_ioctl(bdev
, mode
, cmd
, argp
);
1762 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1763 /* they aren't a good fit for cciss, as CD-ROMs are */
1764 /* not supported, and we don't have any bus/target/lun */
1765 /* which we present to the kernel. */
1767 case CDROM_SEND_PACKET
:
1768 case CDROMCLOSETRAY
:
1770 case SCSI_IOCTL_GET_IDLUN
:
1771 case SCSI_IOCTL_GET_BUS_NUMBER
:
1777 static void cciss_check_queues(ctlr_info_t
*h
)
1779 int start_queue
= h
->next_to_run
;
1782 /* check to see if we have maxed out the number of commands that can
1783 * be placed on the queue. If so then exit. We do this check here
1784 * in case the interrupt we serviced was from an ioctl and did not
1785 * free any new commands.
1787 if ((find_first_zero_bit(h
->cmd_pool_bits
, h
->nr_cmds
)) == h
->nr_cmds
)
1790 /* We have room on the queue for more commands. Now we need to queue
1791 * them up. We will also keep track of the next queue to run so
1792 * that every queue gets a chance to be started first.
1794 for (i
= 0; i
< h
->highest_lun
+ 1; i
++) {
1795 int curr_queue
= (start_queue
+ i
) % (h
->highest_lun
+ 1);
1796 /* make sure the disk has been added and the drive is real
1797 * because this can be called from the middle of init_one.
1799 if (!h
->drv
[curr_queue
])
1801 if (!(h
->drv
[curr_queue
]->queue
) ||
1802 !(h
->drv
[curr_queue
]->heads
))
1804 blk_start_queue(h
->gendisk
[curr_queue
]->queue
);
1806 /* check to see if we have maxed out the number of commands
1807 * that can be placed on the queue.
1809 if ((find_first_zero_bit(h
->cmd_pool_bits
, h
->nr_cmds
)) == h
->nr_cmds
) {
1810 if (curr_queue
== start_queue
) {
1812 (start_queue
+ 1) % (h
->highest_lun
+ 1);
1815 h
->next_to_run
= curr_queue
;
1822 static void cciss_softirq_done(struct request
*rq
)
1824 CommandList_struct
*c
= rq
->completion_data
;
1825 ctlr_info_t
*h
= hba
[c
->ctlr
];
1826 SGDescriptor_struct
*curr_sg
= c
->SG
;
1828 unsigned long flags
;
1832 if (c
->Request
.Type
.Direction
== XFER_READ
)
1833 ddir
= PCI_DMA_FROMDEVICE
;
1835 ddir
= PCI_DMA_TODEVICE
;
1837 /* command did not need to be retried */
1838 /* unmap the DMA mapping for all the scatter gather elements */
1839 for (i
= 0; i
< c
->Header
.SGList
; i
++) {
1840 if (curr_sg
[sg_index
].Ext
== CCISS_SG_CHAIN
) {
1841 cciss_unmap_sg_chain_block(h
, c
);
1842 /* Point to the next block */
1843 curr_sg
= h
->cmd_sg_list
[c
->cmdindex
];
1846 temp64
.val32
.lower
= curr_sg
[sg_index
].Addr
.lower
;
1847 temp64
.val32
.upper
= curr_sg
[sg_index
].Addr
.upper
;
1848 pci_unmap_page(h
->pdev
, temp64
.val
, curr_sg
[sg_index
].Len
,
1853 dev_dbg(&h
->pdev
->dev
, "Done with %p\n", rq
);
1855 /* set the residual count for pc requests */
1856 if (rq
->cmd_type
== REQ_TYPE_BLOCK_PC
)
1857 rq
->resid_len
= c
->err_info
->ResidualCnt
;
1859 blk_end_request_all(rq
, (rq
->errors
== 0) ? 0 : -EIO
);
1861 spin_lock_irqsave(&h
->lock
, flags
);
1863 cciss_check_queues(h
);
1864 spin_unlock_irqrestore(&h
->lock
, flags
);
1867 static inline void log_unit_to_scsi3addr(ctlr_info_t
*h
,
1868 unsigned char scsi3addr
[], uint32_t log_unit
)
1870 memcpy(scsi3addr
, h
->drv
[log_unit
]->LunID
,
1871 sizeof(h
->drv
[log_unit
]->LunID
));
1874 /* This function gets the SCSI vendor, model, and revision of a logical drive
1875 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1876 * they cannot be read.
1878 static void cciss_get_device_descr(ctlr_info_t
*h
, int logvol
,
1879 char *vendor
, char *model
, char *rev
)
1882 InquiryData_struct
*inq_buf
;
1883 unsigned char scsi3addr
[8];
1889 inq_buf
= kzalloc(sizeof(InquiryData_struct
), GFP_KERNEL
);
1893 log_unit_to_scsi3addr(h
, scsi3addr
, logvol
);
1894 rc
= sendcmd_withirq(h
, CISS_INQUIRY
, inq_buf
, sizeof(*inq_buf
), 0,
1895 scsi3addr
, TYPE_CMD
);
1897 memcpy(vendor
, &inq_buf
->data_byte
[8], VENDOR_LEN
);
1898 vendor
[VENDOR_LEN
] = '\0';
1899 memcpy(model
, &inq_buf
->data_byte
[16], MODEL_LEN
);
1900 model
[MODEL_LEN
] = '\0';
1901 memcpy(rev
, &inq_buf
->data_byte
[32], REV_LEN
);
1902 rev
[REV_LEN
] = '\0';
1909 /* This function gets the serial number of a logical drive via
1910 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1911 * number cannot be had, for whatever reason, 16 bytes of 0xff
1912 * are returned instead.
1914 static void cciss_get_serial_no(ctlr_info_t
*h
, int logvol
,
1915 unsigned char *serial_no
, int buflen
)
1917 #define PAGE_83_INQ_BYTES 64
1920 unsigned char scsi3addr
[8];
1924 memset(serial_no
, 0xff, buflen
);
1925 buf
= kzalloc(PAGE_83_INQ_BYTES
, GFP_KERNEL
);
1928 memset(serial_no
, 0, buflen
);
1929 log_unit_to_scsi3addr(h
, scsi3addr
, logvol
);
1930 rc
= sendcmd_withirq(h
, CISS_INQUIRY
, buf
,
1931 PAGE_83_INQ_BYTES
, 0x83, scsi3addr
, TYPE_CMD
);
1933 memcpy(serial_no
, &buf
[8], buflen
);
1939 * cciss_add_disk sets up the block device queue for a logical drive
1941 static int cciss_add_disk(ctlr_info_t
*h
, struct gendisk
*disk
,
1944 disk
->queue
= blk_init_queue(do_cciss_request
, &h
->lock
);
1946 goto init_queue_failure
;
1947 sprintf(disk
->disk_name
, "cciss/c%dd%d", h
->ctlr
, drv_index
);
1948 disk
->major
= h
->major
;
1949 disk
->first_minor
= drv_index
<< NWD_SHIFT
;
1950 disk
->fops
= &cciss_fops
;
1951 if (cciss_create_ld_sysfs_entry(h
, drv_index
))
1953 disk
->private_data
= h
->drv
[drv_index
];
1955 /* Set up queue information */
1956 blk_queue_bounce_limit(disk
->queue
, h
->pdev
->dma_mask
);
1958 /* This is a hardware imposed limit. */
1959 blk_queue_max_segments(disk
->queue
, h
->maxsgentries
);
1961 blk_queue_max_hw_sectors(disk
->queue
, h
->cciss_max_sectors
);
1963 blk_queue_softirq_done(disk
->queue
, cciss_softirq_done
);
1965 disk
->queue
->queuedata
= h
;
1967 blk_queue_logical_block_size(disk
->queue
,
1968 h
->drv
[drv_index
]->block_size
);
1970 /* Make sure all queue data is written out before */
1971 /* setting h->drv[drv_index]->queue, as setting this */
1972 /* allows the interrupt handler to start the queue */
1974 h
->drv
[drv_index
]->queue
= disk
->queue
;
1975 device_add_disk(&h
->drv
[drv_index
]->dev
, disk
);
1979 blk_cleanup_queue(disk
->queue
);
1985 /* This function will check the usage_count of the drive to be updated/added.
1986 * If the usage_count is zero and it is a heretofore unknown drive, or,
1987 * the drive's capacity, geometry, or serial number has changed,
1988 * then the drive information will be updated and the disk will be
1989 * re-registered with the kernel. If these conditions don't hold,
1990 * then it will be left alone for the next reboot. The exception to this
1991 * is disk 0 which will always be left registered with the kernel since it
1992 * is also the controller node. Any changes to disk 0 will show up on
1995 static void cciss_update_drive_info(ctlr_info_t
*h
, int drv_index
,
1996 int first_time
, int via_ioctl
)
1998 struct gendisk
*disk
;
1999 InquiryData_struct
*inq_buff
= NULL
;
2000 unsigned int block_size
;
2001 sector_t total_size
;
2002 unsigned long flags
= 0;
2004 drive_info_struct
*drvinfo
;
2006 /* Get information about the disk and modify the driver structure */
2007 inq_buff
= kmalloc(sizeof(InquiryData_struct
), GFP_KERNEL
);
2008 drvinfo
= kzalloc(sizeof(*drvinfo
), GFP_KERNEL
);
2009 if (inq_buff
== NULL
|| drvinfo
== NULL
)
2012 /* testing to see if 16-byte CDBs are already being used */
2013 if (h
->cciss_read
== CCISS_READ_16
) {
2014 cciss_read_capacity_16(h
, drv_index
,
2015 &total_size
, &block_size
);
2018 cciss_read_capacity(h
, drv_index
, &total_size
, &block_size
);
2019 /* if read_capacity returns all F's this volume is >2TB */
2020 /* in size so we switch to 16-byte CDB's for all */
2021 /* read/write ops */
2022 if (total_size
== 0xFFFFFFFFULL
) {
2023 cciss_read_capacity_16(h
, drv_index
,
2024 &total_size
, &block_size
);
2025 h
->cciss_read
= CCISS_READ_16
;
2026 h
->cciss_write
= CCISS_WRITE_16
;
2028 h
->cciss_read
= CCISS_READ_10
;
2029 h
->cciss_write
= CCISS_WRITE_10
;
2033 cciss_geometry_inquiry(h
, drv_index
, total_size
, block_size
,
2035 drvinfo
->block_size
= block_size
;
2036 drvinfo
->nr_blocks
= total_size
+ 1;
2038 cciss_get_device_descr(h
, drv_index
, drvinfo
->vendor
,
2039 drvinfo
->model
, drvinfo
->rev
);
2040 cciss_get_serial_no(h
, drv_index
, drvinfo
->serial_no
,
2041 sizeof(drvinfo
->serial_no
));
2042 /* Save the lunid in case we deregister the disk, below. */
2043 memcpy(drvinfo
->LunID
, h
->drv
[drv_index
]->LunID
,
2044 sizeof(drvinfo
->LunID
));
2046 /* Is it the same disk we already know, and nothing's changed? */
2047 if (h
->drv
[drv_index
]->raid_level
!= -1 &&
2048 ((memcmp(drvinfo
->serial_no
,
2049 h
->drv
[drv_index
]->serial_no
, 16) == 0) &&
2050 drvinfo
->block_size
== h
->drv
[drv_index
]->block_size
&&
2051 drvinfo
->nr_blocks
== h
->drv
[drv_index
]->nr_blocks
&&
2052 drvinfo
->heads
== h
->drv
[drv_index
]->heads
&&
2053 drvinfo
->sectors
== h
->drv
[drv_index
]->sectors
&&
2054 drvinfo
->cylinders
== h
->drv
[drv_index
]->cylinders
))
2055 /* The disk is unchanged, nothing to update */
2058 /* If we get here it's not the same disk, or something's changed,
2059 * so we need to * deregister it, and re-register it, if it's not
2061 * If the disk already exists then deregister it before proceeding
2062 * (unless it's the first disk (for the controller node).
2064 if (h
->drv
[drv_index
]->raid_level
!= -1 && drv_index
!= 0) {
2065 dev_warn(&h
->pdev
->dev
, "disk %d has changed.\n", drv_index
);
2066 spin_lock_irqsave(&h
->lock
, flags
);
2067 h
->drv
[drv_index
]->busy_configuring
= 1;
2068 spin_unlock_irqrestore(&h
->lock
, flags
);
2070 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2071 * which keeps the interrupt handler from starting
2074 ret
= deregister_disk(h
, drv_index
, 0, via_ioctl
);
2077 /* If the disk is in use return */
2081 /* Save the new information from cciss_geometry_inquiry
2082 * and serial number inquiry. If the disk was deregistered
2083 * above, then h->drv[drv_index] will be NULL.
2085 if (h
->drv
[drv_index
] == NULL
) {
2086 drvinfo
->device_initialized
= 0;
2087 h
->drv
[drv_index
] = drvinfo
;
2088 drvinfo
= NULL
; /* so it won't be freed below. */
2090 /* special case for cxd0 */
2091 h
->drv
[drv_index
]->block_size
= drvinfo
->block_size
;
2092 h
->drv
[drv_index
]->nr_blocks
= drvinfo
->nr_blocks
;
2093 h
->drv
[drv_index
]->heads
= drvinfo
->heads
;
2094 h
->drv
[drv_index
]->sectors
= drvinfo
->sectors
;
2095 h
->drv
[drv_index
]->cylinders
= drvinfo
->cylinders
;
2096 h
->drv
[drv_index
]->raid_level
= drvinfo
->raid_level
;
2097 memcpy(h
->drv
[drv_index
]->serial_no
, drvinfo
->serial_no
, 16);
2098 memcpy(h
->drv
[drv_index
]->vendor
, drvinfo
->vendor
,
2100 memcpy(h
->drv
[drv_index
]->model
, drvinfo
->model
, MODEL_LEN
+ 1);
2101 memcpy(h
->drv
[drv_index
]->rev
, drvinfo
->rev
, REV_LEN
+ 1);
2105 disk
= h
->gendisk
[drv_index
];
2106 set_capacity(disk
, h
->drv
[drv_index
]->nr_blocks
);
2108 /* If it's not disk 0 (drv_index != 0)
2109 * or if it was disk 0, but there was previously
2110 * no actual corresponding configured logical drive
2111 * (raid_leve == -1) then we want to update the
2112 * logical drive's information.
2114 if (drv_index
|| first_time
) {
2115 if (cciss_add_disk(h
, disk
, drv_index
) != 0) {
2116 cciss_free_gendisk(h
, drv_index
);
2117 cciss_free_drive_info(h
, drv_index
);
2118 dev_warn(&h
->pdev
->dev
, "could not update disk %d\n",
2129 dev_err(&h
->pdev
->dev
, "out of memory\n");
2133 /* This function will find the first index of the controllers drive array
2134 * that has a null drv pointer and allocate the drive info struct and
2135 * will return that index This is where new drives will be added.
2136 * If the index to be returned is greater than the highest_lun index for
2137 * the controller then highest_lun is set * to this new index.
2138 * If there are no available indexes or if tha allocation fails, then -1
2139 * is returned. * "controller_node" is used to know if this is a real
2140 * logical drive, or just the controller node, which determines if this
2141 * counts towards highest_lun.
2143 static int cciss_alloc_drive_info(ctlr_info_t
*h
, int controller_node
)
2146 drive_info_struct
*drv
;
2148 /* Search for an empty slot for our drive info */
2149 for (i
= 0; i
< CISS_MAX_LUN
; i
++) {
2151 /* if not cxd0 case, and it's occupied, skip it. */
2152 if (h
->drv
[i
] && i
!= 0)
2155 * If it's cxd0 case, and drv is alloc'ed already, and a
2156 * disk is configured there, skip it.
2158 if (i
== 0 && h
->drv
[i
] && h
->drv
[i
]->raid_level
!= -1)
2162 * We've found an empty slot. Update highest_lun
2163 * provided this isn't just the fake cxd0 controller node.
2165 if (i
> h
->highest_lun
&& !controller_node
)
2168 /* If adding a real disk at cxd0, and it's already alloc'ed */
2169 if (i
== 0 && h
->drv
[i
] != NULL
)
2173 * Found an empty slot, not already alloc'ed. Allocate it.
2174 * Mark it with raid_level == -1, so we know it's new later on.
2176 drv
= kzalloc(sizeof(*drv
), GFP_KERNEL
);
2179 drv
->raid_level
= -1; /* so we know it's new */
2186 static void cciss_free_drive_info(ctlr_info_t
*h
, int drv_index
)
2188 kfree(h
->drv
[drv_index
]);
2189 h
->drv
[drv_index
] = NULL
;
2192 static void cciss_free_gendisk(ctlr_info_t
*h
, int drv_index
)
2194 put_disk(h
->gendisk
[drv_index
]);
2195 h
->gendisk
[drv_index
] = NULL
;
2198 /* cciss_add_gendisk finds a free hba[]->drv structure
2199 * and allocates a gendisk if needed, and sets the lunid
2200 * in the drvinfo structure. It returns the index into
2201 * the ->drv[] array, or -1 if none are free.
2202 * is_controller_node indicates whether highest_lun should
2203 * count this disk, or if it's only being added to provide
2204 * a means to talk to the controller in case no logical
2205 * drives have yet been configured.
2207 static int cciss_add_gendisk(ctlr_info_t
*h
, unsigned char lunid
[],
2208 int controller_node
)
2212 drv_index
= cciss_alloc_drive_info(h
, controller_node
);
2213 if (drv_index
== -1)
2216 /*Check if the gendisk needs to be allocated */
2217 if (!h
->gendisk
[drv_index
]) {
2218 h
->gendisk
[drv_index
] =
2219 alloc_disk(1 << NWD_SHIFT
);
2220 if (!h
->gendisk
[drv_index
]) {
2221 dev_err(&h
->pdev
->dev
,
2222 "could not allocate a new disk %d\n",
2224 goto err_free_drive_info
;
2227 memcpy(h
->drv
[drv_index
]->LunID
, lunid
,
2228 sizeof(h
->drv
[drv_index
]->LunID
));
2229 if (cciss_create_ld_sysfs_entry(h
, drv_index
))
2231 /* Don't need to mark this busy because nobody */
2232 /* else knows about this disk yet to contend */
2233 /* for access to it. */
2234 h
->drv
[drv_index
]->busy_configuring
= 0;
2239 cciss_free_gendisk(h
, drv_index
);
2240 err_free_drive_info
:
2241 cciss_free_drive_info(h
, drv_index
);
2245 /* This is for the special case of a controller which
2246 * has no logical drives. In this case, we still need
2247 * to register a disk so the controller can be accessed
2248 * by the Array Config Utility.
2250 static void cciss_add_controller_node(ctlr_info_t
*h
)
2252 struct gendisk
*disk
;
2255 if (h
->gendisk
[0] != NULL
) /* already did this? Then bail. */
2258 drv_index
= cciss_add_gendisk(h
, CTLR_LUNID
, 1);
2259 if (drv_index
== -1)
2261 h
->drv
[drv_index
]->block_size
= 512;
2262 h
->drv
[drv_index
]->nr_blocks
= 0;
2263 h
->drv
[drv_index
]->heads
= 0;
2264 h
->drv
[drv_index
]->sectors
= 0;
2265 h
->drv
[drv_index
]->cylinders
= 0;
2266 h
->drv
[drv_index
]->raid_level
= -1;
2267 memset(h
->drv
[drv_index
]->serial_no
, 0, 16);
2268 disk
= h
->gendisk
[drv_index
];
2269 if (cciss_add_disk(h
, disk
, drv_index
) == 0)
2271 cciss_free_gendisk(h
, drv_index
);
2272 cciss_free_drive_info(h
, drv_index
);
2274 dev_warn(&h
->pdev
->dev
, "could not add disk 0.\n");
2278 /* This function will add and remove logical drives from the Logical
2279 * drive array of the controller and maintain persistency of ordering
2280 * so that mount points are preserved until the next reboot. This allows
2281 * for the removal of logical drives in the middle of the drive array
2282 * without a re-ordering of those drives.
2284 * h = The controller to perform the operations on
2286 static int rebuild_lun_table(ctlr_info_t
*h
, int first_time
,
2290 ReportLunData_struct
*ld_buff
= NULL
;
2296 unsigned char lunid
[8] = CTLR_LUNID
;
2297 unsigned long flags
;
2299 if (!capable(CAP_SYS_RAWIO
))
2302 /* Set busy_configuring flag for this operation */
2303 spin_lock_irqsave(&h
->lock
, flags
);
2304 if (h
->busy_configuring
) {
2305 spin_unlock_irqrestore(&h
->lock
, flags
);
2308 h
->busy_configuring
= 1;
2309 spin_unlock_irqrestore(&h
->lock
, flags
);
2311 ld_buff
= kzalloc(sizeof(ReportLunData_struct
), GFP_KERNEL
);
2312 if (ld_buff
== NULL
)
2315 return_code
= sendcmd_withirq(h
, CISS_REPORT_LOG
, ld_buff
,
2316 sizeof(ReportLunData_struct
),
2317 0, CTLR_LUNID
, TYPE_CMD
);
2319 if (return_code
== IO_OK
)
2320 listlength
= be32_to_cpu(*(__be32
*) ld_buff
->LUNListLength
);
2321 else { /* reading number of logical volumes failed */
2322 dev_warn(&h
->pdev
->dev
,
2323 "report logical volume command failed\n");
2328 num_luns
= listlength
/ 8; /* 8 bytes per entry */
2329 if (num_luns
> CISS_MAX_LUN
) {
2330 num_luns
= CISS_MAX_LUN
;
2331 dev_warn(&h
->pdev
->dev
, "more luns configured"
2332 " on controller than can be handled by"
2337 cciss_add_controller_node(h
);
2339 /* Compare controller drive array to driver's drive array
2340 * to see if any drives are missing on the controller due
2341 * to action of Array Config Utility (user deletes drive)
2342 * and deregister logical drives which have disappeared.
2344 for (i
= 0; i
<= h
->highest_lun
; i
++) {
2348 /* skip holes in the array from already deleted drives */
2349 if (h
->drv
[i
] == NULL
)
2352 for (j
= 0; j
< num_luns
; j
++) {
2353 memcpy(lunid
, &ld_buff
->LUN
[j
][0], sizeof(lunid
));
2354 if (memcmp(h
->drv
[i
]->LunID
, lunid
,
2355 sizeof(lunid
)) == 0) {
2361 /* Deregister it from the OS, it's gone. */
2362 spin_lock_irqsave(&h
->lock
, flags
);
2363 h
->drv
[i
]->busy_configuring
= 1;
2364 spin_unlock_irqrestore(&h
->lock
, flags
);
2365 return_code
= deregister_disk(h
, i
, 1, via_ioctl
);
2366 if (h
->drv
[i
] != NULL
)
2367 h
->drv
[i
]->busy_configuring
= 0;
2371 /* Compare controller drive array to driver's drive array.
2372 * Check for updates in the drive information and any new drives
2373 * on the controller due to ACU adding logical drives, or changing
2374 * a logical drive's size, etc. Reregister any new/changed drives
2376 for (i
= 0; i
< num_luns
; i
++) {
2381 memcpy(lunid
, &ld_buff
->LUN
[i
][0], sizeof(lunid
));
2382 /* Find if the LUN is already in the drive array
2383 * of the driver. If so then update its info
2384 * if not in use. If it does not exist then find
2385 * the first free index and add it.
2387 for (j
= 0; j
<= h
->highest_lun
; j
++) {
2388 if (h
->drv
[j
] != NULL
&&
2389 memcmp(h
->drv
[j
]->LunID
, lunid
,
2390 sizeof(h
->drv
[j
]->LunID
)) == 0) {
2397 /* check if the drive was found already in the array */
2399 drv_index
= cciss_add_gendisk(h
, lunid
, 0);
2400 if (drv_index
== -1)
2403 cciss_update_drive_info(h
, drv_index
, first_time
, via_ioctl
);
2408 h
->busy_configuring
= 0;
2409 /* We return -1 here to tell the ACU that we have registered/updated
2410 * all of the drives that we can and to keep it from calling us
2415 dev_err(&h
->pdev
->dev
, "out of memory\n");
2416 h
->busy_configuring
= 0;
2420 static void cciss_clear_drive_info(drive_info_struct
*drive_info
)
2422 /* zero out the disk size info */
2423 drive_info
->nr_blocks
= 0;
2424 drive_info
->block_size
= 0;
2425 drive_info
->heads
= 0;
2426 drive_info
->sectors
= 0;
2427 drive_info
->cylinders
= 0;
2428 drive_info
->raid_level
= -1;
2429 memset(drive_info
->serial_no
, 0, sizeof(drive_info
->serial_no
));
2430 memset(drive_info
->model
, 0, sizeof(drive_info
->model
));
2431 memset(drive_info
->rev
, 0, sizeof(drive_info
->rev
));
2432 memset(drive_info
->vendor
, 0, sizeof(drive_info
->vendor
));
2434 * don't clear the LUNID though, we need to remember which
2439 /* This function will deregister the disk and it's queue from the
2440 * kernel. It must be called with the controller lock held and the
2441 * drv structures busy_configuring flag set. It's parameters are:
2443 * disk = This is the disk to be deregistered
2444 * drv = This is the drive_info_struct associated with the disk to be
2445 * deregistered. It contains information about the disk used
2447 * clear_all = This flag determines whether or not the disk information
2448 * is going to be completely cleared out and the highest_lun
2449 * reset. Sometimes we want to clear out information about
2450 * the disk in preparation for re-adding it. In this case
2451 * the highest_lun should be left unchanged and the LunID
2452 * should not be cleared.
2454 * This indicates whether we've reached this path via ioctl.
2455 * This affects the maximum usage count allowed for c0d0 to be messed with.
2456 * If this path is reached via ioctl(), then the max_usage_count will
2457 * be 1, as the process calling ioctl() has got to have the device open.
2458 * If we get here via sysfs, then the max usage count will be zero.
2460 static int deregister_disk(ctlr_info_t
*h
, int drv_index
,
2461 int clear_all
, int via_ioctl
)
2464 struct gendisk
*disk
;
2465 drive_info_struct
*drv
;
2466 int recalculate_highest_lun
;
2468 if (!capable(CAP_SYS_RAWIO
))
2471 drv
= h
->drv
[drv_index
];
2472 disk
= h
->gendisk
[drv_index
];
2474 /* make sure logical volume is NOT is use */
2475 if (clear_all
|| (h
->gendisk
[0] == disk
)) {
2476 if (drv
->usage_count
> via_ioctl
)
2478 } else if (drv
->usage_count
> 0)
2481 recalculate_highest_lun
= (drv
== h
->drv
[h
->highest_lun
]);
2483 /* invalidate the devices and deregister the disk. If it is disk
2484 * zero do not deregister it but just zero out it's values. This
2485 * allows us to delete disk zero but keep the controller registered.
2487 if (h
->gendisk
[0] != disk
) {
2488 struct request_queue
*q
= disk
->queue
;
2489 if (disk
->flags
& GENHD_FL_UP
) {
2490 cciss_destroy_ld_sysfs_entry(h
, drv_index
, 0);
2494 blk_cleanup_queue(q
);
2495 /* If clear_all is set then we are deleting the logical
2496 * drive, not just refreshing its info. For drives
2497 * other than disk 0 we will call put_disk. We do not
2498 * do this for disk 0 as we need it to be able to
2499 * configure the controller.
2502 /* This isn't pretty, but we need to find the
2503 * disk in our array and NULL our the pointer.
2504 * This is so that we will call alloc_disk if
2505 * this index is used again later.
2507 for (i
=0; i
< CISS_MAX_LUN
; i
++){
2508 if (h
->gendisk
[i
] == disk
) {
2509 h
->gendisk
[i
] = NULL
;
2516 set_capacity(disk
, 0);
2517 cciss_clear_drive_info(drv
);
2522 /* if it was the last disk, find the new hightest lun */
2523 if (clear_all
&& recalculate_highest_lun
) {
2524 int newhighest
= -1;
2525 for (i
= 0; i
<= h
->highest_lun
; i
++) {
2526 /* if the disk has size > 0, it is available */
2527 if (h
->drv
[i
] && h
->drv
[i
]->heads
)
2530 h
->highest_lun
= newhighest
;
2535 static int fill_cmd(ctlr_info_t
*h
, CommandList_struct
*c
, __u8 cmd
, void *buff
,
2536 size_t size
, __u8 page_code
, unsigned char *scsi3addr
,
2539 u64bit buff_dma_handle
;
2542 c
->cmd_type
= CMD_IOCTL_PEND
;
2543 c
->Header
.ReplyQueue
= 0;
2545 c
->Header
.SGList
= 1;
2546 c
->Header
.SGTotal
= 1;
2548 c
->Header
.SGList
= 0;
2549 c
->Header
.SGTotal
= 0;
2551 c
->Header
.Tag
.lower
= c
->busaddr
;
2552 memcpy(c
->Header
.LUN
.LunAddrBytes
, scsi3addr
, 8);
2554 c
->Request
.Type
.Type
= cmd_type
;
2555 if (cmd_type
== TYPE_CMD
) {
2558 /* are we trying to read a vital product page */
2559 if (page_code
!= 0) {
2560 c
->Request
.CDB
[1] = 0x01;
2561 c
->Request
.CDB
[2] = page_code
;
2563 c
->Request
.CDBLen
= 6;
2564 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2565 c
->Request
.Type
.Direction
= XFER_READ
;
2566 c
->Request
.Timeout
= 0;
2567 c
->Request
.CDB
[0] = CISS_INQUIRY
;
2568 c
->Request
.CDB
[4] = size
& 0xFF;
2570 case CISS_REPORT_LOG
:
2571 case CISS_REPORT_PHYS
:
2572 /* Talking to controller so It's a physical command
2573 mode = 00 target = 0. Nothing to write.
2575 c
->Request
.CDBLen
= 12;
2576 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2577 c
->Request
.Type
.Direction
= XFER_READ
;
2578 c
->Request
.Timeout
= 0;
2579 c
->Request
.CDB
[0] = cmd
;
2580 c
->Request
.CDB
[6] = (size
>> 24) & 0xFF; /* MSB */
2581 c
->Request
.CDB
[7] = (size
>> 16) & 0xFF;
2582 c
->Request
.CDB
[8] = (size
>> 8) & 0xFF;
2583 c
->Request
.CDB
[9] = size
& 0xFF;
2586 case CCISS_READ_CAPACITY
:
2587 c
->Request
.CDBLen
= 10;
2588 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2589 c
->Request
.Type
.Direction
= XFER_READ
;
2590 c
->Request
.Timeout
= 0;
2591 c
->Request
.CDB
[0] = cmd
;
2593 case CCISS_READ_CAPACITY_16
:
2594 c
->Request
.CDBLen
= 16;
2595 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2596 c
->Request
.Type
.Direction
= XFER_READ
;
2597 c
->Request
.Timeout
= 0;
2598 c
->Request
.CDB
[0] = cmd
;
2599 c
->Request
.CDB
[1] = 0x10;
2600 c
->Request
.CDB
[10] = (size
>> 24) & 0xFF;
2601 c
->Request
.CDB
[11] = (size
>> 16) & 0xFF;
2602 c
->Request
.CDB
[12] = (size
>> 8) & 0xFF;
2603 c
->Request
.CDB
[13] = size
& 0xFF;
2604 c
->Request
.Timeout
= 0;
2605 c
->Request
.CDB
[0] = cmd
;
2607 case CCISS_CACHE_FLUSH
:
2608 c
->Request
.CDBLen
= 12;
2609 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2610 c
->Request
.Type
.Direction
= XFER_WRITE
;
2611 c
->Request
.Timeout
= 0;
2612 c
->Request
.CDB
[0] = BMIC_WRITE
;
2613 c
->Request
.CDB
[6] = BMIC_CACHE_FLUSH
;
2614 c
->Request
.CDB
[7] = (size
>> 8) & 0xFF;
2615 c
->Request
.CDB
[8] = size
& 0xFF;
2617 case TEST_UNIT_READY
:
2618 c
->Request
.CDBLen
= 6;
2619 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2620 c
->Request
.Type
.Direction
= XFER_NONE
;
2621 c
->Request
.Timeout
= 0;
2624 dev_warn(&h
->pdev
->dev
, "Unknown Command 0x%c\n", cmd
);
2627 } else if (cmd_type
== TYPE_MSG
) {
2629 case CCISS_ABORT_MSG
:
2630 c
->Request
.CDBLen
= 12;
2631 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2632 c
->Request
.Type
.Direction
= XFER_WRITE
;
2633 c
->Request
.Timeout
= 0;
2634 c
->Request
.CDB
[0] = cmd
; /* abort */
2635 c
->Request
.CDB
[1] = 0; /* abort a command */
2636 /* buff contains the tag of the command to abort */
2637 memcpy(&c
->Request
.CDB
[4], buff
, 8);
2639 case CCISS_RESET_MSG
:
2640 c
->Request
.CDBLen
= 16;
2641 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2642 c
->Request
.Type
.Direction
= XFER_NONE
;
2643 c
->Request
.Timeout
= 0;
2644 memset(&c
->Request
.CDB
[0], 0, sizeof(c
->Request
.CDB
));
2645 c
->Request
.CDB
[0] = cmd
; /* reset */
2646 c
->Request
.CDB
[1] = CCISS_RESET_TYPE_TARGET
;
2648 case CCISS_NOOP_MSG
:
2649 c
->Request
.CDBLen
= 1;
2650 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
2651 c
->Request
.Type
.Direction
= XFER_WRITE
;
2652 c
->Request
.Timeout
= 0;
2653 c
->Request
.CDB
[0] = cmd
;
2656 dev_warn(&h
->pdev
->dev
,
2657 "unknown message type %d\n", cmd
);
2661 dev_warn(&h
->pdev
->dev
, "unknown command type %d\n", cmd_type
);
2664 /* Fill in the scatter gather information */
2666 buff_dma_handle
.val
= (__u64
) pci_map_single(h
->pdev
,
2668 PCI_DMA_BIDIRECTIONAL
);
2669 c
->SG
[0].Addr
.lower
= buff_dma_handle
.val32
.lower
;
2670 c
->SG
[0].Addr
.upper
= buff_dma_handle
.val32
.upper
;
2671 c
->SG
[0].Len
= size
;
2672 c
->SG
[0].Ext
= 0; /* we are not chaining */
2677 static int cciss_send_reset(ctlr_info_t
*h
, unsigned char *scsi3addr
,
2680 CommandList_struct
*c
;
2686 return_status
= fill_cmd(h
, c
, CCISS_RESET_MSG
, NULL
, 0, 0,
2687 CTLR_LUNID
, TYPE_MSG
);
2688 c
->Request
.CDB
[1] = reset_type
; /* fill_cmd defaults to target reset */
2689 if (return_status
!= IO_OK
) {
2690 cmd_special_free(h
, c
);
2691 return return_status
;
2694 enqueue_cmd_and_start_io(h
, c
);
2695 /* Don't wait for completion, the reset won't complete. Don't free
2696 * the command either. This is the last command we will send before
2697 * re-initializing everything, so it doesn't matter and won't leak.
2702 static int check_target_status(ctlr_info_t
*h
, CommandList_struct
*c
)
2704 switch (c
->err_info
->ScsiStatus
) {
2707 case SAM_STAT_CHECK_CONDITION
:
2708 switch (0xf & c
->err_info
->SenseInfo
[2]) {
2709 case 0: return IO_OK
; /* no sense */
2710 case 1: return IO_OK
; /* recovered error */
2712 if (check_for_unit_attention(h
, c
))
2713 return IO_NEEDS_RETRY
;
2714 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x "
2715 "check condition, sense key = 0x%02x\n",
2716 c
->Request
.CDB
[0], c
->err_info
->SenseInfo
[2]);
2720 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x"
2721 "scsi status = 0x%02x\n",
2722 c
->Request
.CDB
[0], c
->err_info
->ScsiStatus
);
2728 static int process_sendcmd_error(ctlr_info_t
*h
, CommandList_struct
*c
)
2730 int return_status
= IO_OK
;
2732 if (c
->err_info
->CommandStatus
== CMD_SUCCESS
)
2735 switch (c
->err_info
->CommandStatus
) {
2736 case CMD_TARGET_STATUS
:
2737 return_status
= check_target_status(h
, c
);
2739 case CMD_DATA_UNDERRUN
:
2740 case CMD_DATA_OVERRUN
:
2741 /* expected for inquiry and report lun commands */
2744 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x is "
2745 "reported invalid\n", c
->Request
.CDB
[0]);
2746 return_status
= IO_ERROR
;
2748 case CMD_PROTOCOL_ERR
:
2749 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x has "
2750 "protocol error\n", c
->Request
.CDB
[0]);
2751 return_status
= IO_ERROR
;
2753 case CMD_HARDWARE_ERR
:
2754 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x had "
2755 " hardware error\n", c
->Request
.CDB
[0]);
2756 return_status
= IO_ERROR
;
2758 case CMD_CONNECTION_LOST
:
2759 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x had "
2760 "connection lost\n", c
->Request
.CDB
[0]);
2761 return_status
= IO_ERROR
;
2764 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x was "
2765 "aborted\n", c
->Request
.CDB
[0]);
2766 return_status
= IO_ERROR
;
2768 case CMD_ABORT_FAILED
:
2769 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x reports "
2770 "abort failed\n", c
->Request
.CDB
[0]);
2771 return_status
= IO_ERROR
;
2773 case CMD_UNSOLICITED_ABORT
:
2774 dev_warn(&h
->pdev
->dev
, "unsolicited abort 0x%02x\n",
2776 return_status
= IO_NEEDS_RETRY
;
2778 case CMD_UNABORTABLE
:
2779 dev_warn(&h
->pdev
->dev
, "cmd unabortable\n");
2780 return_status
= IO_ERROR
;
2783 dev_warn(&h
->pdev
->dev
, "cmd 0x%02x returned "
2784 "unknown status %x\n", c
->Request
.CDB
[0],
2785 c
->err_info
->CommandStatus
);
2786 return_status
= IO_ERROR
;
2788 return return_status
;
2791 static int sendcmd_withirq_core(ctlr_info_t
*h
, CommandList_struct
*c
,
2794 DECLARE_COMPLETION_ONSTACK(wait
);
2795 u64bit buff_dma_handle
;
2796 int return_status
= IO_OK
;
2800 enqueue_cmd_and_start_io(h
, c
);
2802 wait_for_completion(&wait
);
2804 if (c
->err_info
->CommandStatus
== 0 || !attempt_retry
)
2807 return_status
= process_sendcmd_error(h
, c
);
2809 if (return_status
== IO_NEEDS_RETRY
&&
2810 c
->retry_count
< MAX_CMD_RETRIES
) {
2811 dev_warn(&h
->pdev
->dev
, "retrying 0x%02x\n",
2814 /* erase the old error information */
2815 memset(c
->err_info
, 0, sizeof(ErrorInfo_struct
));
2816 return_status
= IO_OK
;
2817 reinit_completion(&wait
);
2822 /* unlock the buffers from DMA */
2823 buff_dma_handle
.val32
.lower
= c
->SG
[0].Addr
.lower
;
2824 buff_dma_handle
.val32
.upper
= c
->SG
[0].Addr
.upper
;
2825 pci_unmap_single(h
->pdev
, (dma_addr_t
) buff_dma_handle
.val
,
2826 c
->SG
[0].Len
, PCI_DMA_BIDIRECTIONAL
);
2827 return return_status
;
2830 static int sendcmd_withirq(ctlr_info_t
*h
, __u8 cmd
, void *buff
, size_t size
,
2831 __u8 page_code
, unsigned char scsi3addr
[],
2834 CommandList_struct
*c
;
2837 c
= cmd_special_alloc(h
);
2840 return_status
= fill_cmd(h
, c
, cmd
, buff
, size
, page_code
,
2841 scsi3addr
, cmd_type
);
2842 if (return_status
== IO_OK
)
2843 return_status
= sendcmd_withirq_core(h
, c
, 1);
2845 cmd_special_free(h
, c
);
2846 return return_status
;
2849 static void cciss_geometry_inquiry(ctlr_info_t
*h
, int logvol
,
2850 sector_t total_size
,
2851 unsigned int block_size
,
2852 InquiryData_struct
*inq_buff
,
2853 drive_info_struct
*drv
)
2857 unsigned char scsi3addr
[8];
2859 memset(inq_buff
, 0, sizeof(InquiryData_struct
));
2860 log_unit_to_scsi3addr(h
, scsi3addr
, logvol
);
2861 return_code
= sendcmd_withirq(h
, CISS_INQUIRY
, inq_buff
,
2862 sizeof(*inq_buff
), 0xC1, scsi3addr
, TYPE_CMD
);
2863 if (return_code
== IO_OK
) {
2864 if (inq_buff
->data_byte
[8] == 0xFF) {
2865 dev_warn(&h
->pdev
->dev
,
2866 "reading geometry failed, volume "
2867 "does not support reading geometry\n");
2869 drv
->sectors
= 32; /* Sectors per track */
2870 drv
->cylinders
= total_size
+ 1;
2871 drv
->raid_level
= RAID_UNKNOWN
;
2873 drv
->heads
= inq_buff
->data_byte
[6];
2874 drv
->sectors
= inq_buff
->data_byte
[7];
2875 drv
->cylinders
= (inq_buff
->data_byte
[4] & 0xff) << 8;
2876 drv
->cylinders
+= inq_buff
->data_byte
[5];
2877 drv
->raid_level
= inq_buff
->data_byte
[8];
2879 drv
->block_size
= block_size
;
2880 drv
->nr_blocks
= total_size
+ 1;
2881 t
= drv
->heads
* drv
->sectors
;
2883 sector_t real_size
= total_size
+ 1;
2884 unsigned long rem
= sector_div(real_size
, t
);
2887 drv
->cylinders
= real_size
;
2889 } else { /* Get geometry failed */
2890 dev_warn(&h
->pdev
->dev
, "reading geometry failed\n");
2895 cciss_read_capacity(ctlr_info_t
*h
, int logvol
, sector_t
*total_size
,
2896 unsigned int *block_size
)
2898 ReadCapdata_struct
*buf
;
2900 unsigned char scsi3addr
[8];
2902 buf
= kzalloc(sizeof(ReadCapdata_struct
), GFP_KERNEL
);
2904 dev_warn(&h
->pdev
->dev
, "out of memory\n");
2908 log_unit_to_scsi3addr(h
, scsi3addr
, logvol
);
2909 return_code
= sendcmd_withirq(h
, CCISS_READ_CAPACITY
, buf
,
2910 sizeof(ReadCapdata_struct
), 0, scsi3addr
, TYPE_CMD
);
2911 if (return_code
== IO_OK
) {
2912 *total_size
= be32_to_cpu(*(__be32
*) buf
->total_size
);
2913 *block_size
= be32_to_cpu(*(__be32
*) buf
->block_size
);
2914 } else { /* read capacity command failed */
2915 dev_warn(&h
->pdev
->dev
, "read capacity failed\n");
2917 *block_size
= BLOCK_SIZE
;
2922 static void cciss_read_capacity_16(ctlr_info_t
*h
, int logvol
,
2923 sector_t
*total_size
, unsigned int *block_size
)
2925 ReadCapdata_struct_16
*buf
;
2927 unsigned char scsi3addr
[8];
2929 buf
= kzalloc(sizeof(ReadCapdata_struct_16
), GFP_KERNEL
);
2931 dev_warn(&h
->pdev
->dev
, "out of memory\n");
2935 log_unit_to_scsi3addr(h
, scsi3addr
, logvol
);
2936 return_code
= sendcmd_withirq(h
, CCISS_READ_CAPACITY_16
,
2937 buf
, sizeof(ReadCapdata_struct_16
),
2938 0, scsi3addr
, TYPE_CMD
);
2939 if (return_code
== IO_OK
) {
2940 *total_size
= be64_to_cpu(*(__be64
*) buf
->total_size
);
2941 *block_size
= be32_to_cpu(*(__be32
*) buf
->block_size
);
2942 } else { /* read capacity command failed */
2943 dev_warn(&h
->pdev
->dev
, "read capacity failed\n");
2945 *block_size
= BLOCK_SIZE
;
2947 dev_info(&h
->pdev
->dev
, " blocks= %llu block_size= %d\n",
2948 (unsigned long long)*total_size
+1, *block_size
);
2952 static int cciss_revalidate(struct gendisk
*disk
)
2954 ctlr_info_t
*h
= get_host(disk
);
2955 drive_info_struct
*drv
= get_drv(disk
);
2958 unsigned int block_size
;
2959 sector_t total_size
;
2960 InquiryData_struct
*inq_buff
= NULL
;
2962 for (logvol
= 0; logvol
<= h
->highest_lun
; logvol
++) {
2963 if (!h
->drv
[logvol
])
2965 if (memcmp(h
->drv
[logvol
]->LunID
, drv
->LunID
,
2966 sizeof(drv
->LunID
)) == 0) {
2975 inq_buff
= kmalloc(sizeof(InquiryData_struct
), GFP_KERNEL
);
2976 if (inq_buff
== NULL
) {
2977 dev_warn(&h
->pdev
->dev
, "out of memory\n");
2980 if (h
->cciss_read
== CCISS_READ_10
) {
2981 cciss_read_capacity(h
, logvol
,
2982 &total_size
, &block_size
);
2984 cciss_read_capacity_16(h
, logvol
,
2985 &total_size
, &block_size
);
2987 cciss_geometry_inquiry(h
, logvol
, total_size
, block_size
,
2990 blk_queue_logical_block_size(drv
->queue
, drv
->block_size
);
2991 set_capacity(disk
, drv
->nr_blocks
);
2998 * Map (physical) PCI mem into (virtual) kernel space
3000 static void __iomem
*remap_pci_mem(ulong base
, ulong size
)
3002 ulong page_base
= ((ulong
) base
) & PAGE_MASK
;
3003 ulong page_offs
= ((ulong
) base
) - page_base
;
3004 void __iomem
*page_remapped
= ioremap(page_base
, page_offs
+ size
);
3006 return page_remapped
? (page_remapped
+ page_offs
) : NULL
;
3010 * Takes jobs of the Q and sends them to the hardware, then puts it on
3011 * the Q to wait for completion.
3013 static void start_io(ctlr_info_t
*h
)
3015 CommandList_struct
*c
;
3017 while (!list_empty(&h
->reqQ
)) {
3018 c
= list_entry(h
->reqQ
.next
, CommandList_struct
, list
);
3019 /* can't do anything if fifo is full */
3020 if ((h
->access
.fifo_full(h
))) {
3021 dev_warn(&h
->pdev
->dev
, "fifo full\n");
3025 /* Get the first entry from the Request Q */
3029 /* Tell the controller execute command */
3030 h
->access
.submit_command(h
, c
);
3032 /* Put job onto the completed Q */
3037 /* Assumes that h->lock is held. */
3038 /* Zeros out the error record and then resends the command back */
3039 /* to the controller */
3040 static inline void resend_cciss_cmd(ctlr_info_t
*h
, CommandList_struct
*c
)
3042 /* erase the old error information */
3043 memset(c
->err_info
, 0, sizeof(ErrorInfo_struct
));
3045 /* add it to software queue and then send it to the controller */
3048 if (h
->Qdepth
> h
->maxQsinceinit
)
3049 h
->maxQsinceinit
= h
->Qdepth
;
3054 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte
,
3055 unsigned int msg_byte
, unsigned int host_byte
,
3056 unsigned int driver_byte
)
3058 /* inverse of macros in scsi.h */
3059 return (scsi_status_byte
& 0xff) |
3060 ((msg_byte
& 0xff) << 8) |
3061 ((host_byte
& 0xff) << 16) |
3062 ((driver_byte
& 0xff) << 24);
3065 static inline int evaluate_target_status(ctlr_info_t
*h
,
3066 CommandList_struct
*cmd
, int *retry_cmd
)
3068 unsigned char sense_key
;
3069 unsigned char status_byte
, msg_byte
, host_byte
, driver_byte
;
3073 /* If we get in here, it means we got "target status", that is, scsi status */
3074 status_byte
= cmd
->err_info
->ScsiStatus
;
3075 driver_byte
= DRIVER_OK
;
3076 msg_byte
= cmd
->err_info
->CommandStatus
; /* correct? seems too device specific */
3078 if (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
)
3079 host_byte
= DID_PASSTHROUGH
;
3083 error_value
= make_status_bytes(status_byte
, msg_byte
,
3084 host_byte
, driver_byte
);
3086 if (cmd
->err_info
->ScsiStatus
!= SAM_STAT_CHECK_CONDITION
) {
3087 if (cmd
->rq
->cmd_type
!= REQ_TYPE_BLOCK_PC
)
3088 dev_warn(&h
->pdev
->dev
, "cmd %p "
3089 "has SCSI Status 0x%x\n",
3090 cmd
, cmd
->err_info
->ScsiStatus
);
3094 /* check the sense key */
3095 sense_key
= 0xf & cmd
->err_info
->SenseInfo
[2];
3096 /* no status or recovered error */
3097 if (((sense_key
== 0x0) || (sense_key
== 0x1)) &&
3098 (cmd
->rq
->cmd_type
!= REQ_TYPE_BLOCK_PC
))
3101 if (check_for_unit_attention(h
, cmd
)) {
3102 *retry_cmd
= !(cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
);
3106 /* Not SG_IO or similar? */
3107 if (cmd
->rq
->cmd_type
!= REQ_TYPE_BLOCK_PC
) {
3108 if (error_value
!= 0)
3109 dev_warn(&h
->pdev
->dev
, "cmd %p has CHECK CONDITION"
3110 " sense key = 0x%x\n", cmd
, sense_key
);
3114 /* SG_IO or similar, copy sense data back */
3115 if (cmd
->rq
->sense
) {
3116 if (cmd
->rq
->sense_len
> cmd
->err_info
->SenseLen
)
3117 cmd
->rq
->sense_len
= cmd
->err_info
->SenseLen
;
3118 memcpy(cmd
->rq
->sense
, cmd
->err_info
->SenseInfo
,
3119 cmd
->rq
->sense_len
);
3121 cmd
->rq
->sense_len
= 0;
3126 /* checks the status of the job and calls complete buffers to mark all
3127 * buffers for the completed job. Note that this function does not need
3128 * to hold the hba/queue lock.
3130 static inline void complete_command(ctlr_info_t
*h
, CommandList_struct
*cmd
,
3134 struct request
*rq
= cmd
->rq
;
3139 rq
->errors
= make_status_bytes(0, 0, 0, DRIVER_TIMEOUT
);
3141 if (cmd
->err_info
->CommandStatus
== 0) /* no error has occurred */
3142 goto after_error_processing
;
3144 switch (cmd
->err_info
->CommandStatus
) {
3145 case CMD_TARGET_STATUS
:
3146 rq
->errors
= evaluate_target_status(h
, cmd
, &retry_cmd
);
3148 case CMD_DATA_UNDERRUN
:
3149 if (cmd
->rq
->cmd_type
== REQ_TYPE_FS
) {
3150 dev_warn(&h
->pdev
->dev
, "cmd %p has"
3151 " completed with data underrun "
3153 cmd
->rq
->resid_len
= cmd
->err_info
->ResidualCnt
;
3156 case CMD_DATA_OVERRUN
:
3157 if (cmd
->rq
->cmd_type
== REQ_TYPE_FS
)
3158 dev_warn(&h
->pdev
->dev
, "cciss: cmd %p has"
3159 " completed with data overrun "
3163 dev_warn(&h
->pdev
->dev
, "cciss: cmd %p is "
3164 "reported invalid\n", cmd
);
3165 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3166 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3167 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3168 DID_PASSTHROUGH
: DID_ERROR
);
3170 case CMD_PROTOCOL_ERR
:
3171 dev_warn(&h
->pdev
->dev
, "cciss: cmd %p has "
3172 "protocol error\n", cmd
);
3173 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3174 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3175 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3176 DID_PASSTHROUGH
: DID_ERROR
);
3178 case CMD_HARDWARE_ERR
:
3179 dev_warn(&h
->pdev
->dev
, "cciss: cmd %p had "
3180 " hardware error\n", cmd
);
3181 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3182 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3183 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3184 DID_PASSTHROUGH
: DID_ERROR
);
3186 case CMD_CONNECTION_LOST
:
3187 dev_warn(&h
->pdev
->dev
, "cciss: cmd %p had "
3188 "connection lost\n", cmd
);
3189 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3190 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3191 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3192 DID_PASSTHROUGH
: DID_ERROR
);
3195 dev_warn(&h
->pdev
->dev
, "cciss: cmd %p was "
3197 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3198 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3199 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3200 DID_PASSTHROUGH
: DID_ABORT
);
3202 case CMD_ABORT_FAILED
:
3203 dev_warn(&h
->pdev
->dev
, "cciss: cmd %p reports "
3204 "abort failed\n", cmd
);
3205 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3206 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3207 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3208 DID_PASSTHROUGH
: DID_ERROR
);
3210 case CMD_UNSOLICITED_ABORT
:
3211 dev_warn(&h
->pdev
->dev
, "cciss%d: unsolicited "
3212 "abort %p\n", h
->ctlr
, cmd
);
3213 if (cmd
->retry_count
< MAX_CMD_RETRIES
) {
3215 dev_warn(&h
->pdev
->dev
, "retrying %p\n", cmd
);
3218 dev_warn(&h
->pdev
->dev
,
3219 "%p retried too many times\n", cmd
);
3220 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3221 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3222 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3223 DID_PASSTHROUGH
: DID_ABORT
);
3226 dev_warn(&h
->pdev
->dev
, "cmd %p timedout\n", cmd
);
3227 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3228 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3229 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3230 DID_PASSTHROUGH
: DID_ERROR
);
3232 case CMD_UNABORTABLE
:
3233 dev_warn(&h
->pdev
->dev
, "cmd %p unabortable\n", cmd
);
3234 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3235 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3236 cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
?
3237 DID_PASSTHROUGH
: DID_ERROR
);
3240 dev_warn(&h
->pdev
->dev
, "cmd %p returned "
3241 "unknown status %x\n", cmd
,
3242 cmd
->err_info
->CommandStatus
);
3243 rq
->errors
= make_status_bytes(SAM_STAT_GOOD
,
3244 cmd
->err_info
->CommandStatus
, DRIVER_OK
,
3245 (cmd
->rq
->cmd_type
== REQ_TYPE_BLOCK_PC
) ?
3246 DID_PASSTHROUGH
: DID_ERROR
);
3249 after_error_processing
:
3251 /* We need to return this command */
3253 resend_cciss_cmd(h
, cmd
);
3256 cmd
->rq
->completion_data
= cmd
;
3257 blk_complete_request(cmd
->rq
);
3260 static inline u32
cciss_tag_contains_index(u32 tag
)
3262 #define DIRECT_LOOKUP_BIT 0x10
3263 return tag
& DIRECT_LOOKUP_BIT
;
3266 static inline u32
cciss_tag_to_index(u32 tag
)
3268 #define DIRECT_LOOKUP_SHIFT 5
3269 return tag
>> DIRECT_LOOKUP_SHIFT
;
3272 static inline u32
cciss_tag_discard_error_bits(ctlr_info_t
*h
, u32 tag
)
3274 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3275 #define CCISS_SIMPLE_ERROR_BITS 0x03
3276 if (likely(h
->transMethod
& CFGTBL_Trans_Performant
))
3277 return tag
& ~CCISS_PERF_ERROR_BITS
;
3278 return tag
& ~CCISS_SIMPLE_ERROR_BITS
;
3281 static inline void cciss_mark_tag_indexed(u32
*tag
)
3283 *tag
|= DIRECT_LOOKUP_BIT
;
3286 static inline void cciss_set_tag_index(u32
*tag
, u32 index
)
3288 *tag
|= (index
<< DIRECT_LOOKUP_SHIFT
);
3292 * Get a request and submit it to the controller.
3294 static void do_cciss_request(struct request_queue
*q
)
3296 ctlr_info_t
*h
= q
->queuedata
;
3297 CommandList_struct
*c
;
3300 struct request
*creq
;
3302 struct scatterlist
*tmp_sg
;
3303 SGDescriptor_struct
*curr_sg
;
3304 drive_info_struct
*drv
;
3310 creq
= blk_peek_request(q
);
3314 BUG_ON(creq
->nr_phys_segments
> h
->maxsgentries
);
3320 blk_start_request(creq
);
3322 tmp_sg
= h
->scatter_list
[c
->cmdindex
];
3323 spin_unlock_irq(q
->queue_lock
);
3325 c
->cmd_type
= CMD_RWREQ
;
3328 /* fill in the request */
3329 drv
= creq
->rq_disk
->private_data
;
3330 c
->Header
.ReplyQueue
= 0; /* unused in simple mode */
3331 /* got command from pool, so use the command block index instead */
3332 /* for direct lookups. */
3333 /* The first 2 bits are reserved for controller error reporting. */
3334 cciss_set_tag_index(&c
->Header
.Tag
.lower
, c
->cmdindex
);
3335 cciss_mark_tag_indexed(&c
->Header
.Tag
.lower
);
3336 memcpy(&c
->Header
.LUN
, drv
->LunID
, sizeof(drv
->LunID
));
3337 c
->Request
.CDBLen
= 10; /* 12 byte commands not in FW yet; */
3338 c
->Request
.Type
.Type
= TYPE_CMD
; /* It is a command. */
3339 c
->Request
.Type
.Attribute
= ATTR_SIMPLE
;
3340 c
->Request
.Type
.Direction
=
3341 (rq_data_dir(creq
) == READ
) ? XFER_READ
: XFER_WRITE
;
3342 c
->Request
.Timeout
= 0; /* Don't time out */
3344 (rq_data_dir(creq
) == READ
) ? h
->cciss_read
: h
->cciss_write
;
3345 start_blk
= blk_rq_pos(creq
);
3346 dev_dbg(&h
->pdev
->dev
, "sector =%d nr_sectors=%d\n",
3347 (int)blk_rq_pos(creq
), (int)blk_rq_sectors(creq
));
3348 sg_init_table(tmp_sg
, h
->maxsgentries
);
3349 seg
= blk_rq_map_sg(q
, creq
, tmp_sg
);
3351 /* get the DMA records for the setup */
3352 if (c
->Request
.Type
.Direction
== XFER_READ
)
3353 dir
= PCI_DMA_FROMDEVICE
;
3355 dir
= PCI_DMA_TODEVICE
;
3361 for (i
= 0; i
< seg
; i
++) {
3362 if (((sg_index
+1) == (h
->max_cmd_sgentries
)) &&
3363 !chained
&& ((seg
- i
) > 1)) {
3364 /* Point to next chain block. */
3365 curr_sg
= h
->cmd_sg_list
[c
->cmdindex
];
3369 curr_sg
[sg_index
].Len
= tmp_sg
[i
].length
;
3370 temp64
.val
= (__u64
) pci_map_page(h
->pdev
, sg_page(&tmp_sg
[i
]),
3372 tmp_sg
[i
].length
, dir
);
3373 curr_sg
[sg_index
].Addr
.lower
= temp64
.val32
.lower
;
3374 curr_sg
[sg_index
].Addr
.upper
= temp64
.val32
.upper
;
3375 curr_sg
[sg_index
].Ext
= 0; /* we are not chaining */
3379 cciss_map_sg_chain_block(h
, c
, h
->cmd_sg_list
[c
->cmdindex
],
3380 (seg
- (h
->max_cmd_sgentries
- 1)) *
3381 sizeof(SGDescriptor_struct
));
3383 /* track how many SG entries we are using */
3387 dev_dbg(&h
->pdev
->dev
, "Submitting %u sectors in %d segments "
3389 blk_rq_sectors(creq
), seg
, chained
);
3391 c
->Header
.SGTotal
= seg
+ chained
;
3392 if (seg
<= h
->max_cmd_sgentries
)
3393 c
->Header
.SGList
= c
->Header
.SGTotal
;
3395 c
->Header
.SGList
= h
->max_cmd_sgentries
;
3396 set_performant_mode(h
, c
);
3398 if (likely(creq
->cmd_type
== REQ_TYPE_FS
)) {
3399 if(h
->cciss_read
== CCISS_READ_10
) {
3400 c
->Request
.CDB
[1] = 0;
3401 c
->Request
.CDB
[2] = (start_blk
>> 24) & 0xff; /* MSB */
3402 c
->Request
.CDB
[3] = (start_blk
>> 16) & 0xff;
3403 c
->Request
.CDB
[4] = (start_blk
>> 8) & 0xff;
3404 c
->Request
.CDB
[5] = start_blk
& 0xff;
3405 c
->Request
.CDB
[6] = 0; /* (sect >> 24) & 0xff; MSB */
3406 c
->Request
.CDB
[7] = (blk_rq_sectors(creq
) >> 8) & 0xff;
3407 c
->Request
.CDB
[8] = blk_rq_sectors(creq
) & 0xff;
3408 c
->Request
.CDB
[9] = c
->Request
.CDB
[11] = c
->Request
.CDB
[12] = 0;
3410 u32 upper32
= upper_32_bits(start_blk
);
3412 c
->Request
.CDBLen
= 16;
3413 c
->Request
.CDB
[1]= 0;
3414 c
->Request
.CDB
[2]= (upper32
>> 24) & 0xff; /* MSB */
3415 c
->Request
.CDB
[3]= (upper32
>> 16) & 0xff;
3416 c
->Request
.CDB
[4]= (upper32
>> 8) & 0xff;
3417 c
->Request
.CDB
[5]= upper32
& 0xff;
3418 c
->Request
.CDB
[6]= (start_blk
>> 24) & 0xff;
3419 c
->Request
.CDB
[7]= (start_blk
>> 16) & 0xff;
3420 c
->Request
.CDB
[8]= (start_blk
>> 8) & 0xff;
3421 c
->Request
.CDB
[9]= start_blk
& 0xff;
3422 c
->Request
.CDB
[10]= (blk_rq_sectors(creq
) >> 24) & 0xff;
3423 c
->Request
.CDB
[11]= (blk_rq_sectors(creq
) >> 16) & 0xff;
3424 c
->Request
.CDB
[12]= (blk_rq_sectors(creq
) >> 8) & 0xff;
3425 c
->Request
.CDB
[13]= blk_rq_sectors(creq
) & 0xff;
3426 c
->Request
.CDB
[14] = c
->Request
.CDB
[15] = 0;
3428 } else if (creq
->cmd_type
== REQ_TYPE_BLOCK_PC
) {
3429 c
->Request
.CDBLen
= creq
->cmd_len
;
3430 memcpy(c
->Request
.CDB
, creq
->cmd
, BLK_MAX_CDB
);
3432 dev_warn(&h
->pdev
->dev
, "bad request type %d\n",
3437 spin_lock_irq(q
->queue_lock
);
3441 if (h
->Qdepth
> h
->maxQsinceinit
)
3442 h
->maxQsinceinit
= h
->Qdepth
;
3448 /* We will already have the driver lock here so not need
3454 static inline unsigned long get_next_completion(ctlr_info_t
*h
)
3456 return h
->access
.command_completed(h
);
3459 static inline int interrupt_pending(ctlr_info_t
*h
)
3461 return h
->access
.intr_pending(h
);
3464 static inline long interrupt_not_for_us(ctlr_info_t
*h
)
3466 return ((h
->access
.intr_pending(h
) == 0) ||
3467 (h
->interrupts_enabled
== 0));
3470 static inline int bad_tag(ctlr_info_t
*h
, u32 tag_index
,
3473 if (unlikely(tag_index
>= h
->nr_cmds
)) {
3474 dev_warn(&h
->pdev
->dev
, "bad tag 0x%08x ignored.\n", raw_tag
);
3480 static inline void finish_cmd(ctlr_info_t
*h
, CommandList_struct
*c
,
3484 if (likely(c
->cmd_type
== CMD_RWREQ
))
3485 complete_command(h
, c
, 0);
3486 else if (c
->cmd_type
== CMD_IOCTL_PEND
)
3487 complete(c
->waiting
);
3488 #ifdef CONFIG_CISS_SCSI_TAPE
3489 else if (c
->cmd_type
== CMD_SCSI
)
3490 complete_scsi_command(c
, 0, raw_tag
);
3494 static inline u32
next_command(ctlr_info_t
*h
)
3498 if (unlikely(!(h
->transMethod
& CFGTBL_Trans_Performant
)))
3499 return h
->access
.command_completed(h
);
3501 if ((*(h
->reply_pool_head
) & 1) == (h
->reply_pool_wraparound
)) {
3502 a
= *(h
->reply_pool_head
); /* Next cmd in ring buffer */
3503 (h
->reply_pool_head
)++;
3504 h
->commands_outstanding
--;
3508 /* Check for wraparound */
3509 if (h
->reply_pool_head
== (h
->reply_pool
+ h
->max_commands
)) {
3510 h
->reply_pool_head
= h
->reply_pool
;
3511 h
->reply_pool_wraparound
^= 1;
3516 /* process completion of an indexed ("direct lookup") command */
3517 static inline u32
process_indexed_cmd(ctlr_info_t
*h
, u32 raw_tag
)
3520 CommandList_struct
*c
;
3522 tag_index
= cciss_tag_to_index(raw_tag
);
3523 if (bad_tag(h
, tag_index
, raw_tag
))
3524 return next_command(h
);
3525 c
= h
->cmd_pool
+ tag_index
;
3526 finish_cmd(h
, c
, raw_tag
);
3527 return next_command(h
);
3530 /* process completion of a non-indexed command */
3531 static inline u32
process_nonindexed_cmd(ctlr_info_t
*h
, u32 raw_tag
)
3533 CommandList_struct
*c
= NULL
;
3534 __u32 busaddr_masked
, tag_masked
;
3536 tag_masked
= cciss_tag_discard_error_bits(h
, raw_tag
);
3537 list_for_each_entry(c
, &h
->cmpQ
, list
) {
3538 busaddr_masked
= cciss_tag_discard_error_bits(h
, c
->busaddr
);
3539 if (busaddr_masked
== tag_masked
) {
3540 finish_cmd(h
, c
, raw_tag
);
3541 return next_command(h
);
3544 bad_tag(h
, h
->nr_cmds
+ 1, raw_tag
);
3545 return next_command(h
);
3548 /* Some controllers, like p400, will give us one interrupt
3549 * after a soft reset, even if we turned interrupts off.
3550 * Only need to check for this in the cciss_xxx_discard_completions
3553 static int ignore_bogus_interrupt(ctlr_info_t
*h
)
3555 if (likely(!reset_devices
))
3558 if (likely(h
->interrupts_enabled
))
3561 dev_info(&h
->pdev
->dev
, "Received interrupt while interrupts disabled "
3562 "(known firmware bug.) Ignoring.\n");
3567 static irqreturn_t
cciss_intx_discard_completions(int irq
, void *dev_id
)
3569 ctlr_info_t
*h
= dev_id
;
3570 unsigned long flags
;
3573 if (ignore_bogus_interrupt(h
))
3576 if (interrupt_not_for_us(h
))
3578 spin_lock_irqsave(&h
->lock
, flags
);
3579 while (interrupt_pending(h
)) {
3580 raw_tag
= get_next_completion(h
);
3581 while (raw_tag
!= FIFO_EMPTY
)
3582 raw_tag
= next_command(h
);
3584 spin_unlock_irqrestore(&h
->lock
, flags
);
3588 static irqreturn_t
cciss_msix_discard_completions(int irq
, void *dev_id
)
3590 ctlr_info_t
*h
= dev_id
;
3591 unsigned long flags
;
3594 if (ignore_bogus_interrupt(h
))
3597 spin_lock_irqsave(&h
->lock
, flags
);
3598 raw_tag
= get_next_completion(h
);
3599 while (raw_tag
!= FIFO_EMPTY
)
3600 raw_tag
= next_command(h
);
3601 spin_unlock_irqrestore(&h
->lock
, flags
);
3605 static irqreturn_t
do_cciss_intx(int irq
, void *dev_id
)
3607 ctlr_info_t
*h
= dev_id
;
3608 unsigned long flags
;
3611 if (interrupt_not_for_us(h
))
3613 spin_lock_irqsave(&h
->lock
, flags
);
3614 while (interrupt_pending(h
)) {
3615 raw_tag
= get_next_completion(h
);
3616 while (raw_tag
!= FIFO_EMPTY
) {
3617 if (cciss_tag_contains_index(raw_tag
))
3618 raw_tag
= process_indexed_cmd(h
, raw_tag
);
3620 raw_tag
= process_nonindexed_cmd(h
, raw_tag
);
3623 spin_unlock_irqrestore(&h
->lock
, flags
);
3627 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3628 * check the interrupt pending register because it is not set.
3630 static irqreturn_t
do_cciss_msix_intr(int irq
, void *dev_id
)
3632 ctlr_info_t
*h
= dev_id
;
3633 unsigned long flags
;
3636 spin_lock_irqsave(&h
->lock
, flags
);
3637 raw_tag
= get_next_completion(h
);
3638 while (raw_tag
!= FIFO_EMPTY
) {
3639 if (cciss_tag_contains_index(raw_tag
))
3640 raw_tag
= process_indexed_cmd(h
, raw_tag
);
3642 raw_tag
= process_nonindexed_cmd(h
, raw_tag
);
3644 spin_unlock_irqrestore(&h
->lock
, flags
);
3649 * add_to_scan_list() - add controller to rescan queue
3650 * @h: Pointer to the controller.
3652 * Adds the controller to the rescan queue if not already on the queue.
3654 * returns 1 if added to the queue, 0 if skipped (could be on the
3655 * queue already, or the controller could be initializing or shutting
3658 static int add_to_scan_list(struct ctlr_info
*h
)
3660 struct ctlr_info
*test_h
;
3664 if (h
->busy_initializing
)
3667 if (!mutex_trylock(&h
->busy_shutting_down
))
3670 mutex_lock(&scan_mutex
);
3671 list_for_each_entry(test_h
, &scan_q
, scan_list
) {
3677 if (!found
&& !h
->busy_scanning
) {
3678 reinit_completion(&h
->scan_wait
);
3679 list_add_tail(&h
->scan_list
, &scan_q
);
3682 mutex_unlock(&scan_mutex
);
3683 mutex_unlock(&h
->busy_shutting_down
);
3689 * remove_from_scan_list() - remove controller from rescan queue
3690 * @h: Pointer to the controller.
3692 * Removes the controller from the rescan queue if present. Blocks if
3693 * the controller is currently conducting a rescan. The controller
3694 * can be in one of three states:
3695 * 1. Doesn't need a scan
3696 * 2. On the scan list, but not scanning yet (we remove it)
3697 * 3. Busy scanning (and not on the list). In this case we want to wait for
3698 * the scan to complete to make sure the scanning thread for this
3699 * controller is completely idle.
3701 static void remove_from_scan_list(struct ctlr_info
*h
)
3703 struct ctlr_info
*test_h
, *tmp_h
;
3705 mutex_lock(&scan_mutex
);
3706 list_for_each_entry_safe(test_h
, tmp_h
, &scan_q
, scan_list
) {
3707 if (test_h
== h
) { /* state 2. */
3708 list_del(&h
->scan_list
);
3709 complete_all(&h
->scan_wait
);
3710 mutex_unlock(&scan_mutex
);
3714 if (h
->busy_scanning
) { /* state 3. */
3715 mutex_unlock(&scan_mutex
);
3716 wait_for_completion(&h
->scan_wait
);
3717 } else { /* state 1, nothing to do. */
3718 mutex_unlock(&scan_mutex
);
3723 * scan_thread() - kernel thread used to rescan controllers
3726 * A kernel thread used scan for drive topology changes on
3727 * controllers. The thread processes only one controller at a time
3728 * using a queue. Controllers are added to the queue using
3729 * add_to_scan_list() and removed from the queue either after done
3730 * processing or using remove_from_scan_list().
3734 static int scan_thread(void *data
)
3736 struct ctlr_info
*h
;
3739 set_current_state(TASK_INTERRUPTIBLE
);
3741 if (kthread_should_stop())
3745 mutex_lock(&scan_mutex
);
3746 if (list_empty(&scan_q
)) {
3747 mutex_unlock(&scan_mutex
);
3751 h
= list_entry(scan_q
.next
,
3754 list_del(&h
->scan_list
);
3755 h
->busy_scanning
= 1;
3756 mutex_unlock(&scan_mutex
);
3758 rebuild_lun_table(h
, 0, 0);
3759 complete_all(&h
->scan_wait
);
3760 mutex_lock(&scan_mutex
);
3761 h
->busy_scanning
= 0;
3762 mutex_unlock(&scan_mutex
);
3769 static int check_for_unit_attention(ctlr_info_t
*h
, CommandList_struct
*c
)
3771 if (c
->err_info
->SenseInfo
[2] != UNIT_ATTENTION
)
3774 switch (c
->err_info
->SenseInfo
[12]) {
3776 dev_warn(&h
->pdev
->dev
, "a state change "
3777 "detected, command retried\n");
3781 dev_warn(&h
->pdev
->dev
, "LUN failure "
3782 "detected, action required\n");
3785 case REPORT_LUNS_CHANGED
:
3786 dev_warn(&h
->pdev
->dev
, "report LUN data changed\n");
3788 * Here, we could call add_to_scan_list and wake up the scan thread,
3789 * except that it's quite likely that we will get more than one
3790 * REPORT_LUNS_CHANGED condition in quick succession, which means
3791 * that those which occur after the first one will likely happen
3792 * *during* the scan_thread's rescan. And the rescan code is not
3793 * robust enough to restart in the middle, undoing what it has already
3794 * done, and it's not clear that it's even possible to do this, since
3795 * part of what it does is notify the block layer, which starts
3796 * doing it's own i/o to read partition tables and so on, and the
3797 * driver doesn't have visibility to know what might need undoing.
3798 * In any event, if possible, it is horribly complicated to get right
3799 * so we just don't do it for now.
3801 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3805 case POWER_OR_RESET
:
3806 dev_warn(&h
->pdev
->dev
,
3807 "a power on or device reset detected\n");
3810 case UNIT_ATTENTION_CLEARED
:
3811 dev_warn(&h
->pdev
->dev
,
3812 "unit attention cleared by another initiator\n");
3816 dev_warn(&h
->pdev
->dev
, "unknown unit attention detected\n");
3822 * We cannot read the structure directly, for portability we must use
3824 * This is for debug only.
3826 static void print_cfg_table(ctlr_info_t
*h
)
3830 CfgTable_struct
*tb
= h
->cfgtable
;
3832 dev_dbg(&h
->pdev
->dev
, "Controller Configuration information\n");
3833 dev_dbg(&h
->pdev
->dev
, "------------------------------------\n");
3834 for (i
= 0; i
< 4; i
++)
3835 temp_name
[i
] = readb(&(tb
->Signature
[i
]));
3836 temp_name
[4] = '\0';
3837 dev_dbg(&h
->pdev
->dev
, " Signature = %s\n", temp_name
);
3838 dev_dbg(&h
->pdev
->dev
, " Spec Number = %d\n",
3839 readl(&(tb
->SpecValence
)));
3840 dev_dbg(&h
->pdev
->dev
, " Transport methods supported = 0x%x\n",
3841 readl(&(tb
->TransportSupport
)));
3842 dev_dbg(&h
->pdev
->dev
, " Transport methods active = 0x%x\n",
3843 readl(&(tb
->TransportActive
)));
3844 dev_dbg(&h
->pdev
->dev
, " Requested transport Method = 0x%x\n",
3845 readl(&(tb
->HostWrite
.TransportRequest
)));
3846 dev_dbg(&h
->pdev
->dev
, " Coalesce Interrupt Delay = 0x%x\n",
3847 readl(&(tb
->HostWrite
.CoalIntDelay
)));
3848 dev_dbg(&h
->pdev
->dev
, " Coalesce Interrupt Count = 0x%x\n",
3849 readl(&(tb
->HostWrite
.CoalIntCount
)));
3850 dev_dbg(&h
->pdev
->dev
, " Max outstanding commands = 0x%x\n",
3851 readl(&(tb
->CmdsOutMax
)));
3852 dev_dbg(&h
->pdev
->dev
, " Bus Types = 0x%x\n",
3853 readl(&(tb
->BusTypes
)));
3854 for (i
= 0; i
< 16; i
++)
3855 temp_name
[i
] = readb(&(tb
->ServerName
[i
]));
3856 temp_name
[16] = '\0';
3857 dev_dbg(&h
->pdev
->dev
, " Server Name = %s\n", temp_name
);
3858 dev_dbg(&h
->pdev
->dev
, " Heartbeat Counter = 0x%x\n\n\n",
3859 readl(&(tb
->HeartBeat
)));
3862 static int find_PCI_BAR_index(struct pci_dev
*pdev
, unsigned long pci_bar_addr
)
3864 int i
, offset
, mem_type
, bar_type
;
3865 if (pci_bar_addr
== PCI_BASE_ADDRESS_0
) /* looking for BAR zero? */
3868 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
3869 bar_type
= pci_resource_flags(pdev
, i
) & PCI_BASE_ADDRESS_SPACE
;
3870 if (bar_type
== PCI_BASE_ADDRESS_SPACE_IO
)
3873 mem_type
= pci_resource_flags(pdev
, i
) &
3874 PCI_BASE_ADDRESS_MEM_TYPE_MASK
;
3876 case PCI_BASE_ADDRESS_MEM_TYPE_32
:
3877 case PCI_BASE_ADDRESS_MEM_TYPE_1M
:
3878 offset
+= 4; /* 32 bit */
3880 case PCI_BASE_ADDRESS_MEM_TYPE_64
:
3883 default: /* reserved in PCI 2.2 */
3884 dev_warn(&pdev
->dev
,
3885 "Base address is invalid\n");
3890 if (offset
== pci_bar_addr
- PCI_BASE_ADDRESS_0
)
3896 /* Fill in bucket_map[], given nsgs (the max number of
3897 * scatter gather elements supported) and bucket[],
3898 * which is an array of 8 integers. The bucket[] array
3899 * contains 8 different DMA transfer sizes (in 16
3900 * byte increments) which the controller uses to fetch
3901 * commands. This function fills in bucket_map[], which
3902 * maps a given number of scatter gather elements to one of
3903 * the 8 DMA transfer sizes. The point of it is to allow the
3904 * controller to only do as much DMA as needed to fetch the
3905 * command, with the DMA transfer size encoded in the lower
3906 * bits of the command address.
3908 static void calc_bucket_map(int bucket
[], int num_buckets
,
3909 int nsgs
, int *bucket_map
)
3913 /* even a command with 0 SGs requires 4 blocks */
3914 #define MINIMUM_TRANSFER_BLOCKS 4
3915 #define NUM_BUCKETS 8
3916 /* Note, bucket_map must have nsgs+1 entries. */
3917 for (i
= 0; i
<= nsgs
; i
++) {
3918 /* Compute size of a command with i SG entries */
3919 size
= i
+ MINIMUM_TRANSFER_BLOCKS
;
3920 b
= num_buckets
; /* Assume the biggest bucket */
3921 /* Find the bucket that is just big enough */
3922 for (j
= 0; j
< 8; j
++) {
3923 if (bucket
[j
] >= size
) {
3928 /* for a command with i SG entries, use bucket b. */
3933 static void cciss_wait_for_mode_change_ack(ctlr_info_t
*h
)
3937 /* under certain very rare conditions, this can take awhile.
3938 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3939 * as we enter this code.) */
3940 for (i
= 0; i
< MAX_CONFIG_WAIT
; i
++) {
3941 if (!(readl(h
->vaddr
+ SA5_DOORBELL
) & CFGTBL_ChangeReq
))
3943 usleep_range(10000, 20000);
3947 static void cciss_enter_performant_mode(ctlr_info_t
*h
, u32 use_short_tags
)
3949 /* This is a bit complicated. There are 8 registers on
3950 * the controller which we write to to tell it 8 different
3951 * sizes of commands which there may be. It's a way of
3952 * reducing the DMA done to fetch each command. Encoded into
3953 * each command's tag are 3 bits which communicate to the controller
3954 * which of the eight sizes that command fits within. The size of
3955 * each command depends on how many scatter gather entries there are.
3956 * Each SG entry requires 16 bytes. The eight registers are programmed
3957 * with the number of 16-byte blocks a command of that size requires.
3958 * The smallest command possible requires 5 such 16 byte blocks.
3959 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3960 * blocks. Note, this only extends to the SG entries contained
3961 * within the command block, and does not extend to chained blocks
3962 * of SG elements. bft[] contains the eight values we write to
3963 * the registers. They are not evenly distributed, but have more
3964 * sizes for small commands, and fewer sizes for larger commands.
3967 int bft
[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES
+ 4};
3969 * 5 = 1 s/g entry or 4k
3970 * 6 = 2 s/g entry or 8k
3971 * 8 = 4 s/g entry or 16k
3972 * 10 = 6 s/g entry or 24k
3974 unsigned long register_value
;
3975 BUILD_BUG_ON(28 > MAXSGENTRIES
+ 4);
3977 h
->reply_pool_wraparound
= 1; /* spec: init to 1 */
3979 /* Controller spec: zero out this buffer. */
3980 memset(h
->reply_pool
, 0, h
->max_commands
* sizeof(__u64
));
3981 h
->reply_pool_head
= h
->reply_pool
;
3983 trans_offset
= readl(&(h
->cfgtable
->TransMethodOffset
));
3984 calc_bucket_map(bft
, ARRAY_SIZE(bft
), h
->maxsgentries
,
3985 h
->blockFetchTable
);
3986 writel(bft
[0], &h
->transtable
->BlockFetch0
);
3987 writel(bft
[1], &h
->transtable
->BlockFetch1
);
3988 writel(bft
[2], &h
->transtable
->BlockFetch2
);
3989 writel(bft
[3], &h
->transtable
->BlockFetch3
);
3990 writel(bft
[4], &h
->transtable
->BlockFetch4
);
3991 writel(bft
[5], &h
->transtable
->BlockFetch5
);
3992 writel(bft
[6], &h
->transtable
->BlockFetch6
);
3993 writel(bft
[7], &h
->transtable
->BlockFetch7
);
3995 /* size of controller ring buffer */
3996 writel(h
->max_commands
, &h
->transtable
->RepQSize
);
3997 writel(1, &h
->transtable
->RepQCount
);
3998 writel(0, &h
->transtable
->RepQCtrAddrLow32
);
3999 writel(0, &h
->transtable
->RepQCtrAddrHigh32
);
4000 writel(h
->reply_pool_dhandle
, &h
->transtable
->RepQAddr0Low32
);
4001 writel(0, &h
->transtable
->RepQAddr0High32
);
4002 writel(CFGTBL_Trans_Performant
| use_short_tags
,
4003 &(h
->cfgtable
->HostWrite
.TransportRequest
));
4005 writel(CFGTBL_ChangeReq
, h
->vaddr
+ SA5_DOORBELL
);
4006 cciss_wait_for_mode_change_ack(h
);
4007 register_value
= readl(&(h
->cfgtable
->TransportActive
));
4008 if (!(register_value
& CFGTBL_Trans_Performant
))
4009 dev_warn(&h
->pdev
->dev
, "cciss: unable to get board into"
4010 " performant mode\n");
4013 static void cciss_put_controller_into_performant_mode(ctlr_info_t
*h
)
4015 __u32 trans_support
;
4017 if (cciss_simple_mode
)
4020 dev_dbg(&h
->pdev
->dev
, "Trying to put board into Performant mode\n");
4021 /* Attempt to put controller into performant mode if supported */
4022 /* Does board support performant mode? */
4023 trans_support
= readl(&(h
->cfgtable
->TransportSupport
));
4024 if (!(trans_support
& PERFORMANT_MODE
))
4027 dev_dbg(&h
->pdev
->dev
, "Placing controller into performant mode\n");
4028 /* Performant mode demands commands on a 32 byte boundary
4029 * pci_alloc_consistent aligns on page boundarys already.
4030 * Just need to check if divisible by 32
4032 if ((sizeof(CommandList_struct
) % 32) != 0) {
4033 dev_warn(&h
->pdev
->dev
, "%s %d %s\n",
4034 "cciss info: command size[",
4035 (int)sizeof(CommandList_struct
),
4036 "] not divisible by 32, no performant mode..\n");
4040 /* Performant mode ring buffer and supporting data structures */
4041 h
->reply_pool
= (__u64
*)pci_alloc_consistent(
4042 h
->pdev
, h
->max_commands
* sizeof(__u64
),
4043 &(h
->reply_pool_dhandle
));
4045 /* Need a block fetch table for performant mode */
4046 h
->blockFetchTable
= kmalloc(((h
->maxsgentries
+1) *
4047 sizeof(__u32
)), GFP_KERNEL
);
4049 if ((h
->reply_pool
== NULL
) || (h
->blockFetchTable
== NULL
))
4052 cciss_enter_performant_mode(h
,
4053 trans_support
& CFGTBL_Trans_use_short_tags
);
4055 /* Change the access methods to the performant access methods */
4056 h
->access
= SA5_performant_access
;
4057 h
->transMethod
= CFGTBL_Trans_Performant
;
4061 kfree(h
->blockFetchTable
);
4063 pci_free_consistent(h
->pdev
,
4064 h
->max_commands
* sizeof(__u64
),
4066 h
->reply_pool_dhandle
);
4069 } /* cciss_put_controller_into_performant_mode */
4071 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4072 * controllers that are capable. If not, we use IO-APIC mode.
4075 static void cciss_interrupt_mode(ctlr_info_t
*h
)
4077 #ifdef CONFIG_PCI_MSI
4079 struct msix_entry cciss_msix_entries
[4] = { {0, 0}, {0, 1},
4083 /* Some boards advertise MSI but don't really support it */
4084 if ((h
->board_id
== 0x40700E11) || (h
->board_id
== 0x40800E11) ||
4085 (h
->board_id
== 0x40820E11) || (h
->board_id
== 0x40830E11))
4086 goto default_int_mode
;
4088 if (pci_find_capability(h
->pdev
, PCI_CAP_ID_MSIX
)) {
4089 err
= pci_enable_msix_exact(h
->pdev
, cciss_msix_entries
, 4);
4091 h
->intr
[0] = cciss_msix_entries
[0].vector
;
4092 h
->intr
[1] = cciss_msix_entries
[1].vector
;
4093 h
->intr
[2] = cciss_msix_entries
[2].vector
;
4094 h
->intr
[3] = cciss_msix_entries
[3].vector
;
4098 dev_warn(&h
->pdev
->dev
,
4099 "MSI-X init failed %d\n", err
);
4102 if (pci_find_capability(h
->pdev
, PCI_CAP_ID_MSI
)) {
4103 if (!pci_enable_msi(h
->pdev
))
4106 dev_warn(&h
->pdev
->dev
, "MSI init failed\n");
4109 #endif /* CONFIG_PCI_MSI */
4110 /* if we get here we're going to use the default interrupt mode */
4111 h
->intr
[h
->intr_mode
] = h
->pdev
->irq
;
4115 static int cciss_lookup_board_id(struct pci_dev
*pdev
, u32
*board_id
)
4118 u32 subsystem_vendor_id
, subsystem_device_id
;
4120 subsystem_vendor_id
= pdev
->subsystem_vendor
;
4121 subsystem_device_id
= pdev
->subsystem_device
;
4122 *board_id
= ((subsystem_device_id
<< 16) & 0xffff0000) |
4123 subsystem_vendor_id
;
4125 for (i
= 0; i
< ARRAY_SIZE(products
); i
++) {
4126 /* Stand aside for hpsa driver on request */
4127 if (cciss_allow_hpsa
)
4129 if (*board_id
== products
[i
].board_id
)
4132 dev_warn(&pdev
->dev
, "unrecognized board ID: 0x%08x, ignoring.\n",
4137 static inline bool cciss_board_disabled(ctlr_info_t
*h
)
4141 (void) pci_read_config_word(h
->pdev
, PCI_COMMAND
, &command
);
4142 return ((command
& PCI_COMMAND_MEMORY
) == 0);
4145 static int cciss_pci_find_memory_BAR(struct pci_dev
*pdev
,
4146 unsigned long *memory_bar
)
4150 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++)
4151 if (pci_resource_flags(pdev
, i
) & IORESOURCE_MEM
) {
4152 /* addressing mode bits already removed */
4153 *memory_bar
= pci_resource_start(pdev
, i
);
4154 dev_dbg(&pdev
->dev
, "memory BAR = %lx\n",
4158 dev_warn(&pdev
->dev
, "no memory BAR found\n");
4162 static int cciss_wait_for_board_state(struct pci_dev
*pdev
,
4163 void __iomem
*vaddr
, int wait_for_ready
)
4164 #define BOARD_READY 1
4165 #define BOARD_NOT_READY 0
4171 iterations
= CCISS_BOARD_READY_ITERATIONS
;
4173 iterations
= CCISS_BOARD_NOT_READY_ITERATIONS
;
4175 for (i
= 0; i
< iterations
; i
++) {
4176 scratchpad
= readl(vaddr
+ SA5_SCRATCHPAD_OFFSET
);
4177 if (wait_for_ready
) {
4178 if (scratchpad
== CCISS_FIRMWARE_READY
)
4181 if (scratchpad
!= CCISS_FIRMWARE_READY
)
4184 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS
);
4186 dev_warn(&pdev
->dev
, "board not ready, timed out.\n");
4190 static int cciss_find_cfg_addrs(struct pci_dev
*pdev
, void __iomem
*vaddr
,
4191 u32
*cfg_base_addr
, u64
*cfg_base_addr_index
,
4194 *cfg_base_addr
= readl(vaddr
+ SA5_CTCFG_OFFSET
);
4195 *cfg_offset
= readl(vaddr
+ SA5_CTMEM_OFFSET
);
4196 *cfg_base_addr
&= (u32
) 0x0000ffff;
4197 *cfg_base_addr_index
= find_PCI_BAR_index(pdev
, *cfg_base_addr
);
4198 if (*cfg_base_addr_index
== -1) {
4199 dev_warn(&pdev
->dev
, "cannot find cfg_base_addr_index, "
4200 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr
);
4206 static int cciss_find_cfgtables(ctlr_info_t
*h
)
4210 u64 cfg_base_addr_index
;
4214 rc
= cciss_find_cfg_addrs(h
->pdev
, h
->vaddr
, &cfg_base_addr
,
4215 &cfg_base_addr_index
, &cfg_offset
);
4218 h
->cfgtable
= remap_pci_mem(pci_resource_start(h
->pdev
,
4219 cfg_base_addr_index
) + cfg_offset
, sizeof(*h
->cfgtable
));
4222 rc
= write_driver_ver_to_cfgtable(h
->cfgtable
);
4225 /* Find performant mode table. */
4226 trans_offset
= readl(&h
->cfgtable
->TransMethodOffset
);
4227 h
->transtable
= remap_pci_mem(pci_resource_start(h
->pdev
,
4228 cfg_base_addr_index
)+cfg_offset
+trans_offset
,
4229 sizeof(*h
->transtable
));
4235 static void cciss_get_max_perf_mode_cmds(struct ctlr_info
*h
)
4237 h
->max_commands
= readl(&(h
->cfgtable
->MaxPerformantModeCommands
));
4239 /* Limit commands in memory limited kdump scenario. */
4240 if (reset_devices
&& h
->max_commands
> 32)
4241 h
->max_commands
= 32;
4243 if (h
->max_commands
< 16) {
4244 dev_warn(&h
->pdev
->dev
, "Controller reports "
4245 "max supported commands of %d, an obvious lie. "
4246 "Using 16. Ensure that firmware is up to date.\n",
4248 h
->max_commands
= 16;
4252 /* Interrogate the hardware for some limits:
4253 * max commands, max SG elements without chaining, and with chaining,
4254 * SG chain block size, etc.
4256 static void cciss_find_board_params(ctlr_info_t
*h
)
4258 cciss_get_max_perf_mode_cmds(h
);
4259 h
->nr_cmds
= h
->max_commands
- 4 - cciss_tape_cmds
;
4260 h
->maxsgentries
= readl(&(h
->cfgtable
->MaxSGElements
));
4262 * The P600 may exhibit poor performnace under some workloads
4263 * if we use the value in the configuration table. Limit this
4264 * controller to MAXSGENTRIES (32) instead.
4266 if (h
->board_id
== 0x3225103C)
4267 h
->maxsgentries
= MAXSGENTRIES
;
4269 * Limit in-command s/g elements to 32 save dma'able memory.
4270 * Howvever spec says if 0, use 31
4272 h
->max_cmd_sgentries
= 31;
4273 if (h
->maxsgentries
> 512) {
4274 h
->max_cmd_sgentries
= 32;
4275 h
->chainsize
= h
->maxsgentries
- h
->max_cmd_sgentries
+ 1;
4276 h
->maxsgentries
--; /* save one for chain pointer */
4278 h
->maxsgentries
= 31; /* default to traditional values */
4283 static inline bool CISS_signature_present(ctlr_info_t
*h
)
4285 if (!check_signature(h
->cfgtable
->Signature
, "CISS", 4)) {
4286 dev_warn(&h
->pdev
->dev
, "not a valid CISS config table\n");
4292 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4293 static inline void cciss_enable_scsi_prefetch(ctlr_info_t
*h
)
4298 prefetch
= readl(&(h
->cfgtable
->SCSI_Prefetch
));
4300 writel(prefetch
, &(h
->cfgtable
->SCSI_Prefetch
));
4304 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4305 * in a prefetch beyond physical memory.
4307 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t
*h
)
4312 if (h
->board_id
!= 0x3225103C)
4314 dma_prefetch
= readl(h
->vaddr
+ I2O_DMA1_CFG
);
4315 dma_prefetch
|= 0x8000;
4316 writel(dma_prefetch
, h
->vaddr
+ I2O_DMA1_CFG
);
4317 pci_read_config_dword(h
->pdev
, PCI_COMMAND_PARITY
, &dma_refetch
);
4319 pci_write_config_dword(h
->pdev
, PCI_COMMAND_PARITY
, dma_refetch
);
4322 static int cciss_pci_init(ctlr_info_t
*h
)
4324 int prod_index
, err
;
4326 prod_index
= cciss_lookup_board_id(h
->pdev
, &h
->board_id
);
4329 h
->product_name
= products
[prod_index
].product_name
;
4330 h
->access
= *(products
[prod_index
].access
);
4332 if (cciss_board_disabled(h
)) {
4333 dev_warn(&h
->pdev
->dev
, "controller appears to be disabled\n");
4337 pci_disable_link_state(h
->pdev
, PCIE_LINK_STATE_L0S
|
4338 PCIE_LINK_STATE_L1
| PCIE_LINK_STATE_CLKPM
);
4340 err
= pci_enable_device(h
->pdev
);
4342 dev_warn(&h
->pdev
->dev
, "Unable to Enable PCI device\n");
4346 err
= pci_request_regions(h
->pdev
, "cciss");
4348 dev_warn(&h
->pdev
->dev
,
4349 "Cannot obtain PCI resources, aborting\n");
4353 dev_dbg(&h
->pdev
->dev
, "irq = %x\n", h
->pdev
->irq
);
4354 dev_dbg(&h
->pdev
->dev
, "board_id = %x\n", h
->board_id
);
4356 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4357 * else we use the IO-APIC interrupt assigned to us by system ROM.
4359 cciss_interrupt_mode(h
);
4360 err
= cciss_pci_find_memory_BAR(h
->pdev
, &h
->paddr
);
4362 goto err_out_free_res
;
4363 h
->vaddr
= remap_pci_mem(h
->paddr
, 0x250);
4366 goto err_out_free_res
;
4368 err
= cciss_wait_for_board_state(h
->pdev
, h
->vaddr
, BOARD_READY
);
4370 goto err_out_free_res
;
4371 err
= cciss_find_cfgtables(h
);
4373 goto err_out_free_res
;
4375 cciss_find_board_params(h
);
4377 if (!CISS_signature_present(h
)) {
4379 goto err_out_free_res
;
4381 cciss_enable_scsi_prefetch(h
);
4382 cciss_p600_dma_prefetch_quirk(h
);
4383 err
= cciss_enter_simple_mode(h
);
4385 goto err_out_free_res
;
4386 cciss_put_controller_into_performant_mode(h
);
4391 * Deliberately omit pci_disable_device(): it does something nasty to
4392 * Smart Array controllers that pci_enable_device does not undo
4395 iounmap(h
->transtable
);
4397 iounmap(h
->cfgtable
);
4400 pci_release_regions(h
->pdev
);
4404 /* Function to find the first free pointer into our hba[] array
4405 * Returns -1 if no free entries are left.
4407 static int alloc_cciss_hba(struct pci_dev
*pdev
)
4411 for (i
= 0; i
< MAX_CTLR
; i
++) {
4415 h
= kzalloc(sizeof(ctlr_info_t
), GFP_KERNEL
);
4422 dev_warn(&pdev
->dev
, "This driver supports a maximum"
4423 " of %d controllers.\n", MAX_CTLR
);
4426 dev_warn(&pdev
->dev
, "out of memory.\n");
4430 static void free_hba(ctlr_info_t
*h
)
4434 hba
[h
->ctlr
] = NULL
;
4435 for (i
= 0; i
< h
->highest_lun
+ 1; i
++)
4436 if (h
->gendisk
[i
] != NULL
)
4437 put_disk(h
->gendisk
[i
]);
4441 /* Send a message CDB to the firmware. */
4442 static int cciss_message(struct pci_dev
*pdev
, unsigned char opcode
,
4446 CommandListHeader_struct CommandHeader
;
4447 RequestBlock_struct Request
;
4448 ErrDescriptor_struct ErrorDescriptor
;
4450 static const size_t cmd_sz
= sizeof(Command
) + sizeof(ErrorInfo_struct
);
4453 uint32_t paddr32
, tag
;
4454 void __iomem
*vaddr
;
4457 vaddr
= ioremap_nocache(pci_resource_start(pdev
, 0), pci_resource_len(pdev
, 0));
4461 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4462 CCISS commands, so they must be allocated from the lower 4GiB of
4464 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
4470 cmd
= pci_alloc_consistent(pdev
, cmd_sz
, &paddr64
);
4476 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4477 although there's no guarantee, we assume that the address is at
4478 least 4-byte aligned (most likely, it's page-aligned). */
4481 cmd
->CommandHeader
.ReplyQueue
= 0;
4482 cmd
->CommandHeader
.SGList
= 0;
4483 cmd
->CommandHeader
.SGTotal
= 0;
4484 cmd
->CommandHeader
.Tag
.lower
= paddr32
;
4485 cmd
->CommandHeader
.Tag
.upper
= 0;
4486 memset(&cmd
->CommandHeader
.LUN
.LunAddrBytes
, 0, 8);
4488 cmd
->Request
.CDBLen
= 16;
4489 cmd
->Request
.Type
.Type
= TYPE_MSG
;
4490 cmd
->Request
.Type
.Attribute
= ATTR_HEADOFQUEUE
;
4491 cmd
->Request
.Type
.Direction
= XFER_NONE
;
4492 cmd
->Request
.Timeout
= 0; /* Don't time out */
4493 cmd
->Request
.CDB
[0] = opcode
;
4494 cmd
->Request
.CDB
[1] = type
;
4495 memset(&cmd
->Request
.CDB
[2], 0, 14); /* the rest of the CDB is reserved */
4497 cmd
->ErrorDescriptor
.Addr
.lower
= paddr32
+ sizeof(Command
);
4498 cmd
->ErrorDescriptor
.Addr
.upper
= 0;
4499 cmd
->ErrorDescriptor
.Len
= sizeof(ErrorInfo_struct
);
4501 writel(paddr32
, vaddr
+ SA5_REQUEST_PORT_OFFSET
);
4503 for (i
= 0; i
< 10; i
++) {
4504 tag
= readl(vaddr
+ SA5_REPLY_PORT_OFFSET
);
4505 if ((tag
& ~3) == paddr32
)
4507 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS
);
4512 /* we leak the DMA buffer here ... no choice since the controller could
4513 still complete the command. */
4516 "controller message %02x:%02x timed out\n",
4521 pci_free_consistent(pdev
, cmd_sz
, cmd
, paddr64
);
4524 dev_err(&pdev
->dev
, "controller message %02x:%02x failed\n",
4529 dev_info(&pdev
->dev
, "controller message %02x:%02x succeeded\n",
4534 #define cciss_noop(p) cciss_message(p, 3, 0)
4536 static int cciss_controller_hard_reset(struct pci_dev
*pdev
,
4537 void * __iomem vaddr
, u32 use_doorbell
)
4543 /* For everything after the P600, the PCI power state method
4544 * of resetting the controller doesn't work, so we have this
4545 * other way using the doorbell register.
4547 dev_info(&pdev
->dev
, "using doorbell to reset controller\n");
4548 writel(use_doorbell
, vaddr
+ SA5_DOORBELL
);
4549 } else { /* Try to do it the PCI power state way */
4551 /* Quoting from the Open CISS Specification: "The Power
4552 * Management Control/Status Register (CSR) controls the power
4553 * state of the device. The normal operating state is D0,
4554 * CSR=00h. The software off state is D3, CSR=03h. To reset
4555 * the controller, place the interface device in D3 then to D0,
4556 * this causes a secondary PCI reset which will reset the
4559 pos
= pci_find_capability(pdev
, PCI_CAP_ID_PM
);
4562 "cciss_controller_hard_reset: "
4563 "PCI PM not supported\n");
4566 dev_info(&pdev
->dev
, "using PCI PM to reset controller\n");
4567 /* enter the D3hot power management state */
4568 pci_read_config_word(pdev
, pos
+ PCI_PM_CTRL
, &pmcsr
);
4569 pmcsr
&= ~PCI_PM_CTRL_STATE_MASK
;
4571 pci_write_config_word(pdev
, pos
+ PCI_PM_CTRL
, pmcsr
);
4575 /* enter the D0 power management state */
4576 pmcsr
&= ~PCI_PM_CTRL_STATE_MASK
;
4578 pci_write_config_word(pdev
, pos
+ PCI_PM_CTRL
, pmcsr
);
4581 * The P600 requires a small delay when changing states.
4582 * Otherwise we may think the board did not reset and we bail.
4583 * This for kdump only and is particular to the P600.
4590 static void init_driver_version(char *driver_version
, int len
)
4592 memset(driver_version
, 0, len
);
4593 strncpy(driver_version
, "cciss " DRIVER_NAME
, len
- 1);
4596 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem
*cfgtable
)
4598 char *driver_version
;
4599 int i
, size
= sizeof(cfgtable
->driver_version
);
4601 driver_version
= kmalloc(size
, GFP_KERNEL
);
4602 if (!driver_version
)
4605 init_driver_version(driver_version
, size
);
4606 for (i
= 0; i
< size
; i
++)
4607 writeb(driver_version
[i
], &cfgtable
->driver_version
[i
]);
4608 kfree(driver_version
);
4612 static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem
*cfgtable
,
4613 unsigned char *driver_ver
)
4617 for (i
= 0; i
< sizeof(cfgtable
->driver_version
); i
++)
4618 driver_ver
[i
] = readb(&cfgtable
->driver_version
[i
]);
4621 static int controller_reset_failed(CfgTable_struct __iomem
*cfgtable
)
4624 char *driver_ver
, *old_driver_ver
;
4625 int rc
, size
= sizeof(cfgtable
->driver_version
);
4627 old_driver_ver
= kmalloc(2 * size
, GFP_KERNEL
);
4628 if (!old_driver_ver
)
4630 driver_ver
= old_driver_ver
+ size
;
4632 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4633 * should have been changed, otherwise we know the reset failed.
4635 init_driver_version(old_driver_ver
, size
);
4636 read_driver_ver_from_cfgtable(cfgtable
, driver_ver
);
4637 rc
= !memcmp(driver_ver
, old_driver_ver
, size
);
4638 kfree(old_driver_ver
);
4642 /* This does a hard reset of the controller using PCI power management
4643 * states or using the doorbell register. */
4644 static int cciss_kdump_hard_reset_controller(struct pci_dev
*pdev
)
4648 u64 cfg_base_addr_index
;
4649 void __iomem
*vaddr
;
4650 unsigned long paddr
;
4651 u32 misc_fw_support
;
4653 CfgTable_struct __iomem
*cfgtable
;
4656 u16 command_register
;
4658 /* For controllers as old a the p600, this is very nearly
4661 * pci_save_state(pci_dev);
4662 * pci_set_power_state(pci_dev, PCI_D3hot);
4663 * pci_set_power_state(pci_dev, PCI_D0);
4664 * pci_restore_state(pci_dev);
4666 * For controllers newer than the P600, the pci power state
4667 * method of resetting doesn't work so we have another way
4668 * using the doorbell register.
4671 /* Exclude 640x boards. These are two pci devices in one slot
4672 * which share a battery backed cache module. One controls the
4673 * cache, the other accesses the cache through the one that controls
4674 * it. If we reset the one controlling the cache, the other will
4675 * likely not be happy. Just forbid resetting this conjoined mess.
4677 cciss_lookup_board_id(pdev
, &board_id
);
4678 if (!ctlr_is_resettable(board_id
)) {
4679 dev_warn(&pdev
->dev
, "Controller not resettable\n");
4683 /* if controller is soft- but not hard resettable... */
4684 if (!ctlr_is_hard_resettable(board_id
))
4685 return -ENOTSUPP
; /* try soft reset later. */
4687 /* Save the PCI command register */
4688 pci_read_config_word(pdev
, 4, &command_register
);
4689 /* Turn the board off. This is so that later pci_restore_state()
4690 * won't turn the board on before the rest of config space is ready.
4692 pci_disable_device(pdev
);
4693 pci_save_state(pdev
);
4695 /* find the first memory BAR, so we can find the cfg table */
4696 rc
= cciss_pci_find_memory_BAR(pdev
, &paddr
);
4699 vaddr
= remap_pci_mem(paddr
, 0x250);
4703 /* find cfgtable in order to check if reset via doorbell is supported */
4704 rc
= cciss_find_cfg_addrs(pdev
, vaddr
, &cfg_base_addr
,
4705 &cfg_base_addr_index
, &cfg_offset
);
4708 cfgtable
= remap_pci_mem(pci_resource_start(pdev
,
4709 cfg_base_addr_index
) + cfg_offset
, sizeof(*cfgtable
));
4714 rc
= write_driver_ver_to_cfgtable(cfgtable
);
4718 /* If reset via doorbell register is supported, use that.
4719 * There are two such methods. Favor the newest method.
4721 misc_fw_support
= readl(&cfgtable
->misc_fw_support
);
4722 use_doorbell
= misc_fw_support
& MISC_FW_DOORBELL_RESET2
;
4724 use_doorbell
= DOORBELL_CTLR_RESET2
;
4726 use_doorbell
= misc_fw_support
& MISC_FW_DOORBELL_RESET
;
4728 dev_warn(&pdev
->dev
, "Controller claims that "
4729 "'Bit 2 doorbell reset' is "
4730 "supported, but not 'bit 5 doorbell reset'. "
4731 "Firmware update is recommended.\n");
4732 rc
= -ENOTSUPP
; /* use the soft reset */
4733 goto unmap_cfgtable
;
4737 rc
= cciss_controller_hard_reset(pdev
, vaddr
, use_doorbell
);
4739 goto unmap_cfgtable
;
4740 pci_restore_state(pdev
);
4741 rc
= pci_enable_device(pdev
);
4743 dev_warn(&pdev
->dev
, "failed to enable device.\n");
4744 goto unmap_cfgtable
;
4746 pci_write_config_word(pdev
, 4, command_register
);
4748 /* Some devices (notably the HP Smart Array 5i Controller)
4749 need a little pause here */
4750 msleep(CCISS_POST_RESET_PAUSE_MSECS
);
4752 /* Wait for board to become not ready, then ready. */
4753 dev_info(&pdev
->dev
, "Waiting for board to reset.\n");
4754 rc
= cciss_wait_for_board_state(pdev
, vaddr
, BOARD_NOT_READY
);
4756 dev_warn(&pdev
->dev
, "Failed waiting for board to hard reset."
4757 " Will try soft reset.\n");
4758 rc
= -ENOTSUPP
; /* Not expected, but try soft reset later */
4759 goto unmap_cfgtable
;
4761 rc
= cciss_wait_for_board_state(pdev
, vaddr
, BOARD_READY
);
4763 dev_warn(&pdev
->dev
,
4764 "failed waiting for board to become ready "
4765 "after hard reset\n");
4766 goto unmap_cfgtable
;
4769 rc
= controller_reset_failed(vaddr
);
4771 goto unmap_cfgtable
;
4773 dev_warn(&pdev
->dev
, "Unable to successfully hard reset "
4774 "controller. Will try soft reset.\n");
4775 rc
= -ENOTSUPP
; /* Not expected, but try soft reset later */
4777 dev_info(&pdev
->dev
, "Board ready after hard reset.\n");
4788 static int cciss_init_reset_devices(struct pci_dev
*pdev
)
4795 /* Reset the controller with a PCI power-cycle or via doorbell */
4796 rc
= cciss_kdump_hard_reset_controller(pdev
);
4798 /* -ENOTSUPP here means we cannot reset the controller
4799 * but it's already (and still) up and running in
4800 * "performant mode". Or, it might be 640x, which can't reset
4801 * due to concerns about shared bbwc between 6402/6404 pair.
4803 if (rc
== -ENOTSUPP
)
4804 return rc
; /* just try to do the kdump anyhow. */
4808 /* Now try to get the controller to respond to a no-op */
4809 dev_warn(&pdev
->dev
, "Waiting for controller to respond to no-op\n");
4810 for (i
= 0; i
< CCISS_POST_RESET_NOOP_RETRIES
; i
++) {
4811 if (cciss_noop(pdev
) == 0)
4814 dev_warn(&pdev
->dev
, "no-op failed%s\n",
4815 (i
< CCISS_POST_RESET_NOOP_RETRIES
- 1 ?
4816 "; re-trying" : ""));
4817 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS
);
4822 static int cciss_allocate_cmd_pool(ctlr_info_t
*h
)
4824 h
->cmd_pool_bits
= kmalloc(BITS_TO_LONGS(h
->nr_cmds
) *
4825 sizeof(unsigned long), GFP_KERNEL
);
4826 h
->cmd_pool
= pci_alloc_consistent(h
->pdev
,
4827 h
->nr_cmds
* sizeof(CommandList_struct
),
4828 &(h
->cmd_pool_dhandle
));
4829 h
->errinfo_pool
= pci_alloc_consistent(h
->pdev
,
4830 h
->nr_cmds
* sizeof(ErrorInfo_struct
),
4831 &(h
->errinfo_pool_dhandle
));
4832 if ((h
->cmd_pool_bits
== NULL
)
4833 || (h
->cmd_pool
== NULL
)
4834 || (h
->errinfo_pool
== NULL
)) {
4835 dev_err(&h
->pdev
->dev
, "out of memory");
4841 static int cciss_allocate_scatterlists(ctlr_info_t
*h
)
4845 /* zero it, so that on free we need not know how many were alloc'ed */
4846 h
->scatter_list
= kzalloc(h
->max_commands
*
4847 sizeof(struct scatterlist
*), GFP_KERNEL
);
4848 if (!h
->scatter_list
)
4851 for (i
= 0; i
< h
->nr_cmds
; i
++) {
4852 h
->scatter_list
[i
] = kmalloc(sizeof(struct scatterlist
) *
4853 h
->maxsgentries
, GFP_KERNEL
);
4854 if (h
->scatter_list
[i
] == NULL
) {
4855 dev_err(&h
->pdev
->dev
, "could not allocate "
4863 static void cciss_free_scatterlists(ctlr_info_t
*h
)
4867 if (h
->scatter_list
) {
4868 for (i
= 0; i
< h
->nr_cmds
; i
++)
4869 kfree(h
->scatter_list
[i
]);
4870 kfree(h
->scatter_list
);
4874 static void cciss_free_cmd_pool(ctlr_info_t
*h
)
4876 kfree(h
->cmd_pool_bits
);
4878 pci_free_consistent(h
->pdev
,
4879 h
->nr_cmds
* sizeof(CommandList_struct
),
4880 h
->cmd_pool
, h
->cmd_pool_dhandle
);
4881 if (h
->errinfo_pool
)
4882 pci_free_consistent(h
->pdev
,
4883 h
->nr_cmds
* sizeof(ErrorInfo_struct
),
4884 h
->errinfo_pool
, h
->errinfo_pool_dhandle
);
4887 static int cciss_request_irq(ctlr_info_t
*h
,
4888 irqreturn_t (*msixhandler
)(int, void *),
4889 irqreturn_t (*intxhandler
)(int, void *))
4891 if (h
->msix_vector
|| h
->msi_vector
) {
4892 if (!request_irq(h
->intr
[h
->intr_mode
], msixhandler
,
4895 dev_err(&h
->pdev
->dev
, "Unable to get msi irq %d"
4896 " for %s\n", h
->intr
[h
->intr_mode
],
4901 if (!request_irq(h
->intr
[h
->intr_mode
], intxhandler
,
4902 IRQF_SHARED
, h
->devname
, h
))
4904 dev_err(&h
->pdev
->dev
, "Unable to get irq %d for %s\n",
4905 h
->intr
[h
->intr_mode
], h
->devname
);
4909 static int cciss_kdump_soft_reset(ctlr_info_t
*h
)
4911 if (cciss_send_reset(h
, CTLR_LUNID
, CCISS_RESET_TYPE_CONTROLLER
)) {
4912 dev_warn(&h
->pdev
->dev
, "Resetting array controller failed.\n");
4916 dev_info(&h
->pdev
->dev
, "Waiting for board to soft reset.\n");
4917 if (cciss_wait_for_board_state(h
->pdev
, h
->vaddr
, BOARD_NOT_READY
)) {
4918 dev_warn(&h
->pdev
->dev
, "Soft reset had no effect.\n");
4922 dev_info(&h
->pdev
->dev
, "Board reset, awaiting READY status.\n");
4923 if (cciss_wait_for_board_state(h
->pdev
, h
->vaddr
, BOARD_READY
)) {
4924 dev_warn(&h
->pdev
->dev
, "Board failed to become ready "
4925 "after soft reset.\n");
4932 static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t
*h
)
4936 free_irq(h
->intr
[h
->intr_mode
], h
);
4937 #ifdef CONFIG_PCI_MSI
4939 pci_disable_msix(h
->pdev
);
4940 else if (h
->msi_vector
)
4941 pci_disable_msi(h
->pdev
);
4942 #endif /* CONFIG_PCI_MSI */
4943 cciss_free_sg_chain_blocks(h
->cmd_sg_list
, h
->nr_cmds
);
4944 cciss_free_scatterlists(h
);
4945 cciss_free_cmd_pool(h
);
4946 kfree(h
->blockFetchTable
);
4948 pci_free_consistent(h
->pdev
, h
->max_commands
* sizeof(__u64
),
4949 h
->reply_pool
, h
->reply_pool_dhandle
);
4951 iounmap(h
->transtable
);
4953 iounmap(h
->cfgtable
);
4956 unregister_blkdev(h
->major
, h
->devname
);
4957 cciss_destroy_hba_sysfs_entry(h
);
4958 pci_release_regions(h
->pdev
);
4964 * This is it. Find all the controllers and register them. I really hate
4965 * stealing all these major device numbers.
4966 * returns the number of block devices registered.
4968 static int cciss_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
4973 int try_soft_reset
= 0;
4974 int dac
, return_code
;
4975 InquiryData_struct
*inq_buff
;
4977 unsigned long flags
;
4980 * By default the cciss driver is used for all older HP Smart Array
4981 * controllers. There are module paramaters that allow a user to
4982 * override this behavior and instead use the hpsa SCSI driver. If
4983 * this is the case cciss may be loaded first from the kdump initrd
4984 * image and cause a kernel panic. So if reset_devices is true and
4985 * cciss_allow_hpsa is set just bail.
4987 if ((reset_devices
) && (cciss_allow_hpsa
== 1))
4989 rc
= cciss_init_reset_devices(pdev
);
4991 if (rc
!= -ENOTSUPP
)
4993 /* If the reset fails in a particular way (it has no way to do
4994 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4995 * a soft reset once we get the controller configured up to the
4996 * point that it can accept a command.
5002 reinit_after_soft_reset
:
5004 i
= alloc_cciss_hba(pdev
);
5010 h
->busy_initializing
= 1;
5011 h
->intr_mode
= cciss_simple_mode
? SIMPLE_MODE_INT
: PERF_MODE_INT
;
5012 INIT_LIST_HEAD(&h
->cmpQ
);
5013 INIT_LIST_HEAD(&h
->reqQ
);
5014 mutex_init(&h
->busy_shutting_down
);
5016 if (cciss_pci_init(h
) != 0)
5017 goto clean_no_release_regions
;
5019 sprintf(h
->devname
, "cciss%d", i
);
5022 if (cciss_tape_cmds
< 2)
5023 cciss_tape_cmds
= 2;
5024 if (cciss_tape_cmds
> 16)
5025 cciss_tape_cmds
= 16;
5027 init_completion(&h
->scan_wait
);
5029 if (cciss_create_hba_sysfs_entry(h
))
5032 /* configure PCI DMA stuff */
5033 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)))
5035 else if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(32)))
5038 dev_err(&h
->pdev
->dev
, "no suitable DMA available\n");
5043 * register with the major number, or get a dynamic major number
5044 * by passing 0 as argument. This is done for greater than
5045 * 8 controller support.
5047 if (i
< MAX_CTLR_ORIG
)
5048 h
->major
= COMPAQ_CISS_MAJOR
+ i
;
5049 rc
= register_blkdev(h
->major
, h
->devname
);
5050 if (rc
== -EBUSY
|| rc
== -EINVAL
) {
5051 dev_err(&h
->pdev
->dev
,
5052 "Unable to get major number %d for %s "
5053 "on hba %d\n", h
->major
, h
->devname
, i
);
5056 if (i
>= MAX_CTLR_ORIG
)
5060 /* make sure the board interrupts are off */
5061 h
->access
.set_intr_mask(h
, CCISS_INTR_OFF
);
5062 rc
= cciss_request_irq(h
, do_cciss_msix_intr
, do_cciss_intx
);
5066 dev_info(&h
->pdev
->dev
, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5067 h
->devname
, pdev
->device
, pci_name(pdev
),
5068 h
->intr
[h
->intr_mode
], dac
? "" : " not");
5070 if (cciss_allocate_cmd_pool(h
))
5073 if (cciss_allocate_scatterlists(h
))
5076 h
->cmd_sg_list
= cciss_allocate_sg_chain_blocks(h
,
5077 h
->chainsize
, h
->nr_cmds
);
5078 if (!h
->cmd_sg_list
&& h
->chainsize
> 0)
5081 spin_lock_init(&h
->lock
);
5083 /* Initialize the pdev driver private data.
5084 have it point to h. */
5085 pci_set_drvdata(pdev
, h
);
5086 /* command and error info recs zeroed out before
5088 bitmap_zero(h
->cmd_pool_bits
, h
->nr_cmds
);
5091 h
->highest_lun
= -1;
5092 for (j
= 0; j
< CISS_MAX_LUN
; j
++) {
5094 h
->gendisk
[j
] = NULL
;
5097 /* At this point, the controller is ready to take commands.
5098 * Now, if reset_devices and the hard reset didn't work, try
5099 * the soft reset and see if that works.
5101 if (try_soft_reset
) {
5103 /* This is kind of gross. We may or may not get a completion
5104 * from the soft reset command, and if we do, then the value
5105 * from the fifo may or may not be valid. So, we wait 10 secs
5106 * after the reset throwing away any completions we get during
5107 * that time. Unregister the interrupt handler and register
5108 * fake ones to scoop up any residual completions.
5110 spin_lock_irqsave(&h
->lock
, flags
);
5111 h
->access
.set_intr_mask(h
, CCISS_INTR_OFF
);
5112 spin_unlock_irqrestore(&h
->lock
, flags
);
5113 free_irq(h
->intr
[h
->intr_mode
], h
);
5114 rc
= cciss_request_irq(h
, cciss_msix_discard_completions
,
5115 cciss_intx_discard_completions
);
5117 dev_warn(&h
->pdev
->dev
, "Failed to request_irq after "
5122 rc
= cciss_kdump_soft_reset(h
);
5124 dev_warn(&h
->pdev
->dev
, "Soft reset failed.\n");
5128 dev_info(&h
->pdev
->dev
, "Board READY.\n");
5129 dev_info(&h
->pdev
->dev
,
5130 "Waiting for stale completions to drain.\n");
5131 h
->access
.set_intr_mask(h
, CCISS_INTR_ON
);
5133 h
->access
.set_intr_mask(h
, CCISS_INTR_OFF
);
5135 rc
= controller_reset_failed(h
->cfgtable
);
5137 dev_info(&h
->pdev
->dev
,
5138 "Soft reset appears to have failed.\n");
5140 /* since the controller's reset, we have to go back and re-init
5141 * everything. Easiest to just forget what we've done and do it
5144 cciss_undo_allocations_after_kdump_soft_reset(h
);
5147 /* don't go to clean4, we already unallocated */
5150 goto reinit_after_soft_reset
;
5153 cciss_scsi_setup(h
);
5155 /* Turn the interrupts on so we can service requests */
5156 h
->access
.set_intr_mask(h
, CCISS_INTR_ON
);
5158 /* Get the firmware version */
5159 inq_buff
= kzalloc(sizeof(InquiryData_struct
), GFP_KERNEL
);
5160 if (inq_buff
== NULL
) {
5161 dev_err(&h
->pdev
->dev
, "out of memory\n");
5165 return_code
= sendcmd_withirq(h
, CISS_INQUIRY
, inq_buff
,
5166 sizeof(InquiryData_struct
), 0, CTLR_LUNID
, TYPE_CMD
);
5167 if (return_code
== IO_OK
) {
5168 h
->firm_ver
[0] = inq_buff
->data_byte
[32];
5169 h
->firm_ver
[1] = inq_buff
->data_byte
[33];
5170 h
->firm_ver
[2] = inq_buff
->data_byte
[34];
5171 h
->firm_ver
[3] = inq_buff
->data_byte
[35];
5172 } else { /* send command failed */
5173 dev_warn(&h
->pdev
->dev
, "unable to determine firmware"
5174 " version of controller\n");
5180 h
->cciss_max_sectors
= 8192;
5182 rebuild_lun_table(h
, 1, 0);
5183 cciss_engage_scsi(h
);
5184 h
->busy_initializing
= 0;
5188 cciss_free_cmd_pool(h
);
5189 cciss_free_scatterlists(h
);
5190 cciss_free_sg_chain_blocks(h
->cmd_sg_list
, h
->nr_cmds
);
5191 free_irq(h
->intr
[h
->intr_mode
], h
);
5193 unregister_blkdev(h
->major
, h
->devname
);
5195 cciss_destroy_hba_sysfs_entry(h
);
5197 pci_release_regions(pdev
);
5198 clean_no_release_regions
:
5199 h
->busy_initializing
= 0;
5202 * Deliberately omit pci_disable_device(): it does something nasty to
5203 * Smart Array controllers that pci_enable_device does not undo
5205 pci_set_drvdata(pdev
, NULL
);
5210 static void cciss_shutdown(struct pci_dev
*pdev
)
5216 h
= pci_get_drvdata(pdev
);
5217 flush_buf
= kzalloc(4, GFP_KERNEL
);
5219 dev_warn(&h
->pdev
->dev
, "cache not flushed, out of memory.\n");
5222 /* write all data in the battery backed cache to disk */
5223 return_code
= sendcmd_withirq(h
, CCISS_CACHE_FLUSH
, flush_buf
,
5224 4, 0, CTLR_LUNID
, TYPE_CMD
);
5226 if (return_code
!= IO_OK
)
5227 dev_warn(&h
->pdev
->dev
, "Error flushing cache\n");
5228 h
->access
.set_intr_mask(h
, CCISS_INTR_OFF
);
5229 free_irq(h
->intr
[h
->intr_mode
], h
);
5232 static int cciss_enter_simple_mode(struct ctlr_info
*h
)
5236 trans_support
= readl(&(h
->cfgtable
->TransportSupport
));
5237 if (!(trans_support
& SIMPLE_MODE
))
5240 h
->max_commands
= readl(&(h
->cfgtable
->CmdsOutMax
));
5241 writel(CFGTBL_Trans_Simple
, &(h
->cfgtable
->HostWrite
.TransportRequest
));
5242 writel(CFGTBL_ChangeReq
, h
->vaddr
+ SA5_DOORBELL
);
5243 cciss_wait_for_mode_change_ack(h
);
5245 if (!(readl(&(h
->cfgtable
->TransportActive
)) & CFGTBL_Trans_Simple
)) {
5246 dev_warn(&h
->pdev
->dev
, "unable to get board into simple mode\n");
5249 h
->transMethod
= CFGTBL_Trans_Simple
;
5254 static void cciss_remove_one(struct pci_dev
*pdev
)
5259 if (pci_get_drvdata(pdev
) == NULL
) {
5260 dev_err(&pdev
->dev
, "Unable to remove device\n");
5264 h
= pci_get_drvdata(pdev
);
5266 if (hba
[i
] == NULL
) {
5267 dev_err(&pdev
->dev
, "device appears to already be removed\n");
5271 mutex_lock(&h
->busy_shutting_down
);
5273 remove_from_scan_list(h
);
5274 remove_proc_entry(h
->devname
, proc_cciss
);
5275 unregister_blkdev(h
->major
, h
->devname
);
5277 /* remove it from the disk list */
5278 for (j
= 0; j
< CISS_MAX_LUN
; j
++) {
5279 struct gendisk
*disk
= h
->gendisk
[j
];
5281 struct request_queue
*q
= disk
->queue
;
5283 if (disk
->flags
& GENHD_FL_UP
) {
5284 cciss_destroy_ld_sysfs_entry(h
, j
, 1);
5288 blk_cleanup_queue(q
);
5292 #ifdef CONFIG_CISS_SCSI_TAPE
5293 cciss_unregister_scsi(h
); /* unhook from SCSI subsystem */
5296 cciss_shutdown(pdev
);
5298 #ifdef CONFIG_PCI_MSI
5300 pci_disable_msix(h
->pdev
);
5301 else if (h
->msi_vector
)
5302 pci_disable_msi(h
->pdev
);
5303 #endif /* CONFIG_PCI_MSI */
5305 iounmap(h
->transtable
);
5306 iounmap(h
->cfgtable
);
5309 cciss_free_cmd_pool(h
);
5310 /* Free up sg elements */
5311 for (j
= 0; j
< h
->nr_cmds
; j
++)
5312 kfree(h
->scatter_list
[j
]);
5313 kfree(h
->scatter_list
);
5314 cciss_free_sg_chain_blocks(h
->cmd_sg_list
, h
->nr_cmds
);
5315 kfree(h
->blockFetchTable
);
5317 pci_free_consistent(h
->pdev
, h
->max_commands
* sizeof(__u64
),
5318 h
->reply_pool
, h
->reply_pool_dhandle
);
5320 * Deliberately omit pci_disable_device(): it does something nasty to
5321 * Smart Array controllers that pci_enable_device does not undo
5323 pci_release_regions(pdev
);
5324 pci_set_drvdata(pdev
, NULL
);
5325 cciss_destroy_hba_sysfs_entry(h
);
5326 mutex_unlock(&h
->busy_shutting_down
);
5330 static struct pci_driver cciss_pci_driver
= {
5332 .probe
= cciss_init_one
,
5333 .remove
= cciss_remove_one
,
5334 .id_table
= cciss_pci_device_id
, /* id_table */
5335 .shutdown
= cciss_shutdown
,
5339 * This is it. Register the PCI driver information for the cards we control
5340 * the OS will call our registered routines when it finds one of our cards.
5342 static int __init
cciss_init(void)
5347 * The hardware requires that commands are aligned on a 64-bit
5348 * boundary. Given that we use pci_alloc_consistent() to allocate an
5349 * array of them, the size must be a multiple of 8 bytes.
5351 BUILD_BUG_ON(sizeof(CommandList_struct
) % COMMANDLIST_ALIGNMENT
);
5352 printk(KERN_INFO DRIVER_NAME
"\n");
5354 err
= bus_register(&cciss_bus_type
);
5358 /* Start the scan thread */
5359 cciss_scan_thread
= kthread_run(scan_thread
, NULL
, "cciss_scan");
5360 if (IS_ERR(cciss_scan_thread
)) {
5361 err
= PTR_ERR(cciss_scan_thread
);
5362 goto err_bus_unregister
;
5365 /* Register for our PCI devices */
5366 err
= pci_register_driver(&cciss_pci_driver
);
5368 goto err_thread_stop
;
5373 kthread_stop(cciss_scan_thread
);
5375 bus_unregister(&cciss_bus_type
);
5380 static void __exit
cciss_cleanup(void)
5384 pci_unregister_driver(&cciss_pci_driver
);
5385 /* double check that all controller entrys have been removed */
5386 for (i
= 0; i
< MAX_CTLR
; i
++) {
5387 if (hba
[i
] != NULL
) {
5388 dev_warn(&hba
[i
]->pdev
->dev
,
5389 "had to remove controller\n");
5390 cciss_remove_one(hba
[i
]->pdev
);
5393 kthread_stop(cciss_scan_thread
);
5395 remove_proc_entry("driver/cciss", NULL
);
5396 bus_unregister(&cciss_bus_type
);
5399 module_init(cciss_init
);
5400 module_exit(cciss_cleanup
);