sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / char / hw_random / pasemi-rng.c
blob545df485bcc42ee27da679fc4457074520d1abb0
1 /*
2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Maintained by: Olof Johansson <olof@lixom.net>
6 * Driver for the PWRficient onchip rng
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/platform_device.h>
25 #include <linux/hw_random.h>
26 #include <linux/delay.h>
27 #include <linux/of_address.h>
28 #include <linux/of_platform.h>
29 #include <linux/io.h>
31 #define SDCRNG_CTL_REG 0x00
32 #define SDCRNG_CTL_FVLD_M 0x0000f000
33 #define SDCRNG_CTL_FVLD_S 12
34 #define SDCRNG_CTL_KSZ 0x00000800
35 #define SDCRNG_CTL_RSRC_CRG 0x00000010
36 #define SDCRNG_CTL_RSRC_RRG 0x00000000
37 #define SDCRNG_CTL_CE 0x00000004
38 #define SDCRNG_CTL_RE 0x00000002
39 #define SDCRNG_CTL_DR 0x00000001
40 #define SDCRNG_CTL_SELECT_RRG_RNG (SDCRNG_CTL_RE | SDCRNG_CTL_RSRC_RRG)
41 #define SDCRNG_CTL_SELECT_CRG_RNG (SDCRNG_CTL_CE | SDCRNG_CTL_RSRC_CRG)
42 #define SDCRNG_VAL_REG 0x20
44 #define MODULE_NAME "pasemi_rng"
46 static int pasemi_rng_data_present(struct hwrng *rng, int wait)
48 void __iomem *rng_regs = (void __iomem *)rng->priv;
49 int data, i;
51 for (i = 0; i < 20; i++) {
52 data = (in_le32(rng_regs + SDCRNG_CTL_REG)
53 & SDCRNG_CTL_FVLD_M) ? 1 : 0;
54 if (data || !wait)
55 break;
56 udelay(10);
58 return data;
61 static int pasemi_rng_data_read(struct hwrng *rng, u32 *data)
63 void __iomem *rng_regs = (void __iomem *)rng->priv;
64 *data = in_le32(rng_regs + SDCRNG_VAL_REG);
65 return 4;
68 static int pasemi_rng_init(struct hwrng *rng)
70 void __iomem *rng_regs = (void __iomem *)rng->priv;
71 u32 ctl;
73 ctl = SDCRNG_CTL_DR | SDCRNG_CTL_SELECT_RRG_RNG | SDCRNG_CTL_KSZ;
74 out_le32(rng_regs + SDCRNG_CTL_REG, ctl);
75 out_le32(rng_regs + SDCRNG_CTL_REG, ctl & ~SDCRNG_CTL_DR);
77 return 0;
80 static void pasemi_rng_cleanup(struct hwrng *rng)
82 void __iomem *rng_regs = (void __iomem *)rng->priv;
83 u32 ctl;
85 ctl = SDCRNG_CTL_RE | SDCRNG_CTL_CE;
86 out_le32(rng_regs + SDCRNG_CTL_REG,
87 in_le32(rng_regs + SDCRNG_CTL_REG) & ~ctl);
90 static struct hwrng pasemi_rng = {
91 .name = MODULE_NAME,
92 .init = pasemi_rng_init,
93 .cleanup = pasemi_rng_cleanup,
94 .data_present = pasemi_rng_data_present,
95 .data_read = pasemi_rng_data_read,
98 static int rng_probe(struct platform_device *pdev)
100 void __iomem *rng_regs;
101 struct resource *res;
103 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
104 rng_regs = devm_ioremap_resource(&pdev->dev, res);
105 if (IS_ERR(rng_regs))
106 return PTR_ERR(rng_regs);
108 pasemi_rng.priv = (unsigned long)rng_regs;
110 pr_info("Registering PA Semi RNG\n");
111 return devm_hwrng_register(&pdev->dev, &pasemi_rng);
114 static const struct of_device_id rng_match[] = {
115 { .compatible = "1682m-rng", },
116 { .compatible = "pasemi,pwrficient-rng", },
117 { },
119 MODULE_DEVICE_TABLE(of, rng_match);
121 static struct platform_driver rng_driver = {
122 .driver = {
123 .name = "pasemi-rng",
124 .of_match_table = rng_match,
126 .probe = rng_probe,
129 module_platform_driver(rng_driver);
131 MODULE_LICENSE("GPL");
132 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
133 MODULE_DESCRIPTION("H/W RNG driver for PA Semi processor");