sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / clk-conf.c
blob674785d968a3e1c507637ebbeb3865e17fcb5def
1 /*
2 * Copyright (C) 2014 Samsung Electronics Co., Ltd.
3 * Sylwester Nawrocki <s.nawrocki@samsung.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
10 #include <linux/clk.h>
11 #include <linux/clk-provider.h>
12 #include <linux/clk/clk-conf.h>
13 #include <linux/device.h>
14 #include <linux/of.h>
15 #include <linux/printk.h>
17 static int __set_clk_parents(struct device_node *node, bool clk_supplier)
19 struct of_phandle_args clkspec;
20 int index, rc, num_parents;
21 struct clk *clk, *pclk;
23 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
24 "#clock-cells");
25 if (num_parents == -EINVAL)
26 pr_err("clk: invalid value of clock-parents property at %s\n",
27 node->full_name);
29 for (index = 0; index < num_parents; index++) {
30 rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
31 "#clock-cells", index, &clkspec);
32 if (rc < 0) {
33 /* skip empty (null) phandles */
34 if (rc == -ENOENT)
35 continue;
36 else
37 return rc;
39 if (clkspec.np == node && !clk_supplier)
40 return 0;
41 pclk = of_clk_get_from_provider(&clkspec);
42 if (IS_ERR(pclk)) {
43 pr_warn("clk: couldn't get parent clock %d for %s\n",
44 index, node->full_name);
45 return PTR_ERR(pclk);
48 rc = of_parse_phandle_with_args(node, "assigned-clocks",
49 "#clock-cells", index, &clkspec);
50 if (rc < 0)
51 goto err;
52 if (clkspec.np == node && !clk_supplier) {
53 rc = 0;
54 goto err;
56 clk = of_clk_get_from_provider(&clkspec);
57 if (IS_ERR(clk)) {
58 pr_warn("clk: couldn't get assigned clock %d for %s\n",
59 index, node->full_name);
60 rc = PTR_ERR(clk);
61 goto err;
64 rc = clk_set_parent(clk, pclk);
65 if (rc < 0)
66 pr_err("clk: failed to reparent %s to %s: %d\n",
67 __clk_get_name(clk), __clk_get_name(pclk), rc);
68 clk_put(clk);
69 clk_put(pclk);
71 return 0;
72 err:
73 clk_put(pclk);
74 return rc;
77 static int __set_clk_rates(struct device_node *node, bool clk_supplier)
79 struct of_phandle_args clkspec;
80 struct property *prop;
81 const __be32 *cur;
82 int rc, index = 0;
83 struct clk *clk;
84 u32 rate;
86 of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
87 if (rate) {
88 rc = of_parse_phandle_with_args(node, "assigned-clocks",
89 "#clock-cells", index, &clkspec);
90 if (rc < 0) {
91 /* skip empty (null) phandles */
92 if (rc == -ENOENT)
93 continue;
94 else
95 return rc;
97 if (clkspec.np == node && !clk_supplier)
98 return 0;
100 clk = of_clk_get_from_provider(&clkspec);
101 if (IS_ERR(clk)) {
102 pr_warn("clk: couldn't get clock %d for %s\n",
103 index, node->full_name);
104 return PTR_ERR(clk);
107 rc = clk_set_rate(clk, rate);
108 if (rc < 0)
109 pr_err("clk: couldn't set %s clk rate to %d (%d), current rate: %ld\n",
110 __clk_get_name(clk), rate, rc,
111 clk_get_rate(clk));
112 clk_put(clk);
114 index++;
116 return 0;
120 * of_clk_set_defaults() - parse and set assigned clocks configuration
121 * @node: device node to apply clock settings for
122 * @clk_supplier: true if clocks supplied by @node should also be considered
124 * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
125 * and sets any specified clock parents and rates. The @clk_supplier argument
126 * should be set to true if @node may be also a clock supplier of any clock
127 * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
128 * If @clk_supplier is false the function exits returning 0 as soon as it
129 * determines the @node is also a supplier of any of the clocks.
131 int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
133 int rc;
135 if (!node)
136 return 0;
138 rc = __set_clk_parents(node, clk_supplier);
139 if (rc < 0)
140 return rc;
142 return __set_clk_rates(node, clk_supplier);
144 EXPORT_SYMBOL_GPL(of_clk_set_defaults);