sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / hisilicon / crg.h
blobe0739717de9a55d123cf230c574b40c0cbb46c4f
1 /*
2 * HiSilicon Clock and Reset Driver Header
4 * Copyright (c) 2016 HiSilicon Limited.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #ifndef __HISI_CRG_H
18 #define __HISI_CRG_H
20 struct hisi_clock_data;
21 struct hisi_reset_controller;
23 struct hisi_crg_funcs {
24 struct hisi_clock_data* (*register_clks)(struct platform_device *pdev);
25 void (*unregister_clks)(struct platform_device *pdev);
28 struct hisi_crg_dev {
29 struct hisi_clock_data *clk_data;
30 struct hisi_reset_controller *rstc;
31 const struct hisi_crg_funcs *funcs;
34 #endif /* __HISI_CRG_H */