sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / mediatek / clk-gate.h
blob72ef89b3ad7ba260a5c01f3cbc9fd6728c0cae81
1 /*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: James Liao <jamesjj.liao@mediatek.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef __DRV_CLK_GATE_H
16 #define __DRV_CLK_GATE_H
18 #include <linux/regmap.h>
19 #include <linux/clk-provider.h>
21 struct clk;
23 struct mtk_clk_gate {
24 struct clk_hw hw;
25 struct regmap *regmap;
26 int set_ofs;
27 int clr_ofs;
28 int sta_ofs;
29 u8 bit;
32 static inline struct mtk_clk_gate *to_mtk_clk_gate(struct clk_hw *hw)
34 return container_of(hw, struct mtk_clk_gate, hw);
37 extern const struct clk_ops mtk_clk_gate_ops_setclr;
38 extern const struct clk_ops mtk_clk_gate_ops_setclr_inv;
39 extern const struct clk_ops mtk_clk_gate_ops_no_setclr;
40 extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv;
42 struct clk *mtk_clk_register_gate(
43 const char *name,
44 const char *parent_name,
45 struct regmap *regmap,
46 int set_ofs,
47 int clr_ofs,
48 int sta_ofs,
49 u8 bit,
50 const struct clk_ops *ops);
52 #endif /* __DRV_CLK_GATE_H */