sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / mmp / clk-apmu.c
blob47b5542ce50f3ec8c356eeb4bdbf9c580f207bfd
1 /*
2 * mmp AXI peripharal clock operation source file
4 * Copyright (C) 2012 Marvell
5 * Chao Xie <xiechao.mail@gmail.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/kernel.h>
13 #include <linux/io.h>
14 #include <linux/err.h>
15 #include <linux/delay.h>
16 #include <linux/slab.h>
18 #include "clk.h"
20 #define to_clk_apmu(clk) (container_of(clk, struct clk_apmu, clk))
21 struct clk_apmu {
22 struct clk_hw hw;
23 void __iomem *base;
24 u32 rst_mask;
25 u32 enable_mask;
26 spinlock_t *lock;
29 static int clk_apmu_enable(struct clk_hw *hw)
31 struct clk_apmu *apmu = to_clk_apmu(hw);
32 unsigned long data;
33 unsigned long flags = 0;
35 if (apmu->lock)
36 spin_lock_irqsave(apmu->lock, flags);
38 data = readl_relaxed(apmu->base) | apmu->enable_mask;
39 writel_relaxed(data, apmu->base);
41 if (apmu->lock)
42 spin_unlock_irqrestore(apmu->lock, flags);
44 return 0;
47 static void clk_apmu_disable(struct clk_hw *hw)
49 struct clk_apmu *apmu = to_clk_apmu(hw);
50 unsigned long data;
51 unsigned long flags = 0;
53 if (apmu->lock)
54 spin_lock_irqsave(apmu->lock, flags);
56 data = readl_relaxed(apmu->base) & ~apmu->enable_mask;
57 writel_relaxed(data, apmu->base);
59 if (apmu->lock)
60 spin_unlock_irqrestore(apmu->lock, flags);
63 static struct clk_ops clk_apmu_ops = {
64 .enable = clk_apmu_enable,
65 .disable = clk_apmu_disable,
68 struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name,
69 void __iomem *base, u32 enable_mask, spinlock_t *lock)
71 struct clk_apmu *apmu;
72 struct clk *clk;
73 struct clk_init_data init;
75 apmu = kzalloc(sizeof(*apmu), GFP_KERNEL);
76 if (!apmu)
77 return NULL;
79 init.name = name;
80 init.ops = &clk_apmu_ops;
81 init.flags = CLK_SET_RATE_PARENT;
82 init.parent_names = (parent_name ? &parent_name : NULL);
83 init.num_parents = (parent_name ? 1 : 0);
85 apmu->base = base;
86 apmu->enable_mask = enable_mask;
87 apmu->lock = lock;
88 apmu->hw.init = &init;
90 clk = clk_register(NULL, &apmu->hw);
92 if (IS_ERR(clk))
93 kfree(apmu);
95 return clk;