drivers/clk/qcom/clk-alpha-pll.h

   1 /*
   2  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #ifndef __QCOM_CLK_ALPHA_PLL_H__
  15 #define __QCOM_CLK_ALPHA_PLL_H__
  16
  17 #include <linux/clk-provider.h>
  18 #include "clk-regmap.h"
  19
  20 struct pll_vco {
  21         unsigned long min_freq;
  22         unsigned long max_freq;
  23         u32 val;
  24 };
  25
  26 /**
  27  * struct clk_alpha_pll - phase locked loop (PLL)
  28  * @offset: base address of registers
  29  * @vco_table: array of VCO settings
  30  * @clkr: regmap clock handle
  31  */
  32 struct clk_alpha_pll {
  33         u32 offset;
  34
  35         const struct pll_vco *vco_table;
  36         size_t num_vco;
  37 #define SUPPORTS_OFFLINE_REQ    BIT(0)
  38 #define SUPPORTS_16BIT_ALPHA    BIT(1)
  39 #define SUPPORTS_FSM_MODE       BIT(2)
  40         u8 flags;
  41
  42         struct clk_regmap clkr;
  43 };
  44
  45 /**
  46  * struct clk_alpha_pll_postdiv - phase locked loop (PLL) post-divider
  47  * @offset: base address of registers
  48  * @width: width of post-divider
  49  * @clkr: regmap clock handle
  50  */
  51 struct clk_alpha_pll_postdiv {
  52         u32 offset;
  53         u8 width;
  54
  55         struct clk_regmap clkr;
  56 };
  57
  58 struct alpha_pll_config {
  59         u32 l;
  60         u32 alpha;
  61         u32 config_ctl_val;
  62         u32 config_ctl_hi_val;
  63         u32 main_output_mask;
  64         u32 aux_output_mask;
  65         u32 aux2_output_mask;
  66         u32 early_output_mask;
  67         u32 pre_div_val;
  68         u32 pre_div_mask;
  69         u32 post_div_val;
  70         u32 post_div_mask;
  71         u32 vco_val;
  72         u32 vco_mask;
  73 };
  74
  75 extern const struct clk_ops clk_alpha_pll_ops;
  76 extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
  77 extern const struct clk_ops clk_alpha_pll_postdiv_ops;
  78
  79 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
  80                              const struct alpha_pll_config *config);
  81
  82 #endif