drivers/clk/qcom/common.c

   1 /*
   2  * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <linux/export.h>
  15 #include <linux/module.h>
  16 #include <linux/regmap.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/clk-provider.h>
  19 #include <linux/reset-controller.h>
  20 #include <linux/of.h>
  21
  22 #include "common.h"
  23 #include "clk-rcg.h"
  24 #include "clk-regmap.h"
  25 #include "reset.h"
  26 #include "gdsc.h"
  27
  28 struct qcom_cc {
  29         struct qcom_reset_controller reset;
  30         struct clk_regmap **rclks;
  31         size_t num_rclks;
  32 };
  33
  34 const
  35 struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
  36 {
  37         if (!f)
  38                 return NULL;
  39
  40         for (; f->freq; f++)
  41                 if (rate <= f->freq)
  42                         return f;
  43
  44         /* Default to our fastest rate */
  45         return f - 1;
  46 }
  47 EXPORT_SYMBOL_GPL(qcom_find_freq);
  48
  49 const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
  50                                             unsigned long rate)
  51 {
  52         const struct freq_tbl *best = NULL;
  53
  54         for ( ; f->freq; f++) {
  55                 if (rate >= f->freq)
  56                         best = f;
  57                 else
  58                         break;
  59         }
  60
  61         return best;
  62 }
  63 EXPORT_SYMBOL_GPL(qcom_find_freq_floor);
  64
  65 int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
  66 {
  67         int i, num_parents = clk_hw_get_num_parents(hw);
  68
  69         for (i = 0; i < num_parents; i++)
  70                 if (src == map[i].src)
  71                         return i;
  72
  73         return -ENOENT;
  74 }
  75 EXPORT_SYMBOL_GPL(qcom_find_src_index);
  76
  77 struct regmap *
  78 qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
  79 {
  80         void __iomem *base;
  81         struct resource *res;
  82         struct device *dev = &pdev->dev;
  83
  84         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  85         base = devm_ioremap_resource(dev, res);
  86         if (IS_ERR(base))
  87                 return ERR_CAST(base);
  88
  89         return devm_regmap_init_mmio(dev, base, desc->config);
  90 }
  91 EXPORT_SYMBOL_GPL(qcom_cc_map);
  92
  93 void
  94 qcom_pll_set_fsm_mode(struct regmap *map, u32 reg, u8 bias_count, u8 lock_count)
  95 {
  96         u32 val;
  97         u32 mask;
  98
  99         /* De-assert reset to FSM */
 100         regmap_update_bits(map, reg, PLL_VOTE_FSM_RESET, 0);
 101
 102         /* Program bias count and lock count */
 103         val = bias_count << PLL_BIAS_COUNT_SHIFT |
 104                 lock_count << PLL_LOCK_COUNT_SHIFT;
 105         mask = PLL_BIAS_COUNT_MASK << PLL_BIAS_COUNT_SHIFT;
 106         mask |= PLL_LOCK_COUNT_MASK << PLL_LOCK_COUNT_SHIFT;
 107         regmap_update_bits(map, reg, mask, val);
 108
 109         /* Enable PLL FSM voting */
 110         regmap_update_bits(map, reg, PLL_VOTE_FSM_ENA, PLL_VOTE_FSM_ENA);
 111 }
 112 EXPORT_SYMBOL_GPL(qcom_pll_set_fsm_mode);
 113
 114 static void qcom_cc_del_clk_provider(void *data)
 115 {
 116         of_clk_del_provider(data);
 117 }
 118
 119 static void qcom_cc_reset_unregister(void *data)
 120 {
 121         reset_controller_unregister(data);
 122 }
 123
 124 static void qcom_cc_gdsc_unregister(void *data)
 125 {
 126         gdsc_unregister(data);
 127 }
 128
 129 /*
 130  * Backwards compatibility with old DTs. Register a pass-through factor 1/1
 131  * clock to translate 'path' clk into 'name' clk and regsiter the 'path'
 132  * clk as a fixed rate clock if it isn't present.
 133  */
 134 static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
 135                                        const char *name, unsigned long rate,
 136                                        bool add_factor)
 137 {
 138         struct device_node *node = NULL;
 139         struct device_node *clocks_node;
 140         struct clk_fixed_factor *factor;
 141         struct clk_fixed_rate *fixed;
 142         struct clk_init_data init_data = { };
 143         int ret;
 144
 145         clocks_node = of_find_node_by_path("/clocks");
 146         if (clocks_node)
 147                 node = of_find_node_by_name(clocks_node, path);
 148         of_node_put(clocks_node);
 149
 150         if (!node) {
 151                 fixed = devm_kzalloc(dev, sizeof(*fixed), GFP_KERNEL);
 152                 if (!fixed)
 153                         return -EINVAL;
 154
 155                 fixed->fixed_rate = rate;
 156                 fixed->hw.init = &init_data;
 157
 158                 init_data.name = path;
 159                 init_data.ops = &clk_fixed_rate_ops;
 160
 161                 ret = devm_clk_hw_register(dev, &fixed->hw);
 162                 if (ret)
 163                         return ret;
 164         }
 165         of_node_put(node);
 166
 167         if (add_factor) {
 168                 factor = devm_kzalloc(dev, sizeof(*factor), GFP_KERNEL);
 169                 if (!factor)
 170                         return -EINVAL;
 171
 172                 factor->mult = factor->div = 1;
 173                 factor->hw.init = &init_data;
 174
 175                 init_data.name = name;
 176                 init_data.parent_names = &path;
 177                 init_data.num_parents = 1;
 178                 init_data.flags = 0;
 179                 init_data.ops = &clk_fixed_factor_ops;
 180
 181                 ret = devm_clk_hw_register(dev, &factor->hw);
 182                 if (ret)
 183                         return ret;
 184         }
 185
 186         return 0;
 187 }
 188
 189 int qcom_cc_register_board_clk(struct device *dev, const char *path,
 190                                const char *name, unsigned long rate)
 191 {
 192         bool add_factor = true;
 193
 194         /*
 195          * TODO: The RPM clock driver currently does not support the xo clock.
 196          * When xo is added to the RPM clock driver, we should change this
 197          * function to skip registration of xo factor clocks.
 198          */
 199
 200         return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor);
 201 }
 202 EXPORT_SYMBOL_GPL(qcom_cc_register_board_clk);
 203
 204 int qcom_cc_register_sleep_clk(struct device *dev)
 205 {
 206         return _qcom_cc_register_board_clk(dev, "sleep_clk", "sleep_clk_src",
 207                                            32768, true);
 208 }
 209 EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
 210
 211 static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec,
 212                                          void *data)
 213 {
 214         struct qcom_cc *cc = data;
 215         unsigned int idx = clkspec->args[0];
 216
 217         if (idx >= cc->num_rclks) {
 218                 pr_err("%s: invalid index %u\n", __func__, idx);
 219                 return ERR_PTR(-EINVAL);
 220         }
 221
 222         return cc->rclks[idx] ? &cc->rclks[idx]->hw : ERR_PTR(-ENOENT);
 223 }
 224
 225 int qcom_cc_really_probe(struct platform_device *pdev,
 226                          const struct qcom_cc_desc *desc, struct regmap *regmap)
 227 {
 228         int i, ret;
 229         struct device *dev = &pdev->dev;
 230         struct qcom_reset_controller *reset;
 231         struct qcom_cc *cc;
 232         struct gdsc_desc *scd;
 233         size_t num_clks = desc->num_clks;
 234         struct clk_regmap **rclks = desc->clks;
 235
 236         cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
 237         if (!cc)
 238                 return -ENOMEM;
 239
 240         cc->rclks = rclks;
 241         cc->num_rclks = num_clks;
 242
 243         for (i = 0; i < num_clks; i++) {
 244                 if (!rclks[i])
 245                         continue;
 246
 247                 ret = devm_clk_register_regmap(dev, rclks[i]);
 248                 if (ret)
 249                         return ret;
 250         }
 251
 252         ret = of_clk_add_hw_provider(dev->of_node, qcom_cc_clk_hw_get, cc);
 253         if (ret)
 254                 return ret;
 255
 256         ret = devm_add_action_or_reset(dev, qcom_cc_del_clk_provider,
 257                                        pdev->dev.of_node);
 258
 259         if (ret)
 260                 return ret;
 261
 262         reset = &cc->reset;
 263         reset->rcdev.of_node = dev->of_node;
 264         reset->rcdev.ops = &qcom_reset_ops;
 265         reset->rcdev.owner = dev->driver->owner;
 266         reset->rcdev.nr_resets = desc->num_resets;
 267         reset->regmap = regmap;
 268         reset->reset_map = desc->resets;
 269
 270         ret = reset_controller_register(&reset->rcdev);
 271         if (ret)
 272                 return ret;
 273
 274         ret = devm_add_action_or_reset(dev, qcom_cc_reset_unregister,
 275                                        &reset->rcdev);
 276
 277         if (ret)
 278                 return ret;
 279
 280         if (desc->gdscs && desc->num_gdscs) {
 281                 scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
 282                 if (!scd)
 283                         return -ENOMEM;
 284                 scd->dev = dev;
 285                 scd->scs = desc->gdscs;
 286                 scd->num = desc->num_gdscs;
 287                 ret = gdsc_register(scd, &reset->rcdev, regmap);
 288                 if (ret)
 289                         return ret;
 290                 ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
 291                                                scd);
 292                 if (ret)
 293                         return ret;
 294         }
 295
 296         return 0;
 297 }
 298 EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
 299
 300 int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
 301 {
 302         struct regmap *regmap;
 303
 304         regmap = qcom_cc_map(pdev, desc);
 305         if (IS_ERR(regmap))
 306                 return PTR_ERR(regmap);
 307
 308         return qcom_cc_really_probe(pdev, desc, regmap);
 309 }
 310 EXPORT_SYMBOL_GPL(qcom_cc_probe);
 311
 312 MODULE_LICENSE("GPL v2");