sh_eth: fix EESIPR values for SH77{34|63}
[linux/fpc-iii.git] / drivers / clk / st / clkgen.h
blobf7ec2d9139d63f5dcf87f714665d8cde2c643452
1 /************************************************************************
2 File : Clock H/w specific Information
4 Author: Pankaj Dev <pankaj.dev@st.com>
6 Copyright (C) 2014 STMicroelectronics
7 ************************************************************************/
9 #ifndef __CLKGEN_INFO_H
10 #define __CLKGEN_INFO_H
12 extern spinlock_t clkgen_a9_lock;
14 struct clkgen_field {
15 unsigned int offset;
16 unsigned int mask;
17 unsigned int shift;
20 static inline unsigned long clkgen_read(void __iomem *base,
21 struct clkgen_field *field)
23 return (readl(base + field->offset) >> field->shift) & field->mask;
27 static inline void clkgen_write(void __iomem *base, struct clkgen_field *field,
28 unsigned long val)
30 writel((readl(base + field->offset) &
31 ~(field->mask << field->shift)) | (val << field->shift),
32 base + field->offset);
34 return;
37 #define CLKGEN_FIELD(_offset, _mask, _shift) { \
38 .offset = _offset, \
39 .mask = _mask, \
40 .shift = _shift, \
43 #define CLKGEN_READ(pll, field) clkgen_read(pll->regs_base, \
44 &pll->data->field)
46 #define CLKGEN_WRITE(pll, field, val) clkgen_write(pll->regs_base, \
47 &pll->data->field, val)
49 #endif /*__CLKGEN_INFO_H*/